add configs with PCI serial console for qemu-intel64 so we can run NuttX on bare
metal Intel HW with serial port card
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
add support for UART 16550 compatible PCI device.
For now we support qemu serial PCI devices and AX99100 based cards.
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
prepare 16550 UART driver to support PCI:
- [breaking change] change argument of uart_ioctl() from `struct file *filep` to `FAR struct u16550_s *priv`
Also fix moxart_16550.c build related to this change
- [breaking change] change argument of uart_getreg() and uart_putreg from `uart_addrwidth_t base` to `FAR struct u16550_s *priv`
Also fix arch/x86/src/qemu/qemu_serial.c and arch/x86_64/src/intel64/intel64_serial.c related to this change
- [breaking change] change argument of uart_dmachan() from `uart_addrwidth_t base` to `FAR struct u16550_s *priv`
- move `struct u16550_s` to public header
- generalize UART_XXX_OFFSET so we can use it with any register increment
- make u16550_bind(), u16550_interrupt(), u16550_interrupt() public
- remove arch/or1k/src/common/or1k_uart.c and use common 16550 MIMO interfacve
- change irq type in `struct u16550_s` from uint8_t to int to match MSI API
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
move MCR_OUT2 configuration from qemu-intel64/src/qemu_boot.c to common code
also leave this option disabled for qemu-intel64 as it's not required
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
Some of PCI drivers require OS interfaces that can't be executed in the INIT context.
In that case we have to postpone PCI drivers probing and call it for example
in board initialization logic.
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
1. Some platforms do not support interrupt mode (PCI_MSI/MSIX),
so add polling mode support, so these platforms can also use virtio-pci;
2. In some cases, we do not want to use the interrupt for virtio driver
to avoid time jitter, so add the polling mode support;
3. If CONFIG_DRIVERS_VIRTIO_PCI_POLLING_PERIOD <= 0, interrupt mode.
if CONFIG_DRIVERS_VIRTIO_PCI_POLLING_PERIOD > 0, polling mode.
Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
Follow the virtio spec, support the virtio pci Legacy
Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
Signed-off-by: andi <andi6@xiaomi.com>
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
1. only support pci modern device;
2. need the pci controller support MSI/MSI-X;
It has been verified based on virtio-rng and virtio-net.
Signed-off-by: Yongrong Wang <wangyongrong@xiaomi.com>
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
When in a multi-core structure, as the intermediate core,
remote is both the master and slave;When the remote exception or
restart occurs, it needs to notify the slave and reestablish the connection
Signed-off-by: yintao <yintao@xiaomi.com>
add sim_rpmsg_virtio.c to verify the new rpmsg virtio wrapper layer,
new the rpmsg virtio can be used in sim platfrom
Signed-off-by: Yongrong Wang <wangyongrong@xiaomi.com>
rpmsg_virtio_ivshmem polling mode use wdog to loop instead work
queue, beacause wdog has better performance
Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
Change the rpmsg_virtio_ivshmem from pci bus based to
pci-ivshmem bus based, so rpmsg_virtio_ivshmem can support interrupt
mode and also support the multi instance.
Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
rpmsg_virtio_ivshmem is a ivshmem based rpmsg virtio driver,
with this driver, we can use the rpmsg virtio in qemu platfrom
Signed-off-by: Yongrong Wang <wangyongrong@xiaomi.com>
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
Rpmsg VirtIO is a virtio transport implementation for Rpmsg, and
it's different to the rptun framework.
rpmsg_virtio.c implements the rpmsg virtio transport layer by itself
to avoid use the remoteproc implementation in OpenAMP to save code
size, so it can be treated as a lightweight version of rptun.
Therefore, rpmsg_virtio.c only support the communication feature and
do not support contoll the life cycle of the remote core.
But benefit by it's small footprint, it can be used in the chips with
small flash.
Signed-off-by: Yongrong Wang <wangyongrong@xiaomi.com>
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
1. Change pci uio ivshmem driver from pci bus based tp pci-ivshmem
bus based;
2. Add the interrupt support by usin the pci_ivshmem API;
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
This commit fixed the issue where the hardware timer wraps around and causes the system to halt.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
reason:
1 On different architectures, we can utilize more optimized strategies
to implement up_current_regs/up_set_current_regs.
eg. use interrupt registersor percpu registers.
code size
before
text data bss dec hex filename
262848 49985 63893 376726 5bf96 nuttx
after
text data bss dec hex filename
262844 49985 63893 376722 5bf92 nuttx
size change -4
Configuring NuttX and compile:
$ ./tools/configure.sh -l qemu-armv8a:nsh_smp
$ make
Running with qemu
$ qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic \
-machine virt,virtualization=on,gic-version=3 \
-net none -chardev stdio,id=con,mux=on -serial chardev:con \
-mon chardev=con,mode=readline -kernel ./nuttx
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Intel CET (Control-flow Enforcement Technology) is a hardware enhancement aimed at mitigating the Retpoline vulnerability, but it may impact CPU branch prediction performance. This commit added ARCH_INTEL64_DISABLE_CET, which can disable CET completely with compilation option `-fcf-protection=none`.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
It was discovered that attempting to load x86-64 format ELF files with a multiboot1 header using the qemu `-kernel` command would result in an error, as multiboot1 only allows x86-32 format ELF files. To address this limitation, we have developed a simple x86_32 bootloader. This bootloader is designed to copy the `nuttx.bin` file to the designated memory address (`0x100000`) and then transfer control to NuttX by executing a jump instruction (`jmp 0x100000`).
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
These are changes to make HPET work with ACRN hypervisor:
- FSB interrupt delivery (which works like PCI MSI)
- 32-bit mode support
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
