daviepeng
60b6199120
fix nxstyle
2021-08-30 02:52:30 +08:00
daviepeng
c7cda607f4
Adds driver for msa301 sensore module
2021-08-30 02:52:30 +08:00
Xiang Xiao
a941c93f72
openamp: Move the download to context target
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-08-29 20:02:24 +02:00
Alan C. Assis
e89933d02a
esp32/ttgo_lora_esp32: Add support to SSD1306 OLED display
2021-08-29 10:48:35 +08:00
yangjiukui
19beb307dd
sensor: fix the bug that lsm6dsl selftest is invalid in nuttx.
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Modified the logic of the selftest according to the ST manual.
Signed-off-by: yangjiukui <yangjiukui@xiaomi.com>
Change-Id: Id55139abf173728de4647533b26f7ab5e9a6b1fe
2021-08-28 17:35:10 -03:00
Xiang Xiao
b0c782255c
libxx: Change CXX_LIBSUPCXX to LIBSUPCXX
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align with other Kconfig(e.g. LIBCXXABI, LIBCXX, UCLIBCXX)
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-08-28 17:14:48 -03:00
Xiang Xiao
e3ab1179fa
board: Enable CONFIG_LIBCXXABI when CONFIG_LIBCXX is enabled
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to avoid link libsupc++.a which is provided by toolchain
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-08-28 17:13:43 -03:00
Xiang Xiao
ceb8bd4bce
libxx: Disable CXX_EXCEPTION by default to save the code space
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I1b1fafa95f0e385a615dba78f43858b797c5ce69
2021-08-28 17:13:43 -03:00
Xiang Xiao
bdc86e85d7
libcxx: Avoid the waring: "__EXCEPTIONS" is not defined, evaluates to 0 [-Werror=undef]
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-08-28 17:13:43 -03:00
Xiang Xiao
95ff2e16a3
libcxxabi: Avoid the waring: "__EXCEPTIONS" is not defined, evaluates to 0 [-Werror=undef]
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-08-28 17:13:43 -03:00
zhuyanlin
9ea7676731
arch:xtensa: rename XCHAL_INT_NLEVELS to XCHAL_NUM_INTLEVELS
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The name used in Tensilica support file core-isa.h for all vendors is
`XCHAL_NUM_INTLEVELS`.
Use a new name may be confused by newer porting xtensa arch.
Change-Id: Ie108d3fdfcc02c81f0eacfca852a1cfc9eea17de
2021-08-28 21:51:45 +02:00
zhuyanlin
cd18d1f050
arch:riscv: remove arch atomic, use libc atomic when need
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It is more common for implement in libc/machine
Change-Id: I3da6c3db64adb78c05ddb26d3956817ac6ada93e
2021-08-28 13:17:30 -03:00
zhuyanlin
3da0bb7829
libc:machine: add common atomic operation.
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Add common atomic operation.
Change-Id: I9f6b891f1406d54871a3f50c217a1029b434d2e8
2021-08-28 13:17:30 -03:00
Gustavo Henrique Nihei
84e9ff085f
drivers/mtd: Fix code alignment for compliance to coding standard
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-08-28 02:28:03 +08:00
Gustavo Henrique Nihei
f153e42fcb
drivers/mtd: Fix /proc/partitions column alignment on NSH
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-08-28 02:28:03 +08:00
panran
2568cc1212
nuttx:Correct code comment errors
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N/A
Signed-off-by: panran <panran@xiaomi.com>
Change-Id: I9c9fa0855ae7851b7268a7ace6b5a86d5562a6b1
2021-08-27 20:21:19 +02:00
zhuyanlin
3c58b01721
stddef: Let offset
be defined from toolchain
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Let `offset` could be defined from toolchain,
Which will be usefull for fixed code project.
2021-08-27 08:55:45 -07:00
Xiang Xiao
f0001574ed
arch/armv8-m: Update per the latest architecture reference manual
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https://developer.arm.com/documentation/ddi0553/latest
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-08-27 11:39:27 +02:00
ligd
35379403f8
sched/wdog: move SMP enter_critical_section to sched_timerexpiration.c
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Change-Id: Id654e6d2151e3b807ed2df4ab8169b90ab07b015
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-08-27 16:59:20 +09:00
ligd
9116ed9247
sched/wdog: fix switch_context caused error in wd_start()
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Thead A: Thread B:
wd_start(wdogX)
wd_cancel
nxsched_cancel_timer --> wd_start(wdogX)
wd_cancel
add wdogX to g_wdactivelist
<--
add wdogX to g_wdactivelist
then, you will find wdogX add twice.
Change-Id: Icbf3b2badff20908e115c9134e2400cdcb32b1e0
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-08-27 16:59:20 +09:00
Abdelatif Guettouche
1385ea7673
arch/esp32: Properly handle GPIO interrupt in SMP.
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The PRO CPU and APP CPU have different peripherals for GPIO interrupts.
Each CPU needs to allocate an interrupt and attach it to its GPIO
peripheral.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-27 13:24:00 +09:00
Alan C. Assis
5df1a544cf
boards/esp32: Add basic support to TTGO-LoRa-SX1276-ESP32
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Link to this board's project: https://github.com/LilyGO/TTGO-LORA32
2021-08-26 18:51:15 -03:00
Alan C. Assis
de64a1eee8
doc/esp32: Add instructions to use softap
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Co-author: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-26 20:57:19 +02:00
Alin Jerpelea
a43650648e
risc-V: remove ble defconfigs
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By default the components with BSD license should be disabled
NOTE:
the BLUETOOTH components was enabled in a non bluetooth config
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-08-27 02:56:22 +08:00
Alin Jerpelea
5bc10ba9a6
nrf52832-mdk: remove sdc defconfig
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By default the Bluetooth configuration is disabled due to BSD license
Please enable the use of BSD licenses and the Bluetooth config
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-08-27 02:56:22 +08:00
Alin Jerpelea
c29cc7e241
stm32f4discovery: hciuart: remove hciuart defconfig
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By default the components with BSD license should be disabled
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-08-27 02:56:22 +08:00
Alin Jerpelea
8119e1e8e0
sim: enable BSD components
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By default the components with BSD license are disabled.
NOTE:
We are making an exception and enable the BSD components for
Simulator build to be able to thest the functionality.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-08-27 02:56:22 +08:00
Alin Jerpelea
dc590e6414
tools: cxd56: update licenses to Apache
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Sony has submitted the SGA and we can update the remaining licenses
to Apache
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-08-27 02:56:22 +08:00
Alin Jerpelea
29bfbf8769
License: add Bluetooth LE support to the license guard
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If ALLOW_BSD_COMPONENTS is not enabled in the license setup,
Bluetooth LE support will be disabled
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-08-27 02:56:22 +08:00
zhuyanlin
528d18ef26
libxx: rename NUTTX_LIBCXX
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NUTTX_LIBCXX is only basic C++ support, do not support many c++
library function, NUTTX_NOCXXLIB is more suitable.
When NUTTX_NOCXXLIB is select, do not select lower level support.
Change-Id: I158937a4ba02f8fa3c76101acbdfb295d8cd736f
2021-08-26 19:32:24 +08:00
zhuyanlin
f2fe51c22d
libc:libcxx: add support for libcxxabi.
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libcxxabi is either-or select with glibcxx.
Change-Id: I4fbea19f0648ddc318379dd43bac8406f7c86927
2021-08-26 19:32:24 +08:00
zhuyanlin
7f48d13c47
libc:libxx: add new low level c++ standard library support
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LLVM libc++abi is a new implementation of low level support for
a standard C++ library.
Change-Id: Ica9c81bd96fd27b169a06e352b0c394d47aed5b6
2021-08-26 19:32:24 +08:00
chao.an
bcce3314e5
arch/arm/cortex-m: add up_backtrace support
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add up_backtrace support based on push/branch instruction
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-08-26 18:31:51 +08:00
chao.an
d5d6297ca1
arch/arm/assert: enhance the assert dump
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show the all tasks info including backtrace and registers
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-08-26 13:31:08 +08:00
chao.an
f14bd44001
arch/armv7: add up_backtrace support based on frame pointer
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This feature depends on frame pointer, "-fno-omit-frame-pointer" is mandatory
This feature can not be used in THUMB2 mode if you are using GCC toolchain,
More details please refer:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92172
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-08-26 13:30:08 +08:00
buyuer
001eb7786b
net/local: Return the partial write size.
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Signed-off-by: buyuer <dingddding@163.com>
2021-08-26 13:28:11 +08:00
buyuer
33320329ec
vfs: writev should return the partial write size.
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Signed-off-by: buyuer <dingddding@163.com>
2021-08-26 13:28:11 +08:00
Kapil Gupta
ec99e11f5e
esp32/softap: Enable the WPA2 by default to ask user password
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Signed-off-by: Kapil Gupta <kapil.gupta@espressif.com>
Co-author: Alan Carvalho de Assis <alan.carvalho@espressif.com>
2021-08-26 13:26:57 +08:00
ligd
f1aec38ffa
arm: add ARM_HAVE_NEON to Kconfig
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Change-Id: I112037aa15a6fae76cf4b7c2df10a42899c38a61
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-08-26 13:25:43 +08:00
Abdelatif Guettouche
fc594c5d25
esp32_irq.c: Extend the CPU interrupt/peripheral map to include the
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status of the interrupt (enabled/disabled).
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-26 07:06:22 +09:00
Abdelatif Guettouche
810ed19b8f
arch/xtensa/esp32_irq.c: Enable/disable interrupts using the Interrupt
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Matrix.
This allows manipulating interrupts from both CPUs. Internal interrupts
however, still need to be disabled/enabled by each CPU.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-26 07:06:22 +09:00
Abdelatif Guettouche
a7abd56448
arch/xtensa: Move the Xtensa specific part of interrupts to
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xtensa/include/irq.h
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-26 07:06:22 +09:00
Abdelatif Guettouche
470799b0b3
arch/xtensa/esp32_irq: Remove the map/unmap IRQ functions they are used
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only inside this file.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-26 07:06:22 +09:00
Abdelatif Guettouche
04cd520293
arch/xtensa/esp32: Merge esp32_intdecode with esp32_irq.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-26 07:06:22 +09:00
Abdelatif Guettouche
79cc12c034
arch/xtesna/esp32: Merge the contents of esp32_cpuint and esp32_irq.
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They do the same thing (manipulate interrupts) keeping them separated
was making things harder.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-26 07:06:22 +09:00
Abdelatif Guettouche
237aebb7e1
arch/xtensa/esp32_cpuint.c: Refactor retrieving the intmap and register
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address of a peripheral.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-26 07:06:22 +09:00
Abdelatif Guettouche
02c17c3169
arch/esp32: Simplify the interrupt allocation process.
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Allocating and attaching interrupts were both exported outside, however
these two move hand in hand and we don't have to expose these details.
Also, the parameters passed are saved and will be used to retrieve
information about the interrupt and the attached peripheral.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-26 07:06:22 +09:00
Abdelatif Guettouche
eefe7ebe5f
xtensa/esp32_cpuint: export only one function to allocate a CPU
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interrupt.
That function will have a parameter to decide whether to allocate a
level sensitive interrupt or an edge sensitive interrupt.
All the drivers are also updated with this API change.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-26 07:06:22 +09:00
Xiang Xiao
d242861c44
libc: Remove the legacy printf support
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-08-25 12:55:36 -07:00
Abdelatif Guettouche
dbdec45049
arch/xtensa/src/common: Use irq_spin APIs in modifyregXX
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Replace enter_critical_section with spin_lock_irqsave.
Replace leave_critical_section with spin_unlock_irqrestore.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-25 23:32:40 +08:00