Commit Graph

16226 Commits

Author SHA1 Message Date
Abdelatif Guettouche
62732dd6b8 arch/xtensa/src/esp32/esp32_gpio.c: ESP32_NIRQ_GPIO was used instead of
ESP32_NGPIOS

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-02 11:42:49 -03:00
Abdelatif Guettouche
844f39fc67 arch/xtensa/src/esp32/esp32_gpio.c: Change the logic of setting the ENA
bits so that the call to up_cpu_index is only performed when SMP is
enabled.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-02 11:42:49 -03:00
Nathan Hartman
80ce7800a9 Sources and Docs: Fix typos and nxstyle issues
Documentation/contributing/coding_style.rst:

    * Fix repeated words: ("this this").
    * Remove trailing spaces.

boards/z80/z80/z80sim/README.txt:

    * Fix repeated words: ("this this") and rewrap lines.

graphics/Kconfig,
libs/libc/math/Kconfig:

    * Fix repeated words: ("this this").

arch/arm/src/armv7-a/arm_assert.c,
arch/arm/src/armv7-r/arm_assert.c,
arch/arm/src/imxrt/imxrt_enet.c,
arch/arm/src/kinetis/kinetis_enet.c,
arch/arm/src/kinetis/kinetis_flexcan.c,
arch/arm/src/s32k1xx/s32k1xx_enet.c,
arch/arm/src/s32k1xx/s32k1xx_flexcan.c,
arch/arm/src/stm32/stm32_pwm.c,
arch/arm/src/stm32h7/stm32_pwm.c,
arch/arm/src/stm32l4/stm32l4_pwm.c,
arch/renesas/src/rx65n/rx65n_usbdev.c,
binfmt/libnxflat/libnxflat_bind.c,
drivers/pipes/pipe_common.c,
net/igmp/igmp_input.c,
net/tcp/tcp_conn.c,
sched/sched/sched_roundrobin.c:

    * Fix typo in comment ("this this").

arch/arm/src/cxd56xx/cxd56_usbdev.c,
arch/arm/src/lc823450/lc823450_usbdev.c:

    * Fix typo in comment and rewrap lines.

arch/arm/src/imxrt/imxrt_usbdev.c,
arch/arm/src/stm32/stm32_dac.c,
arch/arm/src/stm32f0l0g0/stm32_pwm.c,
arch/arm/src/stm32f7/stm32_pwm.c,
arch/arm/src/tiva/lm/lm4f_gpio.h,
fs/nxffs/nxffs_write.c,
include/nuttx/analog/pga11x.h,
include/nuttx/usb/usbdev.h,
net/mld/mld_join.c:

    * Fix typo in comment ("this this").
    * Fix nxstyle issues.
2020-10-02 04:54:52 +02:00
Masayuki Ishikawa
3f461f59ba arch: cxd56xx: Fix handle_irqreq() in cxd56_cpupause.c
Summary:
- The handle_irqreq() is used for remote IRQ control.
- The logic is called via IPI (Inter-Processor Interrupt)
- And the handler should handle only one request
- However, I noticed that the handler handles up to two requests
- This commit fixes this issue

Impact:
- Affects SMP cases only

Testing:
- Tested with spresense:wifi_smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-02 04:53:53 +02:00
Matias N
2cda47272a nrf52_ppi: fix group disable and add group clear operation 2020-10-01 21:31:58 -03:00
YAMAMOTO Takashi
83f1f2bc42 sim: Restore some symbols in nuttx-names.in
Used by arch/sim/src/sim/vpnkit/*.c
2020-10-01 15:33:22 +08:00
David Sidrane
f6aa845080 stm32f7:Allow the use of the Network Monitor via polling
Not all boards have an interrupt line from the phy to
   the Soc. This commit allows the phy to be polled for
   link status.

   This may not work on all MAC/PHY combination that
   have mutually exclusive link management and operating
   modes. The STM32F7 and LAN8742AI do not have such a
   limitation.
2020-10-01 15:28:51 +08:00
Nathan Hartman
4ac2c73d82 tiva: Fix nxstyle warnings
arch/arm/src/tiva/tm4c/tm4c129_sysctrl.c:

    * Fix nxstyle warnings. No functional changes.

arch/arm/src/tiva/tm4c/tm4c_gpio.c:

    * Fix nxstyle warnings. No functional changes.

arch/arm/src/tiva/tm4c/tm4c_gpio.h:

    * Fix nxstyle warnings. No functional changes.
2020-10-01 12:14:27 +08:00
Sebastian Ene
d6210fcd84 arch/sim: Make the SIGUSR1 host signal to use the NuttX irq logic
Signed-off-by: Sebastian Ene <sene@apache.org>
2020-10-01 12:11:31 +08:00
Abdelatif Guettouche
769d68a762 arch/xtensa: Fix some typos and correct some comments.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-30 13:55:28 -03:00
patacongo
9142deeb10 Update arch/arm/src/common/arm_interruptcontext.c
Add a comment discussing the limitation of this solution for the case of the ARMv7-A with the GIC
2020-09-30 08:32:25 -06:00
Masayuki Ishikawa
68f102055a arch: xtensa: Fix up_interrupt_context() for SMP
Summary:
- Apply the same fix for Arm SMP

Impact:
- Affects SMP only

Testing:
- Tested with esp32-core:smp (qemu)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-09-30 08:32:25 -06:00
Masayuki Ishikawa
e8ec8fb4b4 arch: risc-v: Fix up_interrupt_context() for SMP
Summary:
- Apply the same fix for Arm SMP

Impact:
- Affects SMP only

Testing:
- Tested with maix-bit:smp (qemu)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-09-30 08:32:25 -06:00
Masayuki Ishikawa
bbc6571b28 arch: arm: Fix up_interrupt_context() for SMP
Summary:
- I found an issue with up_interrupt_context() when testing.
- And finally found that up_interrupt_context() is not atomic.
- This commit fixes the issue

Impact:
- Affects SMP only

Testing:
- Tested with spresense:wifi_smp and sabre-6quad:smp (qemu)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-09-30 08:32:25 -06:00
ligd
22b837f440 arch/sim/src/nuttx-names.in: fix sim crash in Cygwin platform
Change-Id: I966e626eee03ce0b2c01afa905272194028e64f1
2020-09-30 08:07:17 -06:00
raiden00pl
c18e7bb422 nrf52_lowputc.c: fix compilation error for nrf52832 which has limited baud rate support 2020-09-30 09:09:04 -03:00
raiden00pl
4da122b8d4 nrf52_serial.c: fix unused wariable warning 2020-09-30 09:09:04 -03:00
raiden00pl
35a5036e32 nrf52: add serial termios support 2020-09-30 09:09:04 -03:00
Nathan Hartman
fc404e15da tiva: Fix nxstyle warnings
arch/arm/src/tiva/hardware/tiva_eeprom.h:

    * Fix nxstyle warnings. No functional changes.

arch/arm/src/tiva/hardware/tiva_sysctrl.h:

    * Fix nxstyle warnings. No functional changes.

arch/arm/src/tiva/hardware/tiva_uart.h:

    * Fix nxstyle warnings. No functional changes.

arch/arm/src/tiva/hardware/tiva_wdt.h:

    * Fix nxstyle warnings. No functional changes.
2020-09-29 16:59:17 +01:00
Dong Heng
a266dc9629 arch/xtensa: Fix task signal process preemption A0 modification error 2020-09-29 09:10:53 -03:00
Bhindhiya
9369ce6488 Add RX65N SPI (RSPI) driver support 2020-09-29 09:09:55 -03:00
Abdelatif Guettouche
70c1170c2e Revert "arch/xtensa/src/esp32/esp32_gpio.c: Enable input mode only when"
This reverts commit b5d3ba64e0.
2020-09-29 09:07:41 -03:00
Yoshinori Sugino
3de85be15a arch/risc-v/src: Branch to up_sigdeliver() with interrupts disabled
When executing an MRET instruction, MIE is set to MPIE.
In order to branch to up_sigdeliver() with interrupts disabled,
we need to change MPIE, not MIE.
2020-09-28 22:41:46 -07:00
Yoshinori Sugino
2adec1f366 arch/risc-v/src/fe310: Branch to up_sigdeliver() with interrupts disabled
When executing an MRET instruction, MIE is set to MPIE.
In order to branch to up_sigdeliver() with interrupts disabled,
we need to change MPIE, not MIE.
2020-09-28 22:41:46 -07:00
Brennan Ashton
bbf16b27d9 nRF52: Add basic error handling for i2c in polling mode
There was no error handling before and it would block on common
cases like NACK which meant that you could not use the i2ctool
to perform a scan of the bus.

This does not handle the interrupt flow which also has incomplete
error handling.
2020-09-28 09:34:08 -03:00
Yoshinori Sugino
5bb4eb39f2 Fix nxstyle warnings 2020-09-28 13:54:43 +08:00
Yoshinori Sugino
698008d1e5 Fix typos 2020-09-28 13:54:43 +08:00
Gregory Nutt
fe0a88c838 Correct compilation of arch/sim/src/sim/up_wpcap.c
This commit corrects the following compilation error:

    /usr/include/cygwin/socket.h:27:8: error: redefinition of 'struct sockaddr'
       27 | struct sockaddr {
          |        ^~~~~~~~
    In file included from /usr/include/w32api/winsock2.h:57,
                     from sim/up_wpcap.c:48:
    /usr/include/w32api/psdk_inc/_ip_types.h:70:8: note: originally defined here
       70 | struct sockaddr {
          |        ^~~~~~~~
    In file included from /usr/include/sys/socket.h:13,
                     from /usr/include/cygwin/in.h:21,
                     from /usr/include/netinet/in.h:12,
                     from sim/up_wpcap.c:57:
    /usr/include/cygwin/socket.h:39:8: error: redefinition of 'struct sockaddr_storage'
       39 | struct sockaddr_storage {
          |        ^~~~~~~~~~~~~~~~
    In file included from sim/up_wpcap.c:48:
    /usr/include/w32api/winsock2.h:269:10: note: originally defined here
      269 |   struct sockaddr_storage {
          |          ^~~~~~~~~~~~~

The compilation was broken by a couple of recent blind, unverified changes to up_wpcap.c.  Most were introduced with commit: 8ce0ff5ce4 with this change:

    diff --git a/arch/sim/src/sim/up_wpcap.c b/arch/sim/src/sim/up_wpcap.c
    index ef7b4b3a0c..a15421e80c 100644
    --- a/arch/sim/src/sim/up_wpcap.c
    +++ b/arch/sim/src/sim/up_wpcap.c
    @@ -55,6 +55,8 @@

     #include <netinet/in.h>

    +#include "up_internal.h"
    +
     /****************************************************************************
      * Pre-processor Definitions
      ****************************************************************************/

up_internal.h includes:

     47 #  include <sys/types.h>
     48 #  include <stdbool.h>
     49 #  include <netinet/in.h>

And netinet/in.h includes:

     46 #include <sys/types.h>
     47 #include <sys/socket.h>
     48 #include <stdint.h>

Which is where the collision error is introduced since up_wpcap.c includes winsock2.h already.  There were additional problems introduced to the file by other changes:

- A malformed syslog() call was added
- Some issues with netdriver_setmacaddr()
2020-09-27 18:22:02 -07:00
Nathan Hartman
a4aecb4f42 tiva: tiva_i2c.h: Fix nxstyle warnings
arch/arm/src/tiva/tiva_i2c.h:

    * Fix nxstyle warnings. No functional changes.
2020-09-28 00:14:01 +08:00
Bhindhiya
9707f39ff7 RX65N DTC Driver Support Added 2020-09-26 11:45:15 -03:00
David Sidrane
4a6f7cacd5 stm32f7:serial Bug Fix: Ensure next buffer is processed
When the Head to Tail relationship was H < T, then
   only the tail to end of buffer was sent.

   The fix is: In the txdma completion to do a second
   the DMA operation using nbuffer if the nlength is
   non zero.

stm32f7:serial UART5 use actual size

   UART5 was using the CONFIG_UART5_TXBUFSIZE
   not the UART5_TXBUFSIZE_ADJUSTED.
   Since the buffer size was adjusted up, this
   has no dcache implications.
   If the UART5_TXBUFSIZE_ADJUSTED is larger
   then CONFIG_UART5_TXBUFSIZE it will present
   a larger usable buffer to the system's
   serial driver.
2020-09-25 22:09:05 +01:00
Sebastian Ene
c47ad0c909 arch/sim: Add host timer to oneshot timer logic
## Summary of Changes

Add a host timer that generates periodic signals and sends SIGALRM to
the process that runs the NuttX simulation. This logic is integrated as
part of the existing NuttX oneshot timer. The host timer installs an
irq handler which is expected to run every CONFIG_USEC_PER_TICK .

Signed-off-by: Sebastian Ene <nuttx@fitbit.com>
2020-09-25 17:36:16 -03:00
Nathan Hartman
090d822f33 tiva: Fix nxstyle warnings
arch/arm/src/tiva/tiva_gpio.h:

    * Fix nxstyle warnings. No functional changes.

arch/arm/src/tiva/tiva_mpuinit.h:

    * Fix nxstyle warnings. No functional changes.

arch/arm/src/tiva/tiva_qencoder.h:

    * Fix nxstyle warnings. No functional changes.
2020-09-25 16:37:45 +01:00
anjana
c6b51771f0 USB Device Mode Driver Support for RX65N 2020-09-25 09:06:59 -03:00
Nathan Hartman
44d7f14121 tiva: tiva_ssi.h: Fix nxstyle warnings
arch/arm/src/tiva/tiva_ssi.h:

    * Fix nxstyle warnings. No functional changes.
2020-09-24 16:00:55 -03:00
Matias N
0f9fb67b0c nrf52 spi: build fixes for !SPI_EXCHANGE 2020-09-24 09:51:51 -03:00
Bhindhiya
d0e0af7826 Renesas .gitignore files added 2020-09-24 10:10:40 +01:00
Nathan Hartman
c8bb4474bb tiva: tiva_periphrdy.h, tiva_pwm.h: Fix nxstyle warnings
arch/arm/src/tiva/tiva_periphrdy.h:

    * Fix nxstyle warnings. No functional changes.

arch/arm/src/tiva/tiva_pwm.h:

    * Fix nxstyle warnings. No functional changes.
2020-09-23 22:00:17 +01:00
Thomas Axelsson
f193f0f702 imxrt: Style fixes in mux and ADC hardware headers 2020-09-23 13:16:33 -03:00
Thomas Axelsson
d67bc0c3c8 imxrt: ADC driver
Based on LPC17xx_40xx and STM32 drivers.
2020-09-23 13:16:33 -03:00
Daniel Mesham
c8dc9e39ac arch/arm: stm32l4: Fix typo in TIM15 PWM config
When configuring TIM15_CH2 as output, we mistakenly referred to TIM12 instead.
2020-09-23 14:29:10 +02:00
zhongan
6240977341 rv32im: add missing call of 'up_savefpu'.
Change-Id: Iaf2e212a4fdea2f5f04a178d24755e0e37a30ef6
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-09-23 10:22:45 +01:00
zhongan
07dd053e86 risc-v: add putreg64 for mtimer registers.
Change-Id: I18fe312c95c73966f5c09fd18081b0c72923e2ac
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-09-23 10:22:45 +01:00
Daniel Agar
3df8f79111 stm32f412ce fixes 2020-09-22 22:44:43 -07:00
saramonteiro
7d889bf4c4 nrf52: Fix typo, replace setcc with getcc 2020-09-22 21:07:31 -03:00
Xiang Xiao
031984f76a arch/arm: Select arm family when ARCH_ARM1136J/ARCH_ARM1156T2/ARCH_ARM1176JZ is defined
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-09-22 23:05:29 +01:00
Xiang Xiao
d078518502 arch/arm: Should include arch/armv8-m/spinlock.h when CONFIG_ARCH_ARMV8M is defined
forget in commit 2376d8a266
Author: qiaowei <qiaowei@xiaomi.com>
Date:   Wed Apr 22 10:09:50 2020 +0800

    Porting arch/armv8-m support

    1. Add dsp extension; float point based on hardware and software.
    2. Delete folder "iar"
    3. Add tool chain for cortex-M23 and cortex-M35p

    Signed-off-by: qiaowei <qiaowei@xiaomi.com>
    Change-Id: I5bfc78abb025adb0ad4fae37e2b444915f477fe7

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-09-22 23:05:29 +01:00
Xiang Xiao
7faf72cabc arch/arm: Add ARCH_ARMV6M Kconfig to prepare the support of CortexM0+
also align with the armv7m implementation

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-09-22 23:05:29 +01:00
Nathan Hartman
560a052144 tiva: tiva_timer.h: Fix nxstyle warnings
arch/arm/src/tiva/tiva_timer.h:

    * Fix nxstyle warnings. No functional changes.
2020-09-22 10:29:28 -07:00
Bhindhiya
c5ef686707 Warnings in NuttX Renesas common files Resolved 2020-09-22 09:49:46 -07:00