Commit Graph

5 Commits

Author SHA1 Message Date
anjiahao
9f644579b3 fix sim register & tcb info typo
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-07-23 21:59:35 -07:00
ligd
5744c62443 sim: set timer irq as real timer
Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-12-21 16:59:56 +09:00
Peter Kalbus
6abdf73535 sim: Initial support on MacOS M1 and Linux AARCH64 based hosts. 2022-02-17 09:35:09 +08:00
Xiang Xiao
e1879e35cd arch/sim: Always typedef xcpt_reg_t to unsigned long
to simplify the code logic

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-15 06:44:21 +01:00
Xiang Xiao
dd1d980c3a arch/sim: Move setjmp/longjmp to libc/machine/sim
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-05 09:00:42 -03:00