Commit Graph

2484 Commits

Author SHA1 Message Date
raiden00pl
bc178344a9 net/can: add an option to control CAN EXTID support 2022-02-06 17:09:11 +08:00
raiden00pl
341bbe38d5 arch/stm32: add FDCAN SocketCAN support 2022-02-06 17:09:11 +08:00
Petro Karashchenko
47a09ed255 arch/arm/samv7: add arm_systemreset.c to CMN_CSRCS
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-02-04 16:40:50 +08:00
chao.an
d59931159a arch/arm: fix leaving from critical section
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-02 21:45:13 +08:00
Xiang Xiao
4c167b0729 Correct the code alignment
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-01 21:22:21 -03:00
David Sidrane
0f1342f36b stm32:Add OTG ID GPIO disable 2022-01-30 01:50:37 +08:00
raiden00pl
4c2dd3924a include/nuttx/can.h: rename CAN_ERR_CTRL to CAN_ERR_CRTL for compatibility with libcanutils 2022-01-23 01:34:34 +08:00
zouboan
0342272e5a up_progmem_erasesize for stm32f20xxf40xx_flash.c 2022-01-21 14:57:32 +08:00
Petro Karashchenko
08043fb5bc net: unify FAR keyword usage for all net buffer memory mapped buffers
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-20 01:42:56 +08:00
Petro Karashchenko
9551de7115 net: use HTONS, NTOHS, HTONL, NTOHL macro in kernel code
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-18 10:59:47 +01:00
raiden00pl
e140ba1a21 arch/stm32: fdcan cosmetics 2022-01-17 09:36:00 -03:00
raiden00pl
c450dea6e5 stm32: add FDCAN support
based on PR #2987
2022-01-17 09:36:00 -03:00
Petro Karashchenko
8d3bf05fd2 include: fix double include pre-processor guards
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-16 11:11:14 -03:00
raiden00pl
6fe95d8314 stm32: add SocketCAN support, based on stm32_can.c 2022-01-05 06:16:41 -08:00
raiden00pl
5b9b3814f8 stm32: add CAN error support 2022-01-05 18:33:06 +08:00
Petro Karashchenko
6c2b40f98a typos: fix typos in many files
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-03 22:10:07 +08:00
Petro Karashchenko
3ccb657dc2 nuttx: remove space befone newline in logs
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2021-12-27 21:01:19 -06:00
Petro Karashchenko
51a2db6ffc Kconfig: improve uniformity
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2021-12-14 07:32:48 -06:00
Daniel Agar
efc949bceb arch/arm/src/stm32/Kconfig STM32_STM32F412 add SPI2 & SPI3 2021-12-09 21:30:41 -06:00
Huang Qi
58e0781e2e arch/arm: Implement TLS support
Signed-off-by: Huang Qi <no1wudi@qq.com>
2021-12-07 23:31:41 -06:00
Xiang Xiao
a29ee19af4 driver/motor: Remove the unnecessary critical section operation
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-11-18 19:27:07 -06:00
Alin Jerpelea
6deaba896d arch: Haltian Ltd: update licenses to Apache
Gregory Nutt has submitted the SGA
Haltian Ltd has submitted the SGA
Uros Platise has submitted the ICLA

as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-11-15 06:49:32 -06:00
raiden00pl
7b595ab73a arch/arm/stm32/stm32_qencoder: add support for Qenco index pin 2021-11-07 03:52:48 -06:00
raiden00pl
bb5e3fee44 arch/arm/src/stm32/stm32_foc.c: define missing FOC1_PWM_FZ_BIT for G4 2021-10-29 07:49:59 -05:00
raiden00pl
8e9e54cad3 arch/arm/src/stm32/hardware/stm32_dbgmcu.h: fix invalid STM32_DBGMCU_APB2_FZ offset for G4 2021-10-29 07:49:59 -05:00
David Sidrane
fd2c1cb216 stm32:Support CONFIG_MPU_RESET and CONFIG_ARM_MPU_EARLY_RESET 2021-10-23 03:58:26 -05:00
Alin Jerpelea
15a37c5a5a arch: Omni Hoverboards: update licenses to Apache
Gregory Nutt has submitted the SGA
Omni Hoverboards has submitted the SGA
David Sidrane has submitted the ICLA
Mateusz Szafoni has submitted the ICLA
Sebastien Lorquet has submitted the ICLA
Paul Alexander Patience has submitted the ICLA

as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-09-28 04:37:38 -07:00
David Sidrane
a9ff808dd1 stm32xx:sdmmc/sdio remove redundant GPIO config
The stm32_gpiosetevent calls stm32_configgpio. So
   the pin is infact restored to the SDMMC/SDIO D0.

   The seconday init, dropped interrupts in a debug
   build with HW stack checking on after the GPIO glich
   fixes and that was how it was detected.
2021-09-21 18:25:16 -07:00
David Sidrane
d5e306e6f3 stm32:Etablish device before enabling outputs
This prevents gliches on changing to an output mode.
   If not the ALT mux can be selecting a IP block that
   is drving the line to say 0. Then the output is connected
   to that source, then swithced to the correct source. This
   produced a 430 nS glich on a F4 @168 Mhz. It was a enough
   to corrupt an I2C device with a bus monitor.
2021-09-21 18:25:16 -07:00
Xiang Xiao
75a119ac1c arch: Compile up_puts in all Make.defs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-09-18 07:33:44 -03:00
Abdelatif Guettouche
31aa616bf2 stm32_serial.c: Don't fake a TX interrupt when interrupts are not
suppressed.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-09-10 15:15:44 -07:00
David Sidrane
41e1696b27 stm32f4:USB otgdev Ensure proper EP state
Repeated automated sercon, serdis on VBUS proved to fail
   for CDCACM DATA IN (device Serial TX). The root cause was
   that the EP was left active after disconnect. This resulted
   in the first serial write falling to kick-off the EP IN request.
   That should restart the EP ISR.
2021-09-09 14:27:41 -04:00
Fotis Panagiotopoulos
eb48a0dbe0 Fix in STM32_UART8 Kconfig. 2021-09-07 10:52:44 +08:00
Alin Jerpelea
a20d4ac4ec author: Aleksandr Vyhovanec: update licenses to Apache
Aleksandr Vyhovanec has submitted the ICLA
as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-09-03 17:38:33 +08:00
Alin Jerpelea
07d528fd8d license: Ken Pettit: update licenses to Apache
Ken Pettit is the copyright holder for those files and he has submitted the
SGA as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-08-23 11:41:41 +08:00
chao.an
6cfb132232 arch/cortex-m: replace arm_switchcontext to c-style
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-08-22 14:44:01 +08:00
raiden00pl
78962165d8 arch/stm32: add 3-phase Hall effect sensor lower half 2021-08-19 08:19:38 -07:00
raiden00pl
532ec126e9 stm32/stm32_serial.c fix compile error when CONFIG_STM32_SERIALBRK_BSDCOMPAT=y.
Fix for https://github.com/apache/incubator-nuttx/issues/4353
2021-08-18 04:43:32 -07:00
Xiang Xiao
f63d1cfbbb arch/arm: Add NVIC_FPCCR_XXX macro to avoid the hard code value
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-08-15 10:50:52 +02:00
Xiang Xiao
fad0c3b38b arch/arm: Add NVIC_CPACR_CP_XXX(n) macro to avoid the hard code value
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-08-14 11:41:59 -07:00
raiden00pl
51b24c4bad stm32/qenco: add support for QEIOC_SETPOSMAX 2021-08-10 11:19:05 -03:00
raiden00pl
092a0c8453 stm32/qenco: add an option to disable encoder timer extension from 16-bit to 32-bit
Previous implementation has always expanded the width of the timer to 32-bit.
This feature is not always needed and should be configurable from Kconfig.
2021-08-10 11:18:40 -03:00
raiden00pl
b0c9a6133e stm32/qenco: fix TIM2 width for STM32F3 which is 32-bit not 16-bit
STM32F3 has timers of the same length as in STM32F4.
2021-08-10 11:18:40 -03:00
raiden00pl
3dd385ac0c stm32/qenco: add support for STM32G4
This required generalization of RCC definitions that are not compatible with previous chips
2021-08-10 11:18:40 -03:00
raiden00pl
21f59c874f stm32/qenco: fix compilation for STM32F1. GTIM_CCER_CCxNP bits are not present in F1 2021-08-10 11:18:40 -03:00
Xiang Xiao
7e0db977cc arch/arm: Add CONTROL register bit field definition
and replace all hardcode value

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-08-07 09:20:10 -03:00
Daniel P. Carvalho
a7be1c9a2e stm32_pmw: fix pwm_stop() function to enable multiple PWM start and stop. 2021-08-05 14:48:44 -03:00
Daniel P. Carvalho
2593089f84 stm32_dac: add support for DAC3 2021-08-04 20:22:58 +02:00
Xiang Xiao
69df58c2e8 Replace __attribute__((no_instrument_function)) with noinstrument_function;
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-29 21:55:21 -03:00
raiden00pl
f9937b28cc stm32g4: add CORDIC driver 2021-07-28 14:23:13 -03:00