Commit Graph

21713 Commits

Author SHA1 Message Date
Xiang Xiao
64ea027b1a Replace PRIxPTR with %p and remove the cast of (uintptr_t)
The cast of (uintptr_t) is not necessary, and it is better to use %p

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-03-07 09:59:42 -03:00
Yanfeng Liu
cc389b1984 riscv/nuttsbi: revise PMP manipulation in NuttX SBI
Current NuttX SBI assumes empty PMP settings but that is not always
true, for example some bootloaders may have PMP entries locked before
handling over to NuttX. This patch revises it by not using hardcoded
PMP region number.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-03-07 09:58:55 -03:00
chenwen@espressif.com
53f50c8183 xtensa/esp32s3: Configure DMA maximum buffer size based on access to different RAM
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-03-07 13:32:28 +08:00
Sammy Tran
b4b7710c63 Disable interrupt during FTFC operation 2024-03-06 13:31:48 -03:00
chenwen@espressif.com
09960c5c7d xtensa/esp32s3: Fix the issue of erasing a wide range of flash sectors
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-03-06 18:13:20 +08:00
Yanfeng Liu
a66c7c3ee1 comments/docs: fix typos in comments
This fix some typos in comments.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-03-06 13:31:50 +08:00
trns1997
54e9e582d5 Use C++ standard lib from toolchain
Signed-off-by: trns1997 <trns1997@gmail.com>
2024-03-06 08:42:44 +08:00
ligd
113ab704c7 goldfish & qemu: handle MMU table and CONFIG_RAM_END
Reproduce:

configure:
./tools/configure.sh qemu-armv7a:nsh -j8
open kasan:
CONFIG_MM_KASAN=y
run:
qemu-system-arm -cpu cortex-a7 -nographic -machine virt,virtualization=off,gic-version=2 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx
error:
run hanged

Rootcause:

In Qemu armv7a, the ram-end reserved for MMU PGTABLE:

And the up_allocate_heap()  directly use the ram-end for heap in arch/arm/src/common/arm_allocateheap.c

*heap_size  = CONFIG_RAM_END - g_idle_topstack;

Then they are conflict.
Usually, we won't use the heap end, so can't find the error.
BUT, the KASAN will use the heap end for shadow, so found the error.

Resolve:

up_allocate_heap() consider of MMU, re-define the RAM_END at chip.h

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-06 09:26:44 +09:00
raiden00pl
a20b3e8335 arch/nrf{52|53|91}/spi: fix error message
wrong parameters were passed to spierr()
2024-03-06 00:50:00 +08:00
Marco Casaroli
73c4f2f1e7 fix(esp32s3_spiflash_mtd): debug type specifiers
These log messages are wrong if we use CONFIG_FS_LARGEFILE.
2024-03-05 22:23:50 +08:00
Michal Lenc
44a087111d samv7: add support for USART TX DMA transfers
This commit adds support for TX DMA transfers for USART peripheral. Code
refactor in sam_serial.h was also required in order to have correct
defines for all possible cases (both RX and TX DMA used, just one used,
none used).

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-03-05 09:48:03 +08:00
Tiago Medicci Serrano
dcad39a962 arch: Fix style warnings regarding included header files
This commit fixes style warnings regarding including header files
outside the `Included Files` section.
2024-03-05 09:45:49 +08:00
Tiago Medicci Serrano
c67502d9b4 riscv: Implement page-fault exception and on-demand paging
When an application is being loaded `up_addrenv_create ` calls
`create_region` to create the address environment. Only the first
entry is mapped when the region is created. Virtual memory that is
not mapped will trigger an exception when accessed. Other memory
pages are allocated and mapped on-demand. This enables setting
larger heap and stack for the process without compromising the
overall system memory.
2024-03-05 09:45:49 +08:00
Tiago Medicci Serrano
ae9ef972c0 paging: Rename existing CONFIG_PAGING to CONFIG_LEGACY_PAGING
Current `CONFIG_PAGING` refers to an experimental implementation
to enable embedded MCUs with some limited RAM space to execute
large programs from some non-random access media.

On-demand paging should be implemented for the kernel mode with
address environment implementation enabled.
2024-03-05 09:45:49 +08:00
SPRESENSE
3b3f2d97e9 arch: cxd56: Follow interface change of set_buf() operation
set_buf() operation is changed to have the argument about
format. Follow the change.
2024-03-04 20:39:44 +08:00
ligd
91f0a0f1a8 Revert "goldfish & qemu: handle MMU table and CONFIG_RAM_END"
This reverts commit 2f7b107608.

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-04 18:08:15 +08:00
ligd
b599fdbc0e stm32: fix compile failed
Error: chip/stm32_sdmmc.c:1911:7: error: variable 'regaddress' is used uninitialized whenever 'if' condition is false [-Werror,-Wsometimes-uninitialized]
 1911 |   if (priv->base == STM32_SDMMC1_BASE)

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-04 18:08:15 +08:00
Yanfeng Liu
a4d61dea80 risc-v/k230: improvements to support K230 vendor u-boot
Previously we need turn off the PMP locks in K230 vendor u-boot to use
NuttX, this complicates the setup process. This patch supports running
NuttX with original vendor u-boot so that to reduce setup complexity.

It also enables empty NSH prompt string in AMP master config as the apps
side support is ready.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-03-03 12:04:14 -03:00
ligd
2f7b107608 goldfish & qemu: handle MMU table and CONFIG_RAM_END
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-03 18:57:32 +08:00
ligd
7d45afe871 armv7-a/r: use _ebss as idle stack both in SMP mode or not
It is better take the _ebss as IDLE_STACK_BASE like armv8-m

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-03 02:25:03 +08:00
p-szafonimateusz
d4b17f963d arch/intel64: add HPET timer support as oneshot timer
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-03 02:24:40 +08:00
ligd
51d8bbfbd9 armv7-a/r: use arm_timer to setup perf
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-03 02:19:37 +08:00
ligd
5aeab4a36c armv7-a timer:fix timer overflow.
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-03 02:19:37 +08:00
ligd
8eddf00212 armv7a/r: use register cval to set timer
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-03 02:19:37 +08:00
ligd
dabed3c7fb armv7-a/r: correct maxdelay calculating
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-03 02:19:37 +08:00
Marco Casaroli
0c50af583d feat(esp32s3-bootloader): allow 32MB flash
The scripts already support, we are just
missing the entry in the config.
2024-03-01 16:51:47 -03:00
Marco Casaroli
447cc9698f use apps-or-nuttx-Make.defs for archs
This will allow apps to tweak build configuration of NuttX
2024-03-01 12:59:16 -03:00
ligd
2241969e5a SMP: fix crash when switch to new task which is still running
cpu0 thread0:                        cpu1:
sched_yield()
nxsched_set_priority()
nxsched_running_setpriority()
nxsched_reprioritize_rtr()
nxsched_add_readytorun()
up_cpu_pause()
                                     IRQ enter
                                     arm64_pause_handler()
                                     enter_critical_section() begin
                                     up_cpu_paused() pick thread0
                                     arm64_restorestate() set thread0 tcb->xcp.regs to CURRENT_REGS
up_switch_context()
  thread0 -> thread1
arm64_syscall()
    case SYS_switch_context
     change thread0 tcb->xcp.regs
    restore_critical_section()
                                     enter_critical_section() done
                                     leave_critical_section()
                                     IRQ leave with restore CURRENT_REGS
                                     ERROR !!!

Reason:
As descript above, cpu0 swith task: thread0 -> thread1, and the
syscall() execute slowly, this time cpu1 pick thread0 to run at
up_cpu_paused(). Then cpu0 syscall execute, cpu1 IRQ leave error.

Resolve:
Move arm64_restorestate() after enter_critical_section() done

This is a continued fix with:
https://github.com/apache/nuttx/pull/6833

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-01 21:05:00 +09:00
Tiago Medicci Serrano
b03c9cf5f8 esp32s3: Fix symbol collision between mbedTLS and the Wi-Fi driver
This commit closes #11738. Actual fix is tracked in:
https://github.com/espressif/esp-hal-3rdparty/pull/2
2024-02-29 20:47:19 +01:00
chao an
6d50274ebe nuttx/list: rename container_of to list_container_of from public header
Use private naming to avoid conflicts with user applications

In file included from libuv/src/unix/internal.h:25,
                 from libuv/src/unix/udp.c:23:
libuv/src/uv-common.h:57: warning: "container_of" redefined
   57 | #define container_of(ptr, type, member) \
      |
In file included from nuttx/include/nuttx/list.h:47,
                 from nuttx/include/nuttx/tls.h:40,
                 from nuttx/include/nuttx/sched.h:48,
                 from nuttx/include/nuttx/arch.h:87,
                 from nuttx/include/nuttx/userspace.h:35,
                 from nuttx/include/nuttx/mm/mm.h:30,
                 from nuttx/include/nuttx/kmalloc.h:34,
                 from nuttx/include/nuttx/lib/lib.h:31,
                 from nuttx/include/stdio.h:35,
                 from apps/system/libuv/libuv/include/uv.h:59,
                 from libuv/src/unix/udp.c:22:
nuttx/include/nuttx/nuttx.h:48: note: this is the location of the previous definition
   48 | #define container_of(ptr, type, member) \
      |

Signed-off-by: chao an <anchao@lixiang.com>
2024-02-29 19:44:54 +08:00
chenwen@espressif.com
1665114fd1 xtensa/esp32: Fix issue of system blocking when SPIRAM is used as stack
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-02-28 13:31:30 +08:00
chenwen@espressif.com
c14888e759 xtensa/esp32s3: Add the return value of SPI driver
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-02-28 13:30:18 +08:00
p-szafonimateusz
4123615621 x86_64: move PCI bus initialization from qemu-intel64 to common x86_64 and initialize PCI in up_initialize()
many PCI devices must be initialized early during boot process (e.g. PCI serial port)

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-27 10:30:54 -03:00
p-szafonimateusz
cdfce8a055 arch/x86_64: add spinlock support
Add spinlock support for x86_64, needed for SMP

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-27 10:27:34 -03:00
chao an
b413a1f4f7 arm/armv8-r: fix build break if disable CONFIG_UART_PL011
Common code should support the if PL011 is not enabled

Signed-off-by: chao an <anchao@lixiang.com>
2024-02-27 21:22:40 +08:00
p-szafonimateusz
b3c4f3afc3 x86_64/common/Toolchain.defs: change optimization to -Os for CONFIG_DEBUG_FULLOPT
change optimization to -Os for CONFIG_DEBUG_FULLOPT to be compatible with other architectures
and add an option to select CONFIG_DEBUG_CUSTOMOPT

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-26 18:18:20 -03:00
p-szafonimateusz
3a3341ba0e arch/intel64: enable FPU and implement up_fpucmp to pass ostest
enable FPU and implement up_fpucmp to pass ostest

With aggressive optimization enabled (-O2/-O3), ostest FPU test will fail.
This is because the compiler will generate additional vector
instructions between subsequent up_fpucmp() calls (loop vectorization
somewhere in usleep() call), which will consequently overwrite
the expected FPU context (XMM registers).

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-26 18:17:37 -03:00
p-szafonimateusz
5288e063ec newlib: fix support for x86
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-26 23:56:47 +08:00
p-szafonimateusz
b14c3e1e2e arch/intel64: add software reset support
This adds a software reset for intel64, enables the use of
the reboot command from NSH
2024-02-26 23:55:14 +08:00
chenwen@espressif.com
638df3329b xtensa/esp32s3: Fix issue of system blocking when SPIRAM is used as stack
1. Fix issue of system blocking due to disable dcache.
   2. Support Ext-SRAM-Cache mmu mapping in SMP mode.

Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-02-26 12:38:30 -03:00
p-szafonimateusz
743bbfcd7e arch/intel64/Kconfig: add chip choice option
this will be useful for auto selecting CPU features
2024-02-26 20:06:35 +08:00
p-szafonimateusz
39c7ae683f arch/x86_64/Kconfig: remove unused QEMU options
boards definition should be in /boards
2024-02-26 20:06:35 +08:00
p-szafonimateusz
5c85b8618c arch/intel64: prase multiboot2 header before revoking the lower memory
__revoke_low_memory() is called in intel64_lowsetup()

fixes b4b96a6435 (PR #11758) in which the multiboot2 header was accessed
after revoking the low memory which caused page fault.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-24 09:21:04 -08:00
p-szafonimateusz
8c4612be50 arch/intel64: add g_ prefix to global data
to follow NuttX coding standard

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-23 18:16:10 -08:00
p-szafonimateusz
8a43bf1b50 arch/intel64: clear BSS in __nxstart
BSS nulling can now be optimized by the compiler, so it is necessary
to enable SSE instructions early in __nxstart

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-23 18:16:10 -08:00
p-szafonimateusz
b4b96a6435 arch/intel64: convert __nxstart to C function and move appropriate functions there
to follow the approach in other architectures

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-23 18:16:10 -08:00
p-szafonimateusz
f76017ca8a arch/intel64: format asm files, remove unused debug macros
use tab at the beginning of lines, remove C++ comments, fix some tabs to spaces

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-23 18:16:10 -08:00
p-szafonimateusz
16e47d6c8b arch/intel64: fix stack alignment
The stack pointer must be aligned to 16 bytes, otherwise the system crash on the first unaligned data access with vector instruction.
The problem is only observable with optimization enabled, when vector instructions are generated.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-02-23 12:04:54 -03:00
p-szafonimateusz
c3d41195c7 arch/intel64/stackframe.c: fix memset size
this is a follow up to the change from 2335b69120 which missed
updating stack frame length for this memset

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-23 12:04:54 -03:00
Michał Łyszczek
aa75b7f27c stm32/stm32f30xxx_rcc.c: fix broken flash setup
During removal of F1 related stuff, code that configures FLASH
latency was removed, which rendered some of the F3 line unbootable.

It was done by mistake, since previous removed block was
'#ifdef VALUE_LINE', and block with FLASH code was '#ifndef VALUE_LINE'
and so it should not have been removed.

Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl>
2024-02-23 06:11:26 +01:00