arch/arm/src/lc823450: Fix up_allocate_heap() in lc823450_allocateheap2.c
For lc823450, heap area in flat build mode must start just after
_eronly. Because bss/data area is allocated in lower address than
text area in SRAM. See ld.scripts for details. Also, this change
removes unsed up_allocateheap.c
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Approved-by: GregoryN <gnutt@nuttx.org>
Pull request for mtd/progmem refactoring.
* mtd/progmem: change up_progmem_npages to up_progmem_neraseblocks
page is a unit for read/write operation.
eraseblock is a unit for erase operation.
up_progmem_npages is a little bit confusing because it returns number of
erase blocks in flash memory. This patch changes up_progmem_npages to
up_progmem_neraseblocks. There is no logical change.
Signed-off-by: EunBong Song <eunb.song@samsung.com>
* mtd/progmem: up_progmem_erasesize.
Change argument name to be more readable.
Signed-off-by: EunBong Song <eunb.song@samsung.com>
* mtd/progmem: up_progmem_eraseblock
Change up_progmem_erasepage to up_progmem_eraseblock.
eraseblock is more readable name than erasepage.
Signed-off-by: EunBong Song <eunb.song@samsung.com>
* mtd/progmem: change up_progmem_eraseblock's return value.
up_progmem_eraseblock erase a block. so it's better to return the erase block
size than page size.
Signed-off-by: EunBong Song <eunb.song@samsung.com>
* arm/cortex-r : fix wrong cp15_flash_dcache.
change mcrne to mcr for unconditional dcache.
Signed-off-by: sungduk.cho <sungduk.cho@samsung.com>
Approved-by: GregoryN <gnutt@nuttx.org>
kinetis:i2c On faild reset re-init i2c and clocking
If a reset fails, we still must reinitializes the
i2c block so that subsequent transfers will not
cause a hardfault due to the clock being off.
If that transfer fails it can try to reset
again.
Approved-by: GregoryN <gnutt@nuttx.org>
arch/arm/src/lpc43xx: Fix ethernet TX_EN pin definitions
TX_EN on LPC43xx can be routed via P0.1 and PC.4 in both
MII and RMII mode.
Before, P0.1 was hardcoded for MII and PC.4 was hardcoded for RMII.
Also, the definitions used inconsistent naming (TXEN vs. TX_EN).
Approved-by: GregoryN <gnutt@nuttx.org>
arch/arm/src/lpc43xx: Make WWDT usable again
LPC43xx WWDT driver was not updated when irq_dispatch grew an argument
flag in b3222bbc8a.
Also fixes two typos and a naming inconsistency (WWDT vs. WWDG).
Approved-by: GregoryN <gnutt@nuttx.org>
Pull request for cortex-r4 codes
* arm/armv7-r: Add general interrupt controller.
This is based on armv7-a gic controller code.
Signed-off-by: EunBong Song <eunb.song@samsung.com>
* arm/armv7-r: add invalidate dcache in arm_head.S
Adding invalidate dcache as a comment in arm_head.S.
Signed-off-by: EunBong Song <eunb.song@samsung.com>
* arm/armv7-r: Fix some wrong configuration of program status register.
PSR_E_BIT bit should be set for big endian system.
PSR_A_BIT bis is set automatically as arm cortex-r4 reference manual 3.7.4.
So we don't need to set this bit.
Signed-off-by: EunBong Song <eunb.song@samsung.com>
* arm/armv7-r: Fix some wrong MPU register definition.
Change MPU_RBAR_ADDR_MASK and MPU_RACR_TEX_SHIFT mask as
arm cortex-r4 reference manual.
Region Base Address Register 0-4 bits are reserved.
MPU Region Access control register type 3-5 bits.
Signed-off-by: EunBong Song <eunb.song@samsung.com>
* driver/mtd: fix compilation error.
This commit fixes below compilation errors.
CC: mtd/smart.c
mtd/smart.c:182:22: error: 'gWearBitToLevelMap4' defined but not used [-Werror=unused-const-variable=]
static const uint8_t gWearBitToLevelMap4[] =
^~~~~~~~~~~~~~~~~~~
mtd/smart.c:170:22: error: 'gWearLevelToBitMap4' defined but not used [-Werror=unused-const-variable=]
static const uint8_t gWearLevelToBitMap4[] =
^~~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
make[1]: *** [smart.o] Error 1
Signed-off-by: Junyeon LEE <junyeon2.lee@samsung.com>
Approved-by: GregoryN <gnutt@nuttx.org>
drivers/serial/uart_16550.c: Add a configuration, analogous to the STM32 configuration option, to suppress the NuttX standard re-ordering for /dev/ttySN for special case of the 16550 UART.
config/serial: UART 16550: Add CONFIG_SERIAL_UART_ARCH_MMIO option so the a memory mapped device doesn't need to provide uart_getreg() and uart_putreg() implementations.
u16550_txempty() should check UART_LSR_TEMT to avoid some data left in the transmit FIFO
kinetis:i2c ensure timeout on bus error
The code had a dead wait on I2C_S_BUSY. Noise on the
bus would cause the driver to hang.
Add timeout on invalid states of I2C_S_BUSY to allow
the upper layers do deal with restart or abort.
Approved-by: GregoryN <gnutt@nuttx.org>
include/nuttx/arch.h: Add prototype for an architecture-specific up_trigger_irq function
arch/, include/nuttx, sched/sched: Add the garbage collection hook so each architecture can do custom memory cleanup if necesary.
arch/Kconfig: Add configureation CONFIG_ARCH_GNU_NO_WEAKFUNCTIONS to suppress use of weak functions. Some gnu derived toolchains do not support weak symbols
Author: Gregory Nutt <gnutt@nuttx.org>
arch/arm/src/kinetis: Cosmetic changes from review of coding standard.
Author: David Sidrane <david_s5@nscdg.com>
Merged in david_s5/nuttx/master_kinetis (pull request #710)
kinetis:Add DMA and use it as RX FIFOs on Serial
* Add initial implementation of the DMA
* Add across Kxx family support [WIP]
* Incorporate the DMA into the serial
Add polling to serial
do DMA initialisation at UART startup and fix DMA mux setting.
Fix circular DMA handling in the serial driver.
* Adapt defconfig to enable UART1,4 RXDMA
* [WIP] - refactor this with new CONFIG DMA settings
* kinetis/Kconfig:Bring inline with upstream stucture
1. Use the Serial console configuration from drivers/serial/Kconfig
and friends.
2. Prefix arch specific featurs as such
UARTx_RXDMA->KINETIS_UARTx_RXDMA
* Kinetis:Serial formatting and clean up
* kinetis:DMA Formating and Cleanup
* kinetis:serial Use cleaner DMA API
* kinetis:Make.defs fix duplicate/errant kinetis_dma.o
* kinetis:serial Fix warning/error on only one uart using DMA
The driver can support no DMA on any UART, DMA on some
UARTs or DMA on all UARTs.
In the case of no DMA we disable the DMA based variables
and logic. In the case of all DMA we disable the non
DMA variables and logic, and in the mixed case both
DMA and non DMA variable and logic are enabled.
* kinetis:dma config fix formatting
* kinetis:chip/dma fix formatting
* kinetis:DMA config assume Unknown
Assume KINETIS_DMA_VERSION_UKN for all SoC not versioned
This is as the code was in nuttx prior to this commit
* kinetis:DMAMUX contain versioning- use HAS pattern define Unknown
The pattern for chip versioning is to define 'HAS' constants.
Define KINETIS_DMAMUX_HAS_MONOTONIC_CHCFG to contain the
version numbers to the include soc header and use that define
in the chip headers.
Define the KINETIS_DMAMUX_VERSION_UKN for the default as prior
this commit addressing was by default monotonic for CHCFG
* freedom-k66f:Disable Serial RXDMA
The application has to add calling of the kinetis
serial dma poll as it is application specific.
Approved-by: GregoryN <gnutt@nuttx.org>
* kinetis:PIT add Liftime and Chaining
* kinetis:flexcan fix dup line and ordering
* kinetis:kinetis_lowput.c LPUART data format with parity fix
The 9-bit data mode is typically used with parity to allow
eight bits of data plus the parity
* kinetis:pindma fix warning
* kinetis:lowputc LPUART_BAUD_INIT has to be defined
build fails with test case enable LPUART0 and make
UART1 console
if HAVE_LPUART_DEVICE is defined then LPUART_BAUD_INIT
has to be defined even if the lpuart is not the console
* kinetis:lpserial fix warning
While this is a good idea and a proper thing to do, it also creates a circular dependency and errors during configuration. RTC depends on STM32_RTC which depends on RTC_EXTERNAL with depends on RTC. No can do.
This reverts commit 714e8c1f9e.
Fix http streaming with lc823450
* arch/arm/src/lc823450: Change C-Buffer under-level control
The under-level setting was changed from 1KB to 55KB.
In previous implementation, the setting can ben changed
by the tx threshold but it is fixed at startup.
Also, check write size and adjust alignment if needed.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* configs/lc823450-xgevk: Change IOB related params for rndis.
Since TCP flow control scheme was changed, HTTP audio streaming
has not been working. These IOB params are not optimized but
HTTP audio streaming now works.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Approved-by: GregoryN <gnutt@nuttx.org>
configs/olimex-stm32-p407: Various changes as necessary to get the new kelf configuration working.
configs/olimex-stm32-p407: Add kernel ELF (kelf) configuration.
This update is required to be serialized to the instruction stream meaning that after this update completes, it takes effect immediately and no exceptions of lower priority than the new boosted priority can pre-empt execution. Because of this erratum, the priority boosting does not take place immediately, allowing the instruction after the MSR to be interrupted by an exception of lower priority than the new boosted priority. This effect is only limited to the next instruction. Subsequent instructions are guaranteed to see the new boosted priority.
This was raised in Bitbucket issue 113 from Vadzim Dambrouski.
Squashed commit of the following:
arch/arm/src/samd5e5/sam_usb.c: USB driver now compiles with some issues.
arch/arm/src/samd5e5/chip/sam_fuses.h: Add fuse definition header file.
arch/arm/src/samd5e5: Bring USB driver in from SAMD2L2.
arch/arm/src/samd5e5/sam_clockconfig.c: Implement DFLL support. This completes coding the the re-architected clock configuration logic.
arch/arm/src/samd5e5/sam_clockconfig.c: Add data structures and definitions to support the FDLL and the DFPLL0/1.
arch/arm/src/samd5e5: Completes GCLK configuration logic. Still FDPLL and FDLL support.
arch/arm/src/samd5e5: A little more GCLK configuratino logic. Still incomplete.
arch/arm/src/smad5e5: Beginning of GCLK configuration logic.
arch/arm/src/samd5e5: Add MCLK configuration logic.
arch/arm/src/samd5e5: Add XOSC0/1 configuration logic.
arch/arm/src/samd5e5: Add XOSC32 configuration logic.
arch/arm/src/samd5e5: Rip out all of the leveraged clock configuration logic and start from scratch.
Squashed commit of the following:
arch/arm/src/samd5e5: Clean-up EIC logic.
arch/arm/src/samd5e5: Fix some compilation issues; Still issues with the EIC logic from samd2x.
arch/arm/src/samd5e5: Fix some compilation issues; bring in some EIC logic from samd2x.
arch/arm/src/samd5e5: Add NVMCTRL header file, fix some compiler problems, misc. clean-up.
configs/metro-m4: Add LED support.
arch/arm/src/samd5e5: Bring in SAML21 clock configuration. This is a WIP; it cannot possible even compile yet.
arch/arm/src/samd5e5: Leverage Cortex-M4 interrupt and SysTick logic from the SAM3/4.
arch/arm/src/samd5e5: Add SERCOM utility function.
arch/arm/src/samd5e5: Bring all SERCOM USART logic from SAMD2L2 to SAMD5E5. This is a brute coy with nothing more than more that name changes and extension from 5 to 7 SERCOMs.
arch/arm/src/samd5e5: Add sam_config.h header file
arch/arm/src/samd5e5/: Add Generic Clock (GCLK) utility functions.
arch/arm/src/samd5e5: Add EVSYS register definition file
arch/arm/src/samd5e5 and configs/metro-m4: Use SERCOM3 for the Arduino serial shield as console.
arch/arm/src/samd5e5/chip: Add SERCOM USART, SPI, I2C master, and slave register defintions header files
arch/arm/src/samd5e5/chip: Add AES, PM, TRNG, and WDT header files.
arch/arm/src/samd5e5/chip: Add pin multiplexing header files.
Various fixes to configuration system; fix metro-m4/nsh defconfig file.
configs/metro-m4: Add initial support for the Adafruit Metro M4 board.
arch/arm/src/samd5e5: Add peripheral clock helpers.
arch/arm/src/samd5e5/chip: Add PAC register definition header file. Fix some errors in the memory map header file.
arch/arm/src/samd5e5: Add chip.h headerf file.
arch/arm/src/samd5e5: Add PORT register definitions and support from SAML21.
arch/arm/include/samd5e5: Add interrupt vector definitions.
arch/arm/src/samd5e5: Add some boilerplate files. Correct some typos.
arch/arm/src/samd5e5/chip/sam_eic.h: Add EIC register definitions.
arch/arm/src/samd5e5/chip: Add OSC32KCTRL and OSCCTRL register definitions.
arch/arm/src/samd5e5/chip: Add GCLK, MCLK, and RSTC header files.
arch/arm/src/samd5e5/chip/sam_cmcc.h: Add CMCC register definitions
arch/arm/src/samd5e5/chip/sam_supc.h: Add SUPC header file.
arch/arm/src/samd5e5: Add start-up logic.
arch/arm/src/samd5e5: Add Make.defs file
arch/arm/src/samd5e5/chip: Add memory map header file.
arch/arm/include/samd5e5: Add chip.h header file.
arch/arm/Kconfig and arch/arm/src/samd5e5/Kconfig: Add configuration logic for the SAMD5x/Ex family.
- Added CRC32 functions for multicast address filtering.
- Do not reset PHY settings when doing an ifup
- Use chip's unique id as the device MAC
- Enable discard enet frames with errors at PHY layer
kinetis:sdhc fix SDIO driver so that DMA works
There were 2 problems. The first was that the interrupt did
test DINT and raise a completion events. But since DINT is
just an indication of DMA completion, TC is a valid way to
determine that the transfer is complete.
The second problem is that Software Reset For DAT Line
SDHC_SYSCTL[RSTD] clears the bits 24-0 in SDHC_PROTO
this looses the wide bus setting DTW
Approved-by: GregoryN <gnutt@nuttx.org>
Squashed commit of the following:
Change all remaining occurrences of SAMDL to SAMD2L2.
configs/: Change all remaining occurrences of SAMDL to SAMD2L2
configs/: Change all occurrences of CONFIG_SAMDL_* to CONFIG_SAMD2L2_*
arch/arm/src and include: Rename all directories from samdl to samd2l2. Change all configuration variable names and other usage from SAMDL to SAMD2L2.
kinetis:USB0 fix interrupt storm on error
The ERROR bit of USBx_ISTAT needed to be cleared once an
error occured.
Approved-by: GregoryN <gnutt@nuttx.org>
Squashed commit of the following:
configs/viewtool-stm32f107: Clean up some compilation errors. Now all builds correctly and is ready for test.
arch/arm/src/stm32: Do not condition building STM32 USB host logic on CONFIG_USBHOST. That then precludes building STM32 platforms with external USB host chips like the MAX3421E. Add an new, STM32-internal variable CONFIG_STM32_USBHOST that does the same job without such side-effects.
configs/viewtool-stm32f107: Add support for MAX3421E USB host.
stm32h7: fix some definitions for uart, add serial driver with FIFO enabled
* stm32h7: stm32_irq.c: extend irqinfo to support H7 family
* stm32h7: fix some definitions for uart, add serial driver with FIFO enabled
Approved-by: GregoryN <gnutt@nuttx.org>
stm32h7
stm32h7: compile with stm32_rcc.c
stm32h7: some PWR definitions
stm32h7: add some RCC defs and change some code style to be more like in other STM ports
stm32h7: basic clocks configuration
Approved-by: GregoryN <gnutt@nuttx.org>
