Commit Graph

18280 Commits

Author SHA1 Message Date
ChenWen
65d7f4bfb3 riscv/esp32c3: Support more country codes 2021-11-04 11:02:05 -03:00
ChenWen
4fc2f6e28c riscv/esp32c3: Support debug log configuration for Wi-Fi library 2021-11-04 11:02:05 -03:00
ChenWen
02968cc124 risc-v/esp32c3: Improve Wi-Fi connection success rate 2021-11-04 11:02:05 -03:00
ChenWen
222ec556d5 riscv/esp32c3: Fix some Wi-Fi issues
1. Fix the issue that Wi-Fi can't connect to some special routers occasionally.
  2. Support Wi-Fi 12/13 channel active scanning by default.
  3. Update Wi-Fi driver code to fix issue of failure to send pkt.
  4. Replace software random with hardware random
  5. Fix Wi-Fi mode start error
2021-11-04 11:02:05 -03:00
chenwen
33031a2813 riscv/esp32c3: Fix the issue of Wi-Fi automatic disconnection 2021-11-04 11:02:05 -03:00
chenwen
afbad5ca9d riscv/esp32c3: Clear station configuration when connection fails or disconnect 2021-11-04 11:02:05 -03:00
Eero Nurkkala
8e43f39141 mpfs: cache: provide L1/L2 cache enablers
E51 may configure the L1 and L2 caches. Once configured,
no reconfiguration is possible after hardware reset is
issued.

L2 is 16-way set associative with write-back policy. The
size 2 MB, from which 1 MB is utilized with the values
provided here. That's a total of 8 ways. The rest of the
L2 is left out for the bootloader usage.

mpfs_enable_cache() first checks the bootloader usage
doesn't overlap with the cache itself, thus providing a
set of functional values.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-11-04 11:00:55 -03:00
Alexander Lunev
60de445ab3 stm32h7 sdmmc: do not enable power saving configuration bit (in SD 4-bit mode) because
the SDIO clock is not enabled when the bus goes to the idle state, that, in turn, breaks
IRQ delivering mechanism over DAT[1]/IRQ SDIO line to the host.
2021-11-03 22:50:14 -05:00
Xiang Xiao
3e967f784e sim: Split SIM_SANITIZE to SIM_ASAN and SIM_UBSAN
align the naming style with MM_ASAN

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-11-02 21:02:43 +01:00
mage1
c82a676630 sim: fix sim runtime err under sanitize check mode.
since gcc sanitize can not stub proper code in nuttx kernel code.
2021-11-02 21:02:43 +01:00
Jani Paalijarvi
a16a9f80e2 mpfs: i2c: Add support for adaptive I2C bus frequency
Select the closest possible frequency which is smaller
than or equal to requested in I2C msg
2021-11-02 04:10:08 -05:00
ligd
2f4662c513 arch/arm: Remove -mcpu for fix warning
warning: switch '-mcpu=cortex-m55' conflicts with '-march=armv8-m.main' switch

Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-11-01 21:28:10 -05:00
ligd
8417b4726b Revert "arch/armv8-m: use -mfpu=auto based on -mcpu=cortex-m55"
This reverts commit d9a5b92c1a306a70df52d50a02a80dc8ef20bf0d.

Revert "arch/arm: Remove -march and -mtune"

This reverts commit b8e99cf12f3a287311a2d341f285c71a5da3e4d4.
2021-11-01 21:28:10 -05:00
Abdelatif Guettouche
860370284e esp32c3_dma: Remove the DMA test included in the driver along with its
defconfig.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-11-01 13:49:59 -05:00
Alexander Vasiljev
aeb1d3098d stm32h7/dmamux: correct bit fields 2021-11-01 14:40:33 -03:00
Abdelatif Guettouche
73f15ed544 esp32/Kconfig: Make ESP32_BT_RESERVE_DRAM default to 0 again if
Bluetooth is not enabled.  When Bluetooth is enbaled then it defaults to
64KB.  This will not wast those 64KB of memory when Bluetooth is not enabled.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-11-01 10:01:38 -05:00
Alexander Lunev
33d236121f stm32h7 sdmmc: added missing sdio_set_sdio_card_isr() function to initialize SDIO in-band interrupt logic 2021-10-31 22:26:13 -05:00
Xiang Xiao
b58379b738 arch/arm: Add l suffix for INT32_C macro
since int32_t typedef to signed long

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-10-31 12:56:41 -03:00
Michal Lenc
a64903acc7 samv7: adds support for QSPI driver in SPI Mode
This commit adds new files that support functionality of QSPI driver in
SPI Master Mode. This functionality is included in new files sam_qspi_spi.x
to avoid too much mess in the source code. QSPI in SPI mode can be turn
on by config option SAMV7_QSPI_SPI_MODE.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2021-10-30 01:24:31 -05:00
yinshengkai
ee17ae5ba1 tool: add code coverage tool 2021-10-29 19:21:23 +02:00
raiden00pl
bb5e3fee44 arch/arm/src/stm32/stm32_foc.c: define missing FOC1_PWM_FZ_BIT for G4 2021-10-29 07:49:59 -05:00
raiden00pl
8e9e54cad3 arch/arm/src/stm32/hardware/stm32_dbgmcu.h: fix invalid STM32_DBGMCU_APB2_FZ offset for G4 2021-10-29 07:49:59 -05:00
Alexander Vasiljev
35e93644cf stm32h7: add low power timers 2021-10-27 10:37:05 -05:00
Jiuzhu Dong
1ed4118378 power/battery: add baterr, batinfo, batwarn for debug log
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-10-26 13:59:42 -03:00
chao.an
b90d094138 arch/sim: add native socket support based on usrsock
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-10-26 08:01:50 -05:00
Gustavo Henrique Nihei
de0e4d4aac xtensa/esp32s2: Rename MTD-related configs to become more intuitive
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 21:45:20 -05:00
Gustavo Henrique Nihei
06bb85d8a5 risc-v/esp32c3: Rename MTD-related configs to become more intuitive
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 21:45:20 -05:00
Gustavo Henrique Nihei
fb00ab3242 xtensa/esp32: Rename MTD-related configs to become more intuitive
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 21:45:20 -05:00
Gustavo Henrique Nihei
eb889b0884 xtensa/esp32s2: Enable Partition Table allocation at custom offset
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 16:34:58 -03:00
Gustavo Henrique Nihei
eb7ffd014e risc-v/esp32c3: Enable Partition Table allocation at custom offset
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 16:34:58 -03:00
Gustavo Henrique Nihei
211f899b62 risc-v/esp32c3: Refactor and reorganize Partition Table related configs
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 16:34:58 -03:00
Gustavo Henrique Nihei
9d7b9821b3 xtensa/esp32: Enable Partition Table allocation at custom offset
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 16:34:58 -03:00
Gustavo Henrique Nihei
b555b3f89e xtensa/esp32: Refactor and reorganize Partition Table related configs
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 16:34:58 -03:00
Gustavo Henrique Nihei
793266d39e espressif: Fix spacing style in Kconfig files
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 08:01:44 -05:00
Gustavo Henrique Nihei
4ff754827c espressif: Fix prompt string of Wi-Fi FS mount point configs
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 08:01:44 -05:00
Gustavo Henrique Nihei
a1af605973 espressif: Fix references to Wi-Fi according to Wi-Fi Alliance
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-25 08:01:44 -05:00
Alan C. Assis
7e8003cba1 Move chip specific file compilation to CHIP_CSRCS 2021-10-23 04:03:12 -05:00
Alan C. Assis
03738622a1 esp32s2: Add RNG driver support and board profile example 2021-10-23 04:03:12 -05:00
David Sidrane
e1a0a1188e stm32h7:Support CONFIG_MPU_RESET and CONFIG_ARM_MPU_EARLY_RESET 2021-10-23 03:58:26 -05:00
David Sidrane
e66423229a stm32f7:Support CONFIG_MPU_RESET and CONFIG_ARM_MPU_EARLY_RESET 2021-10-23 03:58:26 -05:00
David Sidrane
fd2c1cb216 stm32:Support CONFIG_MPU_RESET and CONFIG_ARM_MPU_EARLY_RESET 2021-10-23 03:58:26 -05:00
David Sidrane
9d8f7126f6 armv7-m,armv7-r,armv8-m:MPU Add mpu_reset and ARM_MPU_EARLY_RESET
When NuttX is booted from a foreign (non NuttX)
   bootloader. There as a possibility that the
   bootloader configured the MPU, in an
   incompatible way for the NuttX memory usage.

   The option to reset the MPU before it is initialized
   may not succeed if the bss and data initialization
   code violated the previous MPU configurations.

   Added herein are ARM_MPU_RESET and
   ARM_MPU_EARLY_RESET. The former can be used
   If the system is capable of booting and running
   NuttX MPU configuration code without an MPU
   violation. The latter is used if the system can
   not run the bss and data initialization code.

   These are options so that a NuttX may be configured to
   not clobber a bootloader MPU configuration in a system
   that is architected to share the MPU configuration task.
2021-10-23 03:58:26 -05:00
zhuyanlin
cf1a04d0a2 xtensa:cache: add lock & unlock feature
Since some xtensa cores cache support lock & unlock feature.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-10-22 13:31:32 -03:00
zhuyanlin
b4ea11f7b1 arch:cache: add lock feature for cache
Some architectures support lock & unlock cache feature.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-10-22 13:31:32 -03:00
David Sidrane
90cfa6f313 imxrt:syslog is dependant on arm_lowputc 2021-10-22 10:07:20 -05:00
oreh-a
3c1ac89557 Fixed line length 2021-10-22 09:03:14 -05:00
Alexander Oryshchenko
ed392abb83 Added ARCH_BOARD_STM32F0G0L0_CUSTOM_CLOCKCONFIG option to stm32f0/g0/l0 chip configiuration 2021-10-22 09:03:14 -05:00
Eero Nurkkala
e57f3f7a3a mpfs: emmcsd: provide proper internal emmc settings
So far the SD-card functionality has been tested with
the driver. Now, also the internal eMMC has been tested
working with this patch. This patch applies IOMUX and
clock settings that have been tested working with the
internal eMMC in the Polarfire Icicle kit.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:41:08 -05:00
Eero Nurkkala
c34b9620db mpfs: clockconfig: add clock initialiation sequence
Add clock initialization sequence especially for systems
containing no bootloader.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:40:26 -05:00
Eero Nurkkala
bc72ccdf6a mpfs: Kconfig/Make: add DDR support flag
This adds the proper flag for introducing the DDR
support. Also call the mpfs_ddr_init() at the
proper location.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:40:26 -05:00