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4358 Commits

Author SHA1 Message Date
Gregory Nutt
dec9742df4 SAMV7 Cut'n'paste Errors; CONFIG_SAMV7_XDMAC, not CONFIG_SAMV7_DMAC0/1 2015-09-30 07:02:10 -06:00
Gregory Nutt
7fa4e4daab SAMA5: Fix some SAMA5D3/4 bugs introduced with the SAMA5D2 changes 2015-09-29 16:10:10 -06:00
Gregory Nutt
be3adb678e Change missed in last commit 2015-09-29 13:01:52 -06:00
Gregory Nutt
c88e9538d4 SAMA5Dx: Fix a header file naming collision 2015-09-29 12:49:24 -06:00
Stefan Kolb
51fb4d3252 SAMV7: SPI Slave fixes 2015-09-29 09:13:36 -06:00
Gregory Nutt
2a6c71e850 Costmetic changes from last merge to better conform to the coding standard 2015-09-29 09:06:16 -06:00
pkolesnikov
e6ab9cc339 init hw, draft 2015-09-29 15:53:20 +02:00
Gregory Nutt
cd6b51847b SAMV71: Fix SPI compilation errors when SPI DMA is enabled 2015-09-29 07:31:21 -06:00
Gregory Nutt
473a3cf2a6 STM32: Trivial chnages from review of merge 2015-09-23 15:00:47 -06:00
Pierre-noel Bouteville
53fbd6b4ec Merged nuttx/arch into master 2015-09-23 22:52:37 +02:00
pnb
f19c5e883d add swo for stm32F4xxx 2015-09-23 22:51:22 +02:00
Gregory Nutt
cbdafb96d5 Remove unused function setipsr. Cortex-M IPSR register is not writable 2015-09-23 08:38:32 -06:00
Gregory Nutt
a1cbb7d8fb Correct bad cut-and-paste in STM32 F7 stm32_uart.h. Noted by Vlad Chiorean 2015-09-22 09:02:06 -06:00
Gregory Nutt
139a31b875 stm32f74xx75xx_irq.h: STM32_IRQ_SAI2 is not defined but STM32_IRQ_SAI1 is defined twice. Noted by Vlad Chiorean 2015-09-22 07:45:59 -06:00
Gregory Nutt
7a2428819f Minor style: # if pre-processor command should be in columnn 1 2015-09-18 12:47:24 -06:00
Gregory Nutt
39859a9645 All ARMV7-M: Force 8-byte stack alignment when calling from assembly to C to interrupt handling 2015-09-15 07:37:09 -06:00
Gregory Nutt
f7ca98c5ae Fix error in almost all ARMv7-M interrupt stack handling 2015-09-14 07:07:13 -06:00
Gregory Nutt
f5d015d8a2 Clean up some kruft left in the SAMA5D2 PIO driver 2015-09-13 07:25:45 -06:00
Gregory Nutt
a27e673967 SAMA5D2: Finish implementtion of the PIO driver 2015-09-12 11:36:06 -06:00
Gregory Nutt
ac986987de SAMA5D2: Add PIO driver. Still a work in progress 2015-09-12 09:58:18 -06:00
Gregory Nutt
7c62fcbe96 Rename sam_pio.c to sama5d53x4x_pio.c 2015-09-12 09:14:34 -06:00
Gregory Nutt
114f353224 SAMA5D2: Update matrix header file for the SAMA5D2 2015-09-12 09:02:42 -06:00
Gregory Nutt
94bdeda28e SAMA5D2: Add PIO register definition header file 2015-09-12 08:24:48 -06:00
Gregory Nutt
b8c1f0bfeb SAMA5: Rename chip/sam_pio.h to chip/sama5d3s4x_pio.h 2015-09-12 06:49:37 -06:00
Gregory Nutt
1f745e534b SAMA5D2: Make sure that USART mode is selected for each Flexcom used as a serial device 2015-09-11 18:42:49 -06:00
Gregory Nutt
36eba6ef99 Fix some errors in comments 2015-09-11 18:03:40 -06:00
Gregory Nutt
cc0f1d1f04 SAMA5D: Ooops. Committed wrong version of RXLP header file 2015-09-11 18:01:38 -06:00
Gregory Nutt
7c4428b67e SAMA5D2: Add RXLP register definition header file 2015-09-11 16:11:00 -06:00
Gregory Nutt
972ae84d95 SAMA5D2: Add logic to enable Flexcom clocking and to configure Flexcom pins 2015-09-11 14:54:30 -06:00
Gregory Nutt
b19c3d7cbe SAMA5D2: Add Flexcom UART serial driver 2015-09-11 14:30:19 -06:00
Gregory Nutt
9385a98588 SAMA5D: Move common configuration logic from sam_lowputc.c and sam_serial.c to new sam_config.h. Make room in the architecture for forthcoming Flexcom USARTs 2015-09-11 12:00:30 -06:00
Gregory Nutt
a39b2351f0 SAMA5D2: Add Flexcom register definition header files 2015-09-11 10:40:12 -06:00
Gregory Nutt
f51541dfd6 SAMA5Dx UART: SAMAD4 also has BRSRCCK bit in the MR register 2015-09-11 08:27:18 -06:00
Paul A. Patience
260778feb1 Fix typo 2015-09-10 21:07:03 -04:00
Gregory Nutt
cf7ea3bc3e Updates for SAMA5D2: It has no USARTS 2015-09-10 17:15:52 -06:00
Gregory Nutt
2cdbc17a63 SAMA5: Fix support for varying number of PIO ports 2015-09-10 13:46:57 -06:00
Gregory Nutt
c1b83cfbc8 SAMA5D2: Add pin multiplexing definition file and other necessary changes for the SAMA5D2 2015-09-10 13:07:04 -06:00
Gregory Nutt
7ad8c32adf Trivial spacing change 2015-09-10 12:11:10 -06:00
Ilya Averyanov
0fea56cd8b LPC43xx: Add ehci driver. 2015-09-10 07:23:03 -06:00
Gregory Nutt
87aa1cb83b SAMA5D2: Update PMC definitions; has UART2-4, but not USART0-4 2015-09-09 12:11:45 -06:00
Gregory Nutt
c391ada5e7 SAMA5D2: Update boot logic, AXIMX, SFR, and WDT register definition files for SAMA5D2 2015-09-09 10:00:29 -06:00
Ilya Averyanov
76ab22debf LPC43xx: Fix IRQ Ethernet name 2015-09-09 07:22:02 -06:00
Gregory Nutt
5f54db8c17 Separate memory mapping tables for SAMA5D2, 3, and 4 2015-09-08 16:40:13 -06:00
Gregory Nutt
6e900bc88a Eliminate warning 2015-09-08 13:26:51 -06:00
Gregory Nutt
36f1d84374 Remove some nonfunctional logic that also generates warnings 2015-09-08 13:02:33 -06:00
Gregory Nutt
0f8a416b20 More fixes for warning removal typos 2015-09-08 12:15:29 -06:00
Gregory Nutt
35866ede44 Eliminate warnings 2015-09-08 12:02:35 -06:00
Gregory Nutt
e7c149e545 Yet another rething of the SAMA5 memory mapping definitions 2015-09-08 11:50:30 -06:00
Gregory Nutt
e6aba39805 SAMA5: Correct some memory map logic 2015-09-08 11:35:11 -06:00
Gregory Nutt
2138e16199 Eliminate warnings 2015-09-08 11:08:44 -06:00
Gregory Nutt
2913aac866 Eliminate warnings 2015-09-08 10:20:41 -06:00
Gregory Nutt
e354853776 Elminiate some warnings 2015-09-08 09:18:59 -06:00
Gregory Nutt
d8c83218fe Eliminate warnings 2015-09-08 08:27:34 -06:00
Gregory Nutt
7065f78b92 Eliminate a warning 2015-09-08 08:18:01 -06:00
Gregory Nutt
cfd41bdb30 STM32: Eliminate some warnings 2015-09-07 16:25:54 -06:00
Ilya Averyanov
560613622d EHCI: We not need disable and enable async scheduler when 2015-09-07 13:44:56 -06:00
Ilya Averyanov
8cc83fa6dc EHCI: Fix qh_ioccheck to move bp to next QH 2015-09-07 13:42:39 -06:00
Ilya Averyanov
6799bba3c1 EHCI: Rename asynch_setup to ioc_async_setup 2015-09-07 13:36:52 -06:00
Gregory Nutt
f3af146d44 SAMV7 QSPI: Back out part of last change; byte access are necessary. Correct write to the IAR register 2015-09-06 11:24:43 -06:00
Gregory Nutt
26eada3446 In all up_initialize() functions, automatically initialize TUN driver is so configureded 2015-09-06 09:35:29 -06:00
Gregory Nutt
b30e6a696e SAMV71 QSPI: Add methods to allocate properly aligned memory. 2015-09-06 09:34:51 -06:00
Gregory Nutt
da3c05a898 Minor changes from review of merge 2015-09-06 07:10:21 -06:00
pnb
55dcbb4ca2 efm32 addons missing file 2015-09-06 13:10:41 +02:00
Gregory Nutt
9d5f04cd45 Remove some crap from the SAMA5D2 memory map header file 2015-09-05 12:43:34 -06:00
Gregory Nutt
6488fe469d SAMA5D Kconfig: SAMA5D2 has P310 L2 cache 2015-09-05 12:15:50 -06:00
Gregory Nutt
975d912b40 Cosmetic: Move # of pre-processior command to column 1 2015-09-05 09:07:37 -06:00
Gregory Nutt
2ed09233d3 Changes to conform to coding standard. 2015-09-05 07:50:02 -06:00
Gregory Nutt
60d444cd69 Changes to conform to coding standard. Also, I assume references to STM32 should be EFM32? 2015-09-05 07:33:50 -06:00
Gregory Nutt
e714cd748c Changes to conform to coding standard. Also, I assume references to STM32 should be EFM32? 2015-09-05 07:31:16 -06:00
pnb
1314f60caf start of adc for efm32 2015-09-05 10:51:33 +02:00
Pierre-noel Bouteville
85b1638171 Merged nuttx/arch into master 2015-09-05 10:42:12 +02:00
pnb
c327cce0b8 add bitband support 2015-09-05 10:40:34 +02:00
pnb
c83d533d90 add flash read/write support 2015-09-05 10:37:53 +02:00
pnb
3c35458ac2 fix some I2C problem 2015-09-05 10:22:08 +02:00
pnb
ea596e45d3 add efm32_gpioirqclear 2015-09-05 10:20:24 +02:00
pnb
ed8531a53b GPIO fix bug GPIO_DRIVE_... definition 2015-09-05 10:17:05 +02:00
pnb
9564f878a9 set Gpio drive only if not standard 2015-09-05 10:15:42 +02:00
pnb
fa65bef573 commetic 2015-09-05 10:11:06 +02:00
Gregory Nutt
544ed7cdbd Purely cosmetic changes from code review 2015-09-04 16:36:43 -06:00
Gregory Nutt
804570f831 Merged in david_s5/arch/upstream_stm32_flash (pull request #11) 
Added suport for overriding the STM32 flash size. To allow the use of  STM32F2 and STM32F4 devices with F, G, I flash designations
 2015-09-04 16:25:03 -06:00
David Sidrane
9c13fa3f67 Added suport for overriding the STM32 flash size. To allow the use of STM32F2 and STM32F4 devices with F, G, I flash designations 2015-09-04 10:26:09 -10:00
Gregory Nutt
831272cd35 SAMA5D2: Add memory map file 2015-09-02 13:04:01 -06:00
Gregory Nutt
aff3dbda88 Remove one more unused reference to PCLKSEL 2015-09-02 09:16:04 -06:00
Gregory Nutt
cace0003f2 LPC43: Removed references to non-existent PCOMP and PCLKSEL registers in comments 2015-09-02 09:07:38 -06:00
Ilya Averyanov
f2e1fb7ea2 LPC43xx: Fix build with FPU enabled 2015-09-02 09:03:10 -06:00
Ilya Averyanov
a3bc46f629 LPC43xx: Add Ethernet support. From Ilya Averyanov 2015-09-02 09:01:41 -06:00
Ilya Averyanov
fdfaf9aa09 lpc43xx: Spi make work 2015-09-02 08:31:08 -06:00
Ilya Averyanov
f2b5f05124 STM32 Ethernet: stm32_ifdown() prototyped twice 2015-09-02 08:23:45 -06:00
Gregory Nutt
5a9f1fa3ab Extension memory map inclusion for SAMA5D2 2015-09-02 08:23:44 -06:00
Gregory Nutt
075b66d4bb Eliminate a warning 2015-09-01 13:35:38 -06:00
Gregory Nutt
8c9f7e5ab6 Add peripheral clock macros for the SAMA5D2 2015-09-01 13:08:48 -06:00
Gregory Nutt
f6d8a03b55 Merged in paulpatience/nuttx-arch (pull request #10) 
Correct #if to #ifdef when the macro can be undefined.  Fix bug in AT32UC3 clock initialization:  AVR32_CLOCK_PLL_OSC1 should be AVR32_CLOCK_PLL0_OSC1 and AVR32_CLOCK_PLL1_OSC1.
 2015-09-01 12:31:05 -06:00
Paul A. Patience
a0dc724a5d Correct #if to #ifdef when the macro can be undefined. Fix bug in AT32UC3 clock initialization: AVR32_CLOCK_PLL_OSC1 should be AVR32_CLOCK_PLL0_OSC1 and AVR32_CLOCK_PLL1_OSC1. 2015-09-01 13:47:06 -04:00
Ilya Averyanov
98788063f1 Fix warning in Kconfig file introduced with first SAMA5D2 commit. From Ilya Averyanov. 2015-09-01 11:23:08 -06:00
Gregory Nutt
ed3d6fc7a0 SAMV7 QSPI: Delays need to be in units of nsec, not usec. Default delays should be 0 nsec 2015-09-01 11:16:09 -06:00
Ilya Averyanov
8c52786395 LPC43xx: Fix missing #define in eeprom. From Ilya Averyanov 2015-09-01 08:08:09 -06:00
Ilya Averyanov
675878b360 PC43xx: Fix NVIC_SYSH_PRIORITY_STEP define 2015-09-01 08:06:34 -06:00
Gregory Nutt
c33efa0a60 SAMA5D2: Add chip definitions, PIDs, and IRQ definitions 2015-08-31 15:19:01 -06:00
Gregory Nutt
9ba349f2b8 SAMV71 QSPI: Fix frequency calculation. Need to use ceil() type logic so that requested frequency is not exceeded 2015-08-31 10:18:17 -06:00
Gregory Nutt
4f87a71e6d SAMV7 QSPI: Use of CPHA in mode settings was inverted 2015-08-31 10:05:41 -06:00