Commit Graph

15281 Commits

Author SHA1 Message Date
raiden00pl
66c2d2ecc4 arch/nrf53/Kconfig: move GPIO configuration menu to match nrf52 2023-05-31 22:28:50 +03:00
raiden00pl
5f814b1da8 arch/{nrf52|nrf53}/Kconfig: hide SPI_MASTER options if SPI_MASTER not enabled 2023-05-31 22:28:50 +03:00
raiden00pl
81b0ae064c arch/{nrf52|nrf53}/Kconfig: hide I2C_MASTER options if I2C_MASTER not enabled 2023-05-31 22:28:50 +03:00
raiden00pl
a3b91bc183 arch/{nrf52|nrf53}/Kconfig: hide PWM options if PWM not enabled 2023-05-31 22:28:50 +03:00
raiden00pl
2d56197792 arch/{nrf52|nrf53}: validate if EasyDMA transfer is possible
Add an interface that validate if EasyDMA transfer is possible.
EasyDMA cannot access flash memory which can cause hard to detect silent bugs.
This feature is enabled if CONFIG_DEBUG_FEATURES=y and CONFIG_DEBUG_ASSERTIONS=y.
2023-06-01 00:40:17 +08:00
raiden00pl
b98acb9a44 arch/nrf53: add progmem support 2023-05-31 23:12:21 +08:00
Filipe Cavalcanti
3fea2923d7 arch/arm/src/tiva: start FPU before gpio config 2023-05-31 22:47:55 +08:00
raiden00pl
1facea635b nrf52: add MCUboot support 2023-05-31 10:44:08 +08:00
raiden00pl
20af03b31e arch/{nrf52|nrf53}/usbd: fix IN endpoint completion logic
Confirmation of the IN request must be done immediately after all data has been transferred,
otherwise sending data when more than one request has been added to the queue will
not work properly.
2023-05-27 18:52:16 +08:00
TimJTi
27fb0c76c9 SAMA5D2, improve LCD support 2023-05-27 14:03:51 +08:00
liaoao
db53c7abcf procfs:add armv8-m cpuinfo
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-05-27 03:29:41 +08:00
liaoao
1abe90c7cd procfs:add armv7-r cpuinfo
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-05-27 03:29:41 +08:00
liaoao
5c5d9420af procfs:add armv7-a cpuinfo
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-05-27 03:29:41 +08:00
liaoao
108c47c07b procfs:add armv7-m cpuinfo
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-05-27 03:29:41 +08:00
TimJTi
c12a122663 Add touchscreen calibration IOCTLs, necessary structs, and implement for ATSAMA5D2
CI error
2023-05-26 13:47:41 +08:00
raiden00pl
8b89730e61 arch/nrf53: add QSPI support 2023-05-25 22:41:34 +08:00
raiden00pl
5ff6c8b403 arch/nrf53: add HFCLK192M clock support
The HFCLK192M clock is required for QSPI to work
2023-05-25 22:41:34 +08:00
raiden00pl
8943d528fd arch/nrf52: add an option to configure QSPI sampling delay for RX data
The default RX delay value may not be suitable for high QSPI frequencies
2023-05-25 22:39:16 +08:00
Michael Jung
efa2a95163 Update stm32l562e-dk:nsh
- Update TrustedFirmare-M instructions to latest version of STM32CubeL5
- Increase idle thread stack size to not overflow during system init
- Select ARCH_HAVE_TRUSTZONE for STM32L5
- Set CONFIG_ARCH_TRUSTZONE_NONSECURE for stm32l562e-dk:nsh, since NuttX
  is running in the Non-secure world.

See https://github.com/apache/nuttx/issues/9316

Signed-off-by: Michael Jung <michael.jung@secore.ly>
2023-05-25 16:04:30 +08:00
Peter van der Perk
0cadb0cf83 S32K3XX EMAC MCAST support
Fix compile warning when ioctl is not enabled
2023-05-24 13:08:02 -03:00
raiden00pl
0133831a70 arch/stm32f0l0g0: fix compilation for L0 pinmap 2023-05-24 22:30:45 +08:00
raiden00pl
6d11fe315d arch/nrf53/nrf53_gpiote.c: fix compilation for GPIOTE1 2023-05-24 09:54:55 +08:00
raiden00pl
0117260d8c arch/nrf53: add USBD support
USB device role is now supported for NRF53
2023-05-24 09:54:55 +08:00
hujun5
35b597ec2c arch/all: in smp pthread_cancel occasionally deadlock except for arm64
please reference the issue here for more information:
https://github.com/apache/nuttx/pull/9065

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-05-23 15:48:35 +09:00
Petro Karashchenko
70fd6f1642 arch/arm/samv7: remove alignment check that is not needed
SAMv7 QSPI peripheral does not copy-in/out directly into/from
user provided buffer, but use a dedicated memory that is interfaces
using byte copy. The QSPI command buffer can point to memory with
any alignment

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-05-23 02:52:35 +08:00
TimJTi
672302bd57 SAMA5D2 SPI DMA fix and Performance Enhancements 2023-05-23 01:26:08 +08:00
simbit18
e4ffce3355 Fix Kconfig style
Remove spaces from Kconfig files
2023-05-23 00:03:25 +08:00
simbit18
46e1916a91 arch/arm/src/nrf53/Kconfig: Fix config I2C3 Master
correct config NRF53_I2C3_MASTER ( NRF53_I2C2_MASTER -> NRF53_I2C3_MASTER )
2023-05-22 17:17:50 +02:00
Xiang Xiao
7990f90915 Indent the define statement by two spaces
follow the code style convention

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-21 09:52:08 -03:00
raiden00pl
1de1b8adb7 arch/nrf53: add SPI support 2023-05-20 10:18:49 -07:00
David Sidrane
b4a6c63d47 s32k3xx:edma {s|d}last needs to be total xfer size 2023-05-20 18:32:01 +08:00
David Sidrane
280bf95d8a s32k1xx:edma {s|d}last needs to be total xfer size 2023-05-20 18:32:01 +08:00
David Sidrane
cd92cf4496 kinetis:edma {s|d}last needs to be total xfer size 2023-05-20 18:32:01 +08:00
raiden00pl
3493ea399f arch/nrf53: add I2C support 2023-05-19 21:36:49 -07:00
raiden00pl
22d4a492e4 arch/nrf53: UART0-3, SPI0-3 and TWI0-3 instances share the same interrupt vectors 2023-05-19 21:36:49 -07:00
simbit18
8a124f1a6f arch/arm/src: Fix Kconfig style
Remove spaces from Kconfig files
2023-05-19 21:18:51 +08:00
simbit18
5d0bbf20f7 arch/arm/src/imxrt/Kconfig: Fix Kconfig style
Remove spaces from Kconfig files
2023-05-19 21:18:51 +08:00
simbit18
09fcec8fae arch/arm/src/stm32f7/Kconfig: Fix Kconfig style
Remove spaces from Kconfig files
2023-05-19 21:18:51 +08:00
simbit18
fe8289bbc0 arch/arm/src/gd32f4/Kconfig: Fix texts GD32F4_TIMER0_CH3O
correct  GD32F4_TIMER0_CHANNEL2 -> GD32F4_TIMER0_CHANNEL3
fix texts
Remove spaces from Kconfig files
2023-05-19 21:18:51 +08:00
zhangyuan21
3b074b153b arch/armv8-m: add ARMV8M_TRUSTZONE_HYBRID feature
Some chips only have one core that supports secure in smp mode,
so need change EXC_RETURN to non-secure when switching to a core that
does not support secure.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-19 11:55:18 +08:00
jturnsek
ba411fb53d Wrong dlastsga or slast setting if doff or soff larger than one 2023-05-19 10:23:29 +08:00
jturnsek
8976ded08a Base address missing from imxrt_flexio_get_shifter_buffer_address returned address 2023-05-19 10:23:19 +08:00
Petro Karashchenko
e85afaf6cf arch/arm/src/cxd56xx: fix style issues
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-05-19 02:40:38 +08:00
simbit18
c2779e5171 arch\arm\src\lpc54xx\Kconfig: Fix indentation
Remove TABs
2023-05-18 15:43:22 +03:00
simbit18
0b97979378 arch/arm/src/stm32h7/stm32_usbhost.c: Fix nxstyle errors
error: Long line found
2023-05-18 20:14:45 +08:00
zhangyuan21
3d47505ec7 arch/arm: Add a "cc" flag to instructions that may modify condition flag.
Notify the compiler that the condition flag has changed to prevent the
compiler from optimizing and reordering instructions, which may cause exceptions.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-18 17:23:16 +08:00
zhangyuan21
150680d677 arch/arm: set arm_testset to weak function
Some chips require the implementation of
their own unique test set function.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-18 13:46:27 +08:00
Xiang Xiao
7dc0d70092 arch: Save sigdeliver into xcp in the case of signal self delevery
to avoid the infinite recusive dispatch:
*0  myhandler (signo=27, info=0xf3e38b9c, context=0x0) at ltp/testcases/open_posix_testsuite/conformance/interfaces/sigqueue/7-1.c:39
*1  0x58f1c39e in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:167
*2  0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*3  0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049334) at signal/sig_dispatch.c:115
*4  0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049334) at signal/sig_dispatch.c:435
*5  0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*6  0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*7  0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*8  0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049304) at signal/sig_dispatch.c:115
*9  0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049304) at signal/sig_dispatch.c:435
*10 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*11 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*12 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*13 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf40492d4) at signal/sig_dispatch.c:115
*14 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf40492d4) at signal/sig_dispatch.c:435
*15 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*16 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*17 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*18 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf40492a4) at signal/sig_dispatch.c:115
*19 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf40492a4) at signal/sig_dispatch.c:435
*20 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*21 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*22 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*23 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049274) at signal/sig_dispatch.c:115
*24 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049274) at signal/sig_dispatch.c:435
*25 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*26 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*27 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*28 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049244) at signal/sig_dispatch.c:115
*29 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049244) at signal/sig_dispatch.c:435
*30 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*31 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-17 11:53:18 -06:00
Xiang Xiao
7a8cf7ff70 Indent the include statement by two spaces
follow the coding style

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-16 12:34:32 -03:00
Lwazi Dube
555506a584 arch/arm/sama5: Make EHCI work with slow devices.
Make low/full speed devices work with EHCI while OHCI is disabled. A
high speed USB hub has to be plugged into the root hub. This change
will also allow the optional use of a full speed hub between the
high speed hub and the low/full speed device. A recursive mutex is
used to avoid deadlocks.
2023-05-16 08:14:54 +02:00