sergiotarxz/nuttx
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33 Commits

Author SHA1 Message Date
chao.an
7b9978883c arch/arm: optimize context switch speed 
The current context save implementation saves registers of each task
to xcp context, which is unnecessary because most of the arm registers are
already saved in the task stack, this commit replace the xcp context with
stack context to improve context switching performance and reduce the tcb
space occupation of tcb instance.

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-03-15 23:03:51 +09:00
Xiang Xiao
0c7517e579 arch: Remove the duplicated syscall.h in each arch 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-27 22:54:13 +08:00
Xiang Xiao
25213c42a5 arch/arm: Remove the empty spinlock.h file 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-25 09:18:53 +09:00
chao.an
0a8d951837 arch/arm: correct the frame pointer register declare 
In AArch32, the frame pointer is stored in register R11 for ARM code or register R7 for Thumb code.
In AArch64, the frame pointer is stored in register X29.

Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-08-19 01:26:07 -07:00
Alin Jerpelea
c39339a7a8 arch: arm: include: nxstyle fixes 
nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-03-22 19:28:38 -07:00
Alin Jerpelea
4daa276903 arch: arm: include: Author Gregory Nutt: update licenses to Apache 
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-03-22 19:28:38 -07:00
Xiang Xiao
335ba21657 arch/arm: Fix syscall number out of swi range in thumb mode 
The immediate number is 8bits in thumb mode:
+---------------------+---------------+
|15 14 13 12 11 10 9 8|7 6 5 4 3 2 1 0|
+---------------------+---------------+
| 1  1  0  1  1  1 1 1|      imm8     |
+---------------------+---------------+

The immediate number is 24bits in arm mode:
+-----------+-------------------------------------------------------------------------+
|31 30 29 28|27 26 25 24|23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0|
+-----------+-----------+-------------------------------------------------------------+
|   cond    | 1  1  1  1|                                imm24                        |
+-----------+-----------+-------------------------------------------------------------+

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I62503cdc377fcee81864e88e981d389bce2e1b45
 2021-03-17 14:52:58 -03:00
Gustavo Henrique Nihei
330eff36d7 sourcefiles: Fix relative path in file header 2021-03-09 23:18:28 +08:00
Nathan Hartman
679b4fbee2 arch: Fix included directed -> included directly 
This typo had been copied and pasted into numerous irq and syscall
headers.
 2020-04-05 22:31:15 +01:00
Xiang Xiao
68951e8d72 Remove exra whitespace from files (#189) 
* Remove multiple newlines at the end of files
* Remove the whitespace from the end of lines
 2020-01-31 09:24:49 -06:00
Gregory Nutt
abf6965c24 Squashed commit of the following: 
libs/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    syscall/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    wireless/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    Documentation/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    include/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    drivers/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    sched/:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    configs:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/xtensa:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/z80:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/x86:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/renesas and arch/risc-v:  Remove references to CONFIG_DISABLE_SIGNALS.  Signals can no longer be disabled.
    arch/or1k:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/misoc:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/mips:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/avr:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
    arch/arm:  Remove all references to CONFIG_DISABLE_SIGNALS.  Signals are always enabled.
 2019-04-29 14:52:05 -06:00
Gregory Nutt
b1001b4e50 Update TODO list regarding non-queuing of signal actions; Add comments in code at areas where the issue applies. 2019-02-04 08:35:03 -06:00
Xiang Xiao
9f408e9937 arch/arm/src/include/xxx/syscall.h: Align semi-hosting call style with other syscalls 2019-01-26 07:40:47 -06:00
Gregory Nutt
0001607f71 arch/arm: (1) Add semihost support for syslog, (2) Add semihost support for HostFS 2018-08-23 08:00:07 -06:00
Gregory Nutt
9222f50e1c arch/: Make sure the up_irq_enable() is available on all architectures. I will not be able to test all of these new versions of this function so this may break things for awhile. 2018-06-06 09:25:40 -06:00
Gregory Nutt
6ff6da083f Fix a few compile related issues from the last commit 2016-11-26 12:23:09 -06:00
Gregory Nutt
aae306e942 i.MX6 SMP: Inter-CPU data no saved in a non-cacheable region. 2016-11-26 12:04:02 -06:00
Gregory Nutt
83bc1c97c3 Rename irqsave() and irqrestore() to up_irq_save() and up_irq_restore() 2016-02-14 16:11:25 -06:00
Gregory Nutt
36726b1bc4 Standardize the width of all comment boxes in header files 2015-10-02 17:42:29 -06:00
Gregory Nutt
29136e51cc Clean up and review of header files for conformance to standards 2015-06-12 19:26:01 -06:00
Gregory Nutt
ae15c6963c Make some file section headers more consistent with standard 2015-04-08 08:04:12 -06:00
Gregory Nutt
db69d94935 Fix ARM7/9 and Cortex-A SYSCALLs: For threads in SVC mode, the SVC instructions clobbers R14. This must be taken account in the inline assembly 2014-08-29 10:07:11 -06:00
Gregory Nutt
91313feac2 NSH cmp command by Andrew Twidgell 2013-07-18 08:24:29 -06:00
patacongo
36df84c843 Email address change in nuttx/ 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5145 42af7a65-404d-4744-a932-0658087f49c3
 2012-09-13 18:32:24 +00:00
patacongo
85981d6db6 Integrate syscall with existing svcall logic 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3472 42af7a65-404d-4744-a932-0658087f49c3
 2011-04-06 15:04:57 +00:00
patacongo
8627074067 Add more syscall files 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3436 42af7a65-404d-4744-a932-0658087f49c3
 2011-03-29 12:35:11 +00:00
patacongo
0ee42c3f9e Moving toward system call infrastructure 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3435 42af7a65-404d-4744-a932-0658087f49c3
 2011-03-29 00:07:02 +00:00
patacongo
3f4da59045 Basic page allocation logic 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2874 42af7a65-404d-4744-a932-0658087f49c3
 2010-08-21 19:17:39 +00:00
patacongo
f2ca6424cc First cut at data abort page handling logic 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2862 42af7a65-404d-4744-a932-0658087f49c3
 2010-08-17 15:41:09 +00:00
patacongo
9615972da7 Add on-demand paging support to ARM9 prefetch abort handler 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2860 42af7a65-404d-4744-a932-0658087f49c3
 2010-08-17 01:37:39 +00:00
patacongo
c23f8334c8 Changing NuttX fixed size type names to C99 standard names -- things will be broken for awhile 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2359 42af7a65-404d-4744-a932-0658087f49c3
 2009-12-16 20:05:51 +00:00
patacongo
a36541d67d Integrate PIC support into context switching 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1900 42af7a65-404d-4744-a932-0658087f49c3
 2009-06-17 23:38:05 +00:00
patacongo
c8095344f4 Move ARM and Cortex header files to separate directories 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1796 42af7a65-404d-4744-a932-0658087f49c3
 2009-05-19 17:31:58 +00:00