Gregory Nutt
|
aa51df493a
|
STM32 DMA Priority: Select the correct default for F1 and other family members
|
2013-10-18 14:13:53 -06:00 |
|
Gregory Nutt
|
d72a99bc64
|
SAMA5 LCD: Move framebuffers to center of free memory region. That creates a guard band around the framebuffers that gives a little protection from any bad writes into the framebuffer
|
2013-10-18 10:11:20 -06:00 |
|
Gregory Nutt
|
46bf97abfc
|
Add SDIO preflight method
|
2013-10-18 08:15:09 -06:00 |
|
Gregory Nutt
|
944e0fe81d
|
Changes to stm32_dmacapable interfaces from Mike Smith
|
2013-10-18 08:06:23 -06:00 |
|
Gregory Nutt
|
973d11f625
|
STM32 DMA priority corrections from Mike Smith
|
2013-10-18 07:37:24 -06:00 |
|
Gregory Nutt
|
2b70abad0d
|
Typo fixes for UART7 and UART8 DMA configs. From Mike Smith
|
2013-10-18 07:17:55 -06:00 |
|
Gregory Nutt
|
1143b537c2
|
SAMA5 TSD: Fix to prohibit reading samples when not valid
|
2013-10-17 17:26:06 -06:00 |
|
Gregory Nutt
|
d71289dd43
|
STM32 F103C: Correct some errors in pinmapping. From David Sidrane
|
2013-10-16 07:26:41 -06:00 |
|
Gregory Nutt
|
87d8d3a7d5
|
Misc changes to README files; Update SAMA5D3x-EK NxWM configuration to use Calibration instruction messages
|
2013-10-14 14:53:38 -06:00 |
|
Gregory Nutt
|
fa71c8211c
|
SAMA5 LCDC: Correct how framebuffer memory was being mapped; Remove options to get framebuffer memory in various. Because of the mapping and aligment requirements, those options really cannot be supported
|
2013-10-13 13:08:05 -06:00 |
|
Gregory Nutt
|
3cfe4c2113
|
SAMA5 LCDC: Move framebuffer to lower memory; I suspect some corruption by interference
|
2013-10-13 10:42:14 -06:00 |
|
Gregory Nutt
|
02f7c5d8d5
|
SAMA5 LCDC: Fixed backlight PWM divider. Backlight no longer flashes
|
2013-10-11 17:12:35 -06:00 |
|
Gregory Nutt
|
e9187d3199
|
SAMA5 LCDC: Wait when the LCDC is resynchronizing (SIF); Try start-up parameters from Barebox (this still don't work)
|
2013-10-10 18:44:08 -06:00 |
|
Gregory Nutt
|
de5ae1a584
|
SAMA5 LCDC: Default resolution if now RGB565; Add option to select a different output resolution than the sofware resolution (needs to the 24BPP for this LCD).
|
2013-10-10 18:41:42 -06:00 |
|
Gregory Nutt
|
b641545f93
|
SAMA5 LCDC: Move DMA descriptors out of internal SRAM and into SDRAM. I am not completely clear, but it looks like the LCDC cannot support DMA from internal SRAM
|
2013-10-10 12:02:41 -06:00 |
|
Gregory Nutt
|
0a81f51502
|
SAMA5: Allow portions of external memory to be added to the heap instead of the whole thing
|
2013-10-10 12:00:32 -06:00 |
|
Gregory Nutt
|
8ae85daf3d
|
SAMA5 LCDC: Fix a few compilation errors that show up when additional layers are enabled
|
2013-10-09 18:46:05 -06:00 |
|
Gregory Nutt
|
03ebf1cf4a
|
SAMA5 LCDC: Few more bug fixes but still not working
|
2013-10-09 18:22:21 -06:00 |
|
Gregory Nutt
|
ff64ccb539
|
SAMA5 LCDC: Corrections from first debug sessions. Still a way to go
|
2013-10-09 13:21:27 -06:00 |
|
Gregory Nutt
|
f8397f8238
|
SAMA5: LCDC driver incorporated into the build system.
|
2013-10-08 15:30:38 -06:00 |
|
Gregory Nutt
|
1807a662a8
|
SAMA5: LCD driver is code complete but untested
|
2013-10-08 12:16:30 -06:00 |
|
Gregory Nutt
|
0907691978
|
SAMA5: More LCDC driver progress
|
2013-10-08 08:57:48 -06:00 |
|
Gregory Nutt
|
8238ea7477
|
SAMA5: More LCDC driver progress
|
2013-10-07 15:54:08 -06:00 |
|
Gregory Nutt
|
ed980b51f7
|
SAMA5: LCDC driver progress
|
2013-10-07 12:05:16 -06:00 |
|
Gregory Nutt
|
d3fa588250
|
SAMA5 LCDC: Add 'skeleton' files that will eventually become an LCDC driver for the SAMA5
|
2013-10-06 09:08:52 -06:00 |
|
Gregory Nutt
|
3325c192f5
|
SAMA5: Completes LDCDC register definition file
|
2013-10-04 15:43:19 -06:00 |
|
Gregory Nutt
|
d7426cd34d
|
SAMA5: Add LCD register definition header file
|
2013-10-04 10:11:12 -06:00 |
|
Gregory Nutt
|
a8951de086
|
SAMA5: Touchscreen driver now works
|
2013-10-04 08:03:38 -06:00 |
|
Gregory Nutt
|
6ca0850605
|
SAMA5: First changes from touchscreen debug
|
2013-10-03 17:11:30 -06:00 |
|
Gregory Nutt
|
9d6bfb5238
|
SAMA5: ADC and touchscreen drivers now build without errors
|
2013-10-03 14:32:21 -06:00 |
|
Gregory Nutt
|
a4123ed6d5
|
SAMA5: Integrate touchscreen and ADC drivers into the build
|
2013-10-03 12:49:13 -06:00 |
|
Gregory Nutt
|
6c8d7f2184
|
SAMA5 ADC and touchscreen: Drivers are code complete and ready for test
|
2013-10-03 10:06:14 -06:00 |
|
Gregory Nutt
|
97a4ecb306
|
SAMA Touchscreen/ADC: More progress
|
2013-10-02 16:55:22 -06:00 |
|
Gregory Nutt
|
fee65851ca
|
Add framework for Spark Core board support. The initial commit is a clone of the Maple Mini and still needs Spark customizations
|
2013-10-02 08:24:46 -06:00 |
|
Gregory Nutt
|
e92ed407aa
|
SAMA5 ADC/Touchscreen: A little more logic
|
2013-10-01 14:40:34 -06:00 |
|
Gregory Nutt
|
efb1695c0c
|
KL: Now builds up_puts
|
2013-10-01 11:51:27 -06:00 |
|
Gregory Nutt
|
9a634c882d
|
KL: Missing header file in low level getc logic
|
2013-10-01 11:25:01 -06:00 |
|
Gregory Nutt
|
a737c93ea2
|
SAMA5 touchscreen and ADC: A little more progress
|
2013-10-01 11:23:24 -06:00 |
|
Gregory Nutt
|
4cecf0b618
|
SAMA5 ADC/Touchscreen: A little more progress. Still not complete
|
2013-09-30 14:28:42 -06:00 |
|
Gregory Nutt
|
50123bd30f
|
Add freedom-kl25z/minnsh configuration: This is an experiment to see just how small we and get an NSH configuration. From Alan Carvalho de Assis.
|
2013-09-30 09:20:11 -06:00 |
|
Gregory Nutt
|
0a1a68b77a
|
KL25Z: Add low-level up_lowgetc function that can be used to provide an NSH console when the file system (and hence the serial driver) is disabled. From Alan Carvalho de Assis
|
2013-09-30 09:15:31 -06:00 |
|
Gregory Nutt
|
3e09f94985
|
KL25Z: Add low-level up_lowgetc function that can be used to provide an NSH console when the file system (and hence the serial driver) is disabled. From Alan Carvalho de Assis
|
2013-09-30 09:11:54 -06:00 |
|
Gregory Nutt
|
744f3776b7
|
SAMA5: Framework for an touchscreen driver (incomplete)
|
2013-09-30 09:04:21 -06:00 |
|
Gregory Nutt
|
ecd7502c34
|
SAMA5 ADC: Framework for an ADC driver (incomplete)
|
2013-09-30 07:22:34 -06:00 |
|
Gregory Nutt
|
0e02d2b7b4
|
SAMA5 ADC: Beginning ADC register definition file
|
2013-09-29 18:34:09 -06:00 |
|
Gregory Nutt
|
54b1275de9
|
Work around a start-up error in the GMAC that I still do not understand
|
2013-09-29 16:46:22 -06:00 |
|
Gregory Nutt
|
7ee6ded1c2
|
SAMA5 GMAC: Various fixes from initial debug
|
2013-09-29 15:03:57 -06:00 |
|
Gregory Nutt
|
c038f4efe0
|
Dependency generation fix for directories that keep object files in a sub-directory
|
2013-09-29 11:46:10 -06:00 |
|
Gregory Nutt
|
417f67c132
|
Clean up some naming: fd vs. fildes vs. filedes and filep vs filp
|
2013-09-28 16:50:07 -06:00 |
|
Gregory Nutt
|
7b9b7cbdec
|
configs/compal_e88 converted to use the kconfig-frontends tools
|
2013-09-27 16:12:44 -06:00 |
|
Gregory Nutt
|
f7e4f25760
|
SAMA5 GMAC and GMII support is code complete and ready for test
|
2013-09-27 13:12:04 -06:00 |
|
Gregory Nutt
|
cdb56b81b8
|
Networking: Fix backward conditional in test to see if address is in ARP table. From Max Holtzberg
|
2013-09-27 08:27:35 -06:00 |
|
Gregory Nutt
|
e4af9572d0
|
Beginng of support for GMII/RGMII PHYs
|
2013-09-26 15:55:21 -06:00 |
|
Gregory Nutt
|
d417ff6460
|
SAMA5 GMAC: Initial driver check-in is just the EMAC driver forced to compile with the GMAC register definitions
|
2013-09-26 10:35:52 -06:00 |
|
Gregory Nutt
|
3c4f9926c9
|
SAMA5: Completes GMAC register definition header file
|
2013-09-26 09:13:14 -06:00 |
|
Gregory Nutt
|
bbccd73dd0
|
SAMA5 EMAC: Need to pace RX and TX because and RX can result in a TX; Process TX interrupt events before TX interrupt events for the same reason
|
2013-09-25 14:22:35 -06:00 |
|
Gregory Nutt
|
4a99a9e2e3
|
SAMA5 EMAC: Add some need D-Cache Flush/Invalidate operations. Add support for CONFIG_NET_DUMPPACKET
|
2013-09-25 11:51:49 -06:00 |
|
Gregory Nutt
|
d3daad87f1
|
Move CONFIG_NET_DUMPPACKET from LPC17 and STM32 to commong network drivers. Automatically enabled CONFIG_NETDEVICES when any Ethernet driver is enabled
|
2013-09-25 11:50:31 -06:00 |
|
Gregory Nutt
|
22fe508443
|
Move CONFIG_NET_DUMPPACKET from LPC17 and STM32 to commong network drivers. Automatically enabled CONFIG_NETDEVICES when any Ethernet driver is enabled
|
2013-09-25 11:50:05 -06:00 |
|
Gregory Nutt
|
788d1623ae
|
Fix badly applied patch to ENCX24J600
|
2013-09-25 08:26:56 -06:00 |
|
Gregory Nutt
|
9a9fc90794
|
SAMA5 UDPHS: Dont' reject read request submissions while stalled. That causes an infinite loop. When stalling, cancel all pending write requests, but cancel only a reqd request if it is in progress. It will be immediately requeued
|
2013-09-24 15:06:17 -06:00 |
|
Gregory Nutt
|
446ced4799
|
Comment out assertion that apparently fires inappropriately
|
2013-09-24 15:01:25 -06:00 |
|
Gregory Nutt
|
2de3781ebf
|
Slightly improved debug output
|
2013-09-24 13:47:03 -06:00 |
|
Gregory Nutt
|
5d192f72e3
|
Stack monitor fixes
|
2013-09-24 12:14:52 -06:00 |
|
Gregory Nutt
|
7affa54e7e
|
Standardize stack checking interface
|
2013-09-24 11:45:13 -06:00 |
|
Gregory Nutt
|
9bb771b8b8
|
SAMA5 UDPHS: Minor clean-up of STALL logic
|
2013-09-23 18:10:41 -06:00 |
|
Gregory Nutt
|
c68c0cb268
|
SAMA5 HSMCI: Disable TX DMA. it is not reliable
|
2013-09-23 13:54:32 -06:00 |
|
Gregory Nutt
|
a1220e3440
|
SAMA5 HSMCI DMA clean-up. There are still some issues
|
2013-09-23 11:25:39 -06:00 |
|
Gregory Nutt
|
773a693ee2
|
Cosmetic changes to comments and coding style fixes
|
2013-09-22 14:48:22 -06:00 |
|
Gregory Nutt
|
8a1e33cb10
|
Un-neccesary, cosmetic changes to label names and comments
|
2013-09-22 08:54:06 -06:00 |
|
Gregory Nutt
|
3ceac07042
|
SAMA5 OHCI: Back out a change, the real root cause was a bug in the cache logic so the hack is no longer necessary
|
2013-09-22 07:53:51 -06:00 |
|
Gregory Nutt
|
9cb23c5ccb
|
ARMv7-A: Fix some error in alignment to cache line boundaries in the cache operations
|
2013-09-21 15:47:00 -06:00 |
|
Gregory Nutt
|
d31d809bbf
|
SAMA5 OHCI: Fix some strange Dcache problems that I still don't understand; end address on cache operations is end+1, not end
|
2013-09-21 12:21:10 -06:00 |
|
Gregory Nutt
|
c900c580ae
|
ARMv7-A: Clarify end address paramet in cache operations: It is the end+1 address, not the end address
|
2013-09-21 12:16:34 -06:00 |
|
Gregory Nutt
|
34804c8ee7
|
SAMA5 OHCI: Fix some problems with D-Cache coherency and physical addressing related to interrupt endpoints
|
2013-09-20 15:22:09 -06:00 |
|
Gregory Nutt
|
dbf07d6d01
|
SAMA5 OHCI: When UPLL drives OHCI the logically correct divider of 10 does not work; But a divider of 5 does. Why?
|
2013-09-19 16:10:46 -06:00 |
|
Gregory Nutt
|
92617fade5
|
SAMA5 EHCI: Fix bits being clobbered in PORTSC on hand-off to OHCI. OHCI: Fix some more trace configuration issues. Both: Don't muck with SFR port selection bits once they have been initialized
|
2013-09-19 10:52:33 -06:00 |
|
Gregory Nutt
|
1600e02962
|
More USB host trace conditional compilation problems
|
2013-09-19 09:08:55 -06:00 |
|
Gregory Nutt
|
ac3dfce614
|
Fix inconsistency in USB host tracing definitions
|
2013-09-19 08:46:33 -06:00 |
|
Gregory Nutt
|
0c62e5797e
|
SAMA5: Add support for the FPU OS test
|
2013-09-18 10:35:03 -06:00 |
|
Gregory Nutt
|
8f88387712
|
LPC17xx SPI: Remove an unused static prototype that caused a compile time warning
|
2013-09-17 17:14:08 -06:00 |
|
Gregory Nutt
|
14ac82c11c
|
SAMA5 EMAC: Changes from early debug sessions. Still a way to go
|
2013-09-17 15:52:19 -06:00 |
|
Gregory Nutt
|
226839692d
|
SAMA5 EMAC: Resolve issues with DUAL PHY support needed for both EMAC and GMAC peripherals. EMAC driver is now code complete and builds without complaint
|
2013-09-17 10:55:13 -06:00 |
|
Gregory Nutt
|
e7479e9b9d
|
Add prefex ETH0 to all PHY configurations to support multiple NICs
|
2013-09-17 10:45:07 -06:00 |
|
Gregory Nutt
|
b06216ff11
|
SAMA4 EMAC: Remove some editor garbage that ended up in the last commit
|
2013-09-16 18:04:38 -06:00 |
|
Gregory Nutt
|
7ef1bd2f4c
|
SAMA5 EMAC: Add basic PHY logic
|
2013-09-16 18:00:21 -06:00 |
|
Gregory Nutt
|
50fd028680
|
SAMA5 EMAC: Packet transmission logic
|
2013-09-16 14:58:11 -06:00 |
|
Gregory Nutt
|
09e6c653cc
|
SAMA4 EMAC: Add basic interrupt handling logic
|
2013-09-16 13:57:57 -06:00 |
|
Gregory Nutt
|
9d59d5ef13
|
SAMA5 EMAC: Incremental progress. Still not code complete
|
2013-09-16 11:36:12 -06:00 |
|
Gregory Nutt
|
af61f846f9
|
Freescale Kinetis KL25Z PIT and TPM module register definitions
|
2013-09-15 17:00:50 -06:00 |
|
Gregory Nutt
|
285f5201dc
|
SAMA4 EMAC buffer allocation logic
|
2013-09-15 14:26:25 -06:00 |
|
Gregory Nutt
|
ed7c7a25e7
|
SAMA5 Ethernet: Add support for PHY interrupts
|
2013-09-15 12:24:42 -06:00 |
|
Gregory Nutt
|
58dad361b8
|
SAMA5: Update Ethernet initalization logic to handle both EMAC and GMAC
|
2013-09-14 08:19:36 -06:00 |
|
Gregory Nutt
|
14b3417a85
|
SAMA5 EMAC: Create a empty, skeleton file that will eventually become the SAMA5 EMAC driver
|
2013-09-13 15:04:46 -06:00 |
|
Gregory Nutt
|
50f482f902
|
STM32: Support for the LeafLabs Maple and Maple Mini boards. From Librae
|
2013-09-13 12:45:33 -06:00 |
|
Gregory Nutt
|
b5bdde09cc
|
STM32 Kconfig: Fix STM32 UART7/8 kconfig names and UART DMA. Provided by Lorenz Meier
|
2013-09-13 11:45:32 -06:00 |
|
Gregory Nutt
|
b5254cc5af
|
Make filter register accessible for CAN1 and CAN2. Provided by Lorenz Meier
|
2013-09-13 11:20:10 -06:00 |
|
Gregory Nutt
|
7e33cee02f
|
SAMA5 EMAC and GMAC: More additions to register definition files
|
2013-09-13 03:35:56 -06:00 |
|
Gregory Nutt
|
f2f40f35bd
|
SAMA5: Beginning of EMAC and GMAC register definition header files
|
2013-09-12 15:45:12 -06:00 |
|
Gregory Nutt
|
c839aa84ca
|
SAMA5D3x-EK README update
|
2013-09-12 14:17:56 -06:00 |
|
Gregory Nutt
|
4e0c905d61
|
SAMA5 TWI: Misc improvements during debug (still not getting interupts)
|
2013-09-12 12:25:31 -06:00 |
|
Gregory Nutt
|
0330eea54d
|
SAMA5 TWI: Cleanup compilation errors that occur when I2C debug is enabled
|
2013-09-12 09:46:20 -06:00 |
|
Gregory Nutt
|
b3194bd5e5
|
SAMA5 TWI: Add support for I2C readwrite and transfer methods
|
2013-09-11 17:52:23 -06:00 |
|
Gregory Nutt
|
b5eed8c9cb
|
SAMA5: Barebones TWI driver implementation
|
2013-09-11 16:48:56 -06:00 |
|
Gregory Nutt
|
382a066eae
|
SAMA5: Framework for a TWI driver (incomplete)
|
2013-09-11 12:28:52 -06:00 |
|
Gregory Nutt
|
e49069b92b
|
SAMA5: TWI register definition file
|
2013-09-11 10:23:46 -06:00 |
|
Gregory Nutt
|
7391afb5c2
|
SAMA5D3x-EK demo configuration now supports HSMCI0 and HSMCI1
|
2013-09-11 09:50:36 -06:00 |
|
Gregory Nutt
|
462dd6936c
|
Clean-up a few USB trace formats
|
2013-09-10 16:17:06 -06:00 |
|
Gregory Nutt
|
990d3a65a4
|
SAMA5: Add tracing support to the OHCI driver
|
2013-09-10 16:01:44 -06:00 |
|
Gregory Nutt
|
89c829d1ae
|
SAMA5 EHCI: Did not work with DEBUG off. Appears to be because of some D-Cache flushing that was performed only with DEBUG ON. Now is unconditional
|
2013-09-10 10:12:51 -06:00 |
|
Gregory Nutt
|
c6bf25bca0
|
Extent the the USB host trace logic to include verbose debug output
|
2013-09-09 17:27:21 -06:00 |
|
Gregory Nutt
|
3ba64b0cfe
|
USB monitor extended so that it can also be used with USB host trace data
|
2013-09-09 15:02:33 -06:00 |
|
Gregory Nutt
|
fbd5ab0758
|
Beginning of support for USB host side tracing
|
2013-09-09 14:01:52 -06:00 |
|
Gregory Nutt
|
a992004b0e
|
USB MSC host class driver: Don't bother retrying to initialize the FLASH if the interface is returning fatal transfer errors
|
2013-09-09 10:00:16 -06:00 |
|
Gregory Nutt
|
40f84dfa19
|
Trivial updates assocaited with USB host mass storage and SAMA5 EHCI
|
2013-09-08 13:42:56 -06:00 |
|
Gregory Nutt
|
59f6aeefd2
|
SAMA5: Add support EHCI/OHCI to sama5d3x-ek/demo (does not work yet); Fix some EHCI/OHCI compilation issues when DEBUG is disabled
|
2013-09-07 11:43:06 -06:00 |
|
Gregory Nutt
|
e30cb1d470
|
SAMA5D3x-EK: Add a new 'demo' configuration
|
2013-09-06 11:40:46 -06:00 |
|
Gregory Nutt
|
fb37248343
|
CDC/ACM and PL2303 device drivers: Don't use the max packet size assigned to an endpoint in order to determine the request buffer size. The endpoint has not yet been configured that max packet size may be wrong.
|
2013-09-05 18:00:16 -06:00 |
|
Gregory Nutt
|
6dae945fb0
|
SAMA5 UDPHS: Fix bad setup for sam_req_write call introduce in last commit
|
2013-09-05 15:51:27 -06:00 |
|
Gregory Nutt
|
d0923ee830
|
SAMA5 UDPHS: Major changes to DMA interrupt and request handling to better handle DMA
|
2013-09-05 14:33:27 -06:00 |
|
Gregory Nutt
|
4377b4f5e8
|
SAMA5 UDPHS: Fix DMA channel vs. matching endpoint
|
2013-09-04 15:08:19 -06:00 |
|
Gregory Nutt
|
8c64ca58b2
|
SAMA5 UDPHS: More USB fixes mostly related to byte counts, endpoint configuration, and dma configuration
|
2013-09-04 13:36:52 -06:00 |
|
Gregory Nutt
|
a478b680a3
|
SAMA5 UDPHS: More zero length packet fixes; revamped request queue structures
|
2013-09-04 09:48:08 -06:00 |
|
Gregory Nutt
|
a9a8801472
|
SAMA5 UDPHS: Fixes related to null packet and SETUP OUT data handling
|
2013-09-03 19:13:34 -06:00 |
|
Gregory Nutt
|
d294826cfd
|
SAMA5 UDPHS: Small change to zero length packet handling
|
2013-09-03 16:24:11 -06:00 |
|
Gregory Nutt
|
10da3662e4
|
SAMA5 UDPHS: Fix some issues with TX interrupt handling
|
2013-09-03 14:53:10 -06:00 |
|
Gregory Nutt
|
43a62c63d9
|
SAMA5 UDPHS: A little debugging progress. Not all transfers are working yet
|
2013-09-03 13:09:50 -06:00 |
|
Gregory Nutt
|
84439348df
|
SAMA5 UDPHS: Changes from initial debug session. Still a long way to go
|
2013-09-02 16:59:07 -06:00 |
|
Gregory Nutt
|
37579db920
|
SAMA5 UDPHS: Fixes related to soft connect pullup and DMA buffer allocation
|
2013-09-02 14:55:33 -06:00 |
|
Gregory Nutt
|
c162cca9e8
|
SAMA5 UDPHS: Some very early debug corrections. Not yet working.
|
2013-09-02 12:26:15 -06:00 |
|
Gregory Nutt
|
742e89783b
|
SAMA5 UDPHS: Add logic to handle deferred address setting; add logic to handle EP0 SETUP OUT data
|
2013-09-02 10:08:18 -06:00 |
|
Gregory Nutt
|
393b44f059
|
STM32 Timer Register Bit Definitions: Some CCER bit settings changed per SourceForge bug #18 submitted by CCCTSAO
|
2013-09-02 08:01:09 -06:00 |
|
Gregory Nutt
|
387795ecdf
|
SAMA5 UDPHS: Clean up some write request handling
|
2013-09-01 16:56:22 -06:00 |
|
Gregory Nutt
|
66b5ed14d5
|
SAMA5 UDPHS: Resolve a few of easier REVISIT pre-processor warnings
|
2013-09-01 15:36:17 -06:00 |
|
Gregory Nutt
|
8587026c18
|
SAMA5 UPPHS: Fix a small mountain of compilation errors. Still things to REVISIT so it is not ready for test
|
2013-09-01 11:31:12 -06:00 |
|
Gregory Nutt
|
5c950889cf
|
SAMA5 UDPHS: Support USPHS clock configuration
|
2013-09-01 11:29:51 -06:00 |
|
Gregory Nutt
|
f4c1568c17
|
SAMA UDPHS: Add pull-up and stall logic. Added to build system but does not yet build
|
2013-08-31 17:37:51 -06:00 |
|
Gregory Nutt
|
9d2f55ca97
|
SAMA5 UDPHS: Add endpoint configuration and read DMA logic
|
2013-08-31 12:20:00 -06:00 |
|
Gregory Nutt
|
8df66532ce
|
SAMA5 UDPHS: Bring in UDPHS endpoint interrupt handling logic
|
2013-08-31 10:43:58 -06:00 |
|
Gregory Nutt
|
4a9748dfdf
|
SAMA5 UDPHS: Write DMA logic added. Still incomplete
|
2013-08-30 15:41:06 -06:00 |
|
Gregory Nutt
|
6548308982
|
SAMA5: Updated UDPHS driver. Still incomplete
|
2013-08-30 14:51:41 -06:00 |
|
Gregory Nutt
|
024da6049d
|
SAMA5 UDPHS interrupt decoding logic
|
2013-08-29 18:11:34 -06:00 |
|
Gregory Nutt
|
8c92beb70e
|
SAMA5 UDPHS interrupt decoding logic
|
2013-08-29 17:34:05 -06:00 |
|
Gregory Nutt
|
3b1323a74b
|
SAMA5: Initial framework for a UDPHS USB device side driver
|
2013-08-29 16:29:27 -06:00 |
|
Gregory Nutt
|
be88385911
|
SAMA5: Add high-speed USB register definition header file
|
2013-08-28 17:50:05 -06:00 |
|
Gregory Nutt
|
e862d5d197
|
SAMA5 EHCI: Implemented (but did not test) interrupt endpoint logic
|
2013-08-28 13:07:35 -06:00 |
|
Gregory Nutt
|
1ab10a20bd
|
SAMA5 EHCI: Correct and extend pool allocation logic; Fix data toggle values
|
2013-08-28 10:03:48 -06:00 |
|
Gregory Nutt
|
beb58c2520
|
SAMA5: Fixes a bug in the way that the heap regions were being allocated
|
2013-08-27 16:43:19 -06:00 |
|
Gregory Nutt
|
a3af5b3aaf
|
SAMA5 OHCI+EHCI: Using cp15_clean instead of cp15_coherent; EHCI: Need to set alt pointer in order to handle short transfers.
|
2013-08-27 13:07:21 -06:00 |
|
Gregory Nutt
|
bc46b447dc
|
Fix all occurrences of "the the" in documentation and comments
|
2013-08-27 09:40:19 -06:00 |
|
Gregory Nutt
|
c5802dd5a0
|
Add hooks to select Cortex-A8
|
2013-08-27 08:46:37 -06:00 |
|
Gregory Nutt
|
18126a5fd4
|
SAMA4 EHCI: Correct some backward conditional compilation; fix some warnings
|
2013-08-26 17:03:52 -06:00 |
|
Gregory Nutt
|
12beaf4b1a
|
Add a new method to the USB host driver interface: getdevinfo. This method will return information about the currently connected device. At present, it only returns the device speed. The speed is needed by the enumeration logic in order to set a credible initial EP0 max packet size
|
2013-08-26 15:46:16 -06:00 |
|
Gregory Nutt
|
8130f5bd64
|
SAMA5 EHCI: Status phase is the opposite direction as the data phase
|
2013-08-26 14:28:13 -06:00 |
|
Gregory Nutt
|
40525cedcd
|
SAMA5 EHCI: Taking direction from wrong bit in SETUP request; need to flush data buffer before starting SETUP request
|
2013-08-26 11:05:23 -06:00 |
|
Gregory Nutt
|
03ad60426d
|
#17 Fix if CONFIG_SDIO_BLOCKSETUP defined, OS will crash. From CCTSAO
|
2013-08-26 08:54:46 -06:00 |
|
Gregory Nutt
|
b3df0c1037
|
SAMA5 EHCI: Data toggle and status phase fixes
|
2013-08-25 14:45:08 -06:00 |
|
Gregory Nutt
|
bea6894bd7
|
EHCI reset bit was not being set correctly
|
2013-08-25 10:46:41 -06:00 |
|
Gregory Nutt
|
f1a20f49ff
|
SAMA5 OHCI: Fix semaphore handling bug. OHCI is now function by itself again after changes to integrate with EHCI
|
2013-08-25 08:57:35 -06:00 |
|
Gregory Nutt
|
042abb0856
|
SAMA5 OHCI: Fix backward conditional compilation. Clean-up OHCI/EHCI debug output
|
2013-08-25 08:30:21 -06:00 |
|
Gregory Nutt
|
0582148cfd
|
SAMA5D3x-EK: Fix some backward conditional compilation
|
2013-08-24 14:06:47 -06:00 |
|
Gregory Nutt
|
5f78f6998f
|
SAMA5: OHCI various bugfixes for interrupt handling
|
2013-08-24 13:03:15 -06:00 |
|
Gregory Nutt
|
cd84d1bec4
|
SAMA5: EHCI now handles low- and full-speed connections by giving them to OHCI; OHCI now uses the work queue to defer interrupt processing; If both OHCI and EHCI are enabled, EHCI is the master of the UHPHS interrupt
|
2013-08-24 11:34:24 -06:00 |
|
Gregory Nutt
|
9d0f504340
|
SAMA5 EHCI: Added logic to detect port speed. Handling is insufficient
|
2013-08-24 07:36:05 -06:00 |
|
Gregory Nutt
|
2d5313a931
|
Fix #endif with missing #if condition. Reported by Andrew Bradford
|
2013-08-23 16:40:30 -06:00 |
|
Gregory Nutt
|
7c5f8c86ce
|
SAMA5/ECHI: Debug register access, add logic to determine transfer size, fix setting of control bit in token
|
2013-08-23 16:23:15 -06:00 |
|
Gregory Nutt
|
db1b3c421b
|
SourceForge bug #16 Fix IO pin map. Add CONFIG_SERIAL_TERMIOS support. From CCTSAO
|
2013-08-23 11:48:53 -06:00 |
|
Gregory Nutt
|
bdc7d0523d
|
SAMA5 EHCI: cosmetic changes
|
2013-08-23 11:26:17 -06:00 |
|
Gregory Nutt
|
9a109ba4ba
|
SAMA5: Add support for sharing ports when both OHCI and EHCI are enabled
|
2013-08-23 10:58:30 -06:00 |
|
Gregory Nutt
|
2b3fd9e9c3
|
SAMA5 EHCI: Fix some list traversal bugs
|
2013-08-22 19:32:24 -06:00 |
|
Gregory Nutt
|
eef0f392ec
|
SAMA5 EHCI: Initial debug changes
|
2013-08-22 17:25:00 -06:00 |
|
Gregory Nutt
|
f356586fd3
|
SAMA5 EHCI: No complete for bulk and control endpoints
|
2013-08-22 13:36:16 -06:00 |
|
Gregory Nutt
|
577b19920e
|
SAMA5 EHCI: Add data transfer logic for asynchronous endpoints
|
2013-08-22 10:27:46 -06:00 |
|
Gregory Nutt
|
c1c5e195ce
|
SAMA5 EHCI: Add IOC error handling
|
2013-08-22 09:23:01 -06:00 |
|
Gregory Nutt
|
7e9832f955
|
SAMA5 EHCI: transfer termination logic. Incomplete
|
2013-08-21 17:08:12 -06:00 |
|
Gregory Nutt
|
a5eb830544
|
SAMA5 EHCI: Hardware initialization logic
|
2013-08-21 13:45:54 -06:00 |
|
Gregory Nutt
|
b1864a995e
|
Move all SAMA5 EHCI interrupt handling to the worker thread
|
2013-08-21 11:07:42 -06:00 |
|
Gregory Nutt
|
85aa2c1a8d
|
SAMA5 EHCI: At list-oriented cache operations
|
2013-08-20 18:06:04 -06:00 |
|
Gregory Nutt
|
0f2ce573e4
|
Add SAMA5 EHCI list traversal logic
|
2013-08-20 17:01:30 -06:00 |
|
Gregory Nutt
|
320a2e2a0a
|
Beginning of support for SAMA5 EHCI. Not much there yet
|
2013-08-20 15:46:36 -06:00 |
|
Gregory Nutt
|
e3a76b2e64
|
Add kernel/user memalign functions. Not fully integrated
|
2013-08-20 13:04:49 -06:00 |
|
Gregory Nutt
|
b04ea3efa6
|
SAMA5 OHCI+EHCI mostly cosmetic changes
|
2013-08-19 15:03:14 -06:00 |
|
Gregory Nutt
|
19d7c90d4e
|
USB host: Add device address management support in preparation for USB hub support
|
2013-08-18 14:31:57 -06:00 |
|
Gregory Nutt
|
0524688c71
|
Add few more EHCI definitions
|
2013-08-18 13:01:13 -06:00 |
|
Gregory Nutt
|
dc07d65e14
|
STM32 F1 I2C: Fix a typo that crept in with some recent changes. From Yiran Liao
|
2013-08-18 07:45:14 -06:00 |
|
Gregory Nutt
|
e2f68ac85f
|
Add EHCI header file (not quite complete)
|
2013-08-17 14:19:18 -06:00 |
|
Gregory Nutt
|
11086f34d0
|
SAMA5 OHCI: Driver is now basically functional
|
2013-08-16 13:13:21 -06:00 |
|
Gregory Nutt
|
1fb80e0917
|
SAMA5 OHCI: Re-organize some endpoint list data structures.. Strange things happen when semaphores lie in DMA memory which is occasionally invalidated
|
2013-08-16 11:36:51 -06:00 |
|
Gregory Nutt
|
10daf06976
|
STM32 SPI: nbits interface extended to handle LSB- or MSB-first operation. From Teemu Pirinen
|
2013-08-16 11:35:22 -06:00 |
|
Gregory Nutt
|
ca739ce76d
|
SAMA5 OHCI: Don't prealloc RH port TDs and EDs. Allocate from a free list like other cases
|
2013-08-15 17:15:08 -06:00 |
|
Gregory Nutt
|
7f733b0472
|
SAMA5 OHCI: Fix errors in cache handling; Don't add ED to control list until port is connected
|
2013-08-15 15:28:27 -06:00 |
|
Gregory Nutt
|
0098c9ec5f
|
SAMA5: ports should not be reset state (seems to make no difference)
|
2013-08-14 17:33:31 -06:00 |
|
Gregory Nutt
|
fe73fe2e23
|
SAMA5: Alternatie clock configuration that yields a perfect 48MHz full speed USB clock and a CPU clock of 384MHz
|
2013-08-14 15:16:04 -06:00 |
|
Gregory Nutt
|
79d5239023
|
SAMA5 OHCI: Use physical address and flush and/or invalidate data caches as necessary
|
2013-08-14 12:23:06 -06:00 |
|
Gregory Nutt
|
16ac25fd09
|
Clean up some LP17xx and STM32 USB host configuration compilation errors due to the massive changes to the USB host interfaces needed to support the SAMA5
|
2013-08-13 17:43:19 -06:00 |
|
Gregory Nutt
|
3f4b90cc3b
|
SAMA5: Major restructuring of the the OHCI driver drivers to better handle the multiple root hub ports and concureent transfers on each port.
|
2013-08-13 16:48:14 -06:00 |
|
Gregory Nutt
|
1700d06d89
|
Separate wait() and enumerate() methods from struct usbhost_driver_s and move to new interface, struct usbhost_connection_s. This is part of the necessary restructuring of the USB host interface to support multiple root hub ports.
|
2013-08-13 15:03:46 -06:00 |
|
Gregory Nutt
|
a65ac5bc72
|
Back out most of the changes of 3b04d08043742b9e65cf38d45988b35bff91daed
|
2013-08-13 14:12:27 -06:00 |
|
Gregory Nutt
|
b575450a04
|
Separate SAMA5 OHCI interrupt handling into separate functions
|
2013-08-13 13:34:35 -06:00 |
|
Gregory Nutt
|
ad258cb3b7
|
SAMA5 OHCI: Fix some erors in the loop that waits for device connection changes
|
2013-08-13 09:44:16 -06:00 |
|
Gregory Nutt
|
9220a748bd
|
Fix re-entry problem in SAMA5 up_putc
|
2013-08-13 09:42:40 -06:00 |
|
Gregory Nutt
|
1ec49f08b4
|
STM32 F3 fixes from John Wharington
|
2013-08-13 07:48:18 -06:00 |
|
Gregory Nutt
|
120a3604c9
|
More changes to USB host interface to support multiple downstream ports
|
2013-08-12 16:29:33 -06:00 |
|
Gregory Nutt
|
e09bd50fdd
|
First of several changes needed to support multiple USB host root hubs
|
2013-08-12 14:44:06 -06:00 |
|
Gregory Nutt
|
0da218483d
|
SAMA5: Add logic to control VBUS power for OHCI
|
2013-08-12 11:59:10 -06:00 |
|
Gregory Nutt
|
ed49812d2c
|
Add untested OHCI driver for the SAMA5; structure naming and header files for USB host initialization prototypes
|
2013-08-11 17:11:32 -06:00 |
|
Gregory Nutt
|
dd3c682443
|
SAMA5: Some improvements to the HSCMI card removal/insertion logic
|
2013-08-11 11:13:11 -06:00 |
|
Gregory Nutt
|
d6264c2c1f
|
Add CAN configuration to STM32 config menu
|
2013-08-10 19:37:35 -06:00 |
|
Gregory Nutt
|
054468d151
|
STM32: Fix STM32 serial init for non-reordered serial ports. From Lorenz Meier
|
2013-08-10 19:33:16 -06:00 |
|
Gregory Nutt
|
544185c683
|
Added option to disable STM32 serial port re-ordering
|
2013-08-10 19:29:44 -06:00 |
|
Gregory Nutt
|
da4cebf572
|
SAMA5: Fix HSMCI race condition. Now memory card interface is functional with DMA
|
2013-08-10 18:01:23 -06:00 |
|
Gregory Nutt
|
968b2553cd
|
Rearrange configuration settings so that ARCH_HAVE_SDIO is moved to higher, sharable level
|
2013-08-10 09:06:53 -06:00 |
|
Gregory Nutt
|
c5e66ae051
|
Extend the virtual-to-physical address conversion logic to handle NFS SRM, UDPH SRAM, and external SRAM and PSRAM.
|
2013-08-09 17:55:27 -06:00 |
|
Gregory Nutt
|
efabe4aaff
|
SAMA5: Centralize logic for conversion between physical and virtual addresses
|
2013-08-09 17:25:53 -06:00 |
|
Gregory Nutt
|
619cd66f33
|
Fix some cache-related issues with the SAMA5 DMA driver
|
2013-08-09 15:25:13 -06:00 |
|
Gregory Nutt
|
628f50ba61
|
SAM3,4,A5 DMA fixes; SAMA5 SPI driver now supports DMA transfers
|
2013-08-09 13:12:16 -06:00 |
|
Gregory Nutt
|
417636e1de
|
SAMA5: Use RDR/TDR registers for DMA, not FIFO registers; change DMA bit settings to match Atmel example. Still no DMA
|
2013-08-08 15:51:16 -06:00 |
|
Gregory Nutt
|
83cbd61c8c
|
SAMA5 DMA: Need to flush caches; DMA channel depends upon direction of DMA; the maximum transfer size in bytes depends on the number of bytes per transfer
|
2013-08-08 13:15:52 -06:00 |
|
Gregory Nutt
|
9d81d4727c
|
More SAMA5 DMAC driver fixes. Still does not work.
|
2013-08-07 17:19:48 -06:00 |
|
Gregory Nutt
|
2df1d56a01
|
SAMA3,4,A5: Misc corrections to DMA and HSMCI drivers
|
2013-08-07 11:32:08 -06:00 |
|
Gregory Nutt
|
bfaf64e54e
|
Fix SAM bug: Parmaters reversed in DMA function call
|
2013-08-06 15:47:09 -06:00 |
|
Gregory Nutt
|
b0e8231fa3
|
SAM3,4,A5 DMAC driver fixes
|
2013-08-06 13:27:48 -06:00 |
|
Gregory Nutt
|
6a429e675f
|
SAM3,4,A5: Fix some masked status checks that can generate false error reports
|
2013-08-06 12:36:56 -06:00 |
|
Gregory Nutt
|
ce9eb71495
|
SAMA5: A few early, easy bug fixes. The rest will all be difficult
|
2013-08-06 11:29:53 -06:00 |
|
Gregory Nutt
|
fa011d9aca
|
SAMA5: Add PIO interrupt support. Massive name changes for consistency in PIO vs GPIO naming. SAMA5D3x-EK: Add support for SD card detection PIO interrupts
|
2013-08-06 10:20:17 -06:00 |
|
Gregory Nutt
|
369bf26b20
|
SAMA5: Add HSMCI memory card driver support
|
2013-08-05 16:21:24 -06:00 |
|
Gregory Nutt
|
8c88dcd0c7
|
SAMA5: SPI Driver + AT25 FLASH work; SAM3/4: Correct an error, SPI will not be correctly configured if CONFIG_SPI_OWNBUS=n
|
2013-08-05 10:29:43 -06:00 |
|
Gregory Nutt
|
cbe8c5ed56
|
SAMA5: Add logic to auto-mount a file system on AT25 SPI FLASH for NSH
|
2013-08-05 08:24:39 -06:00 |
|
Gregory Nutt
|
906506c61c
|
SAMA5D3x-EK: At support for the AT25 serial FLASH
|
2013-08-04 16:56:41 -06:00 |
|
Gregory Nutt
|
1060b232e9
|
SAMA5: Add register level debug option for SPI
|
2013-08-04 14:45:24 -06:00 |
|
Gregory Nutt
|
83af194db1
|
SAMA5: SPI driver now supports both SPI0 and SPI1
|
2013-08-04 12:50:20 -06:00 |
|
Gregory Nutt
|
163ec613b1
|
SAMA5: Add basic SPI suppport (untested)
|
2013-08-04 11:08:20 -06:00 |
|
Gregory Nutt
|
1ea55fc2a7
|
SAMA5: Add DMA suppport (untested)
|
2013-08-04 10:44:18 -06:00 |
|
Gregory Nutt
|
5cdc3db214
|
SAMA5: Add DMA controller register definitions
|
2013-08-03 12:13:42 -06:00 |
|
Gregory Nutt
|
6422792f57
|
Standard configuration variables used to enable interupt controller debug; SAMA5: Correct handling of spurious interrupts
|
2013-08-03 08:22:37 -06:00 |
|
Gregory Nutt
|
3c404ea742
|
Various changes to get SAMA5 SDRAM working. Marginally functional, but there is more to be done
|
2013-08-02 18:30:27 -06:00 |
|
Gregory Nutt
|
3ee10f0f08
|
Correct some typos int he MPADDRCS register address definitions
|
2013-08-02 12:06:11 -06:00 |
|
Gregory Nutt
|
2feb83a2f8
|
SAMA5: More MMU-related changes to properly initialize SDRAM
|
2013-08-02 11:11:57 -06:00 |
|
Gregory Nutt
|
2ac9669a87
|
SAMA5: Add logic to initialize SAMA5D3x-EK on-board SDRAM
|
2013-08-01 16:58:55 -06:00 |
|
Gregory Nutt
|
8b8fe4d073
|
SAMA5: Add DDR controller register definitions
|
2013-08-01 12:27:41 -06:00 |
|
Gregory Nutt
|
b148465beb
|
ARMv7-A: Map all of .text, .bss, .data., stacks before enabling the MMU and caching. This is simpler and avoids fears I have about caching
|
2013-08-01 10:05:33 -06:00 |
|
Gregory Nutt
|
f2195a16b2
|
ARMv7-A: Separate CONFIG_PAGING start-up logic into a different startup file. Too much conditional compilation.
|
2013-08-01 07:41:00 -06:00 |
|
Gregory Nutt
|
ffdd034c35
|
SAMA5: Add an NSH configuration of the SAMA5D3x-EK board
|
2013-07-31 10:46:13 -06:00 |
|
Gregory Nutt
|
7dfef5e22e
|
SAMA5: Modification of some CPSR-related inline functions
|
2013-07-31 09:11:24 -06:00 |
|
Gregory Nutt
|
fde3777e9e
|
Fix Cortex-A CPSR register field definition
|
2013-07-30 19:05:24 -06:00 |
|
Gregory Nutt
|
bfa1a9545b
|
SAMA5: Change mapping of vector tables to work around that fact that I don't understand how the AXI MATRIX remap works
|
2013-07-30 16:19:52 -06:00 |
|
Gregory Nutt
|
8bfdf70766
|
ARMv7-A: Add cp15_disable_dcache(); SAMA5: nor_main.c no disables MMU and caches; Should not remap ISRAM to address 0x0 unless we booted into ISRAM
|
2013-07-30 13:20:33 -06:00 |
|
Gregory Nutt
|
c4c222ca3a
|
More DAC changes from John Wharington
|
2013-07-30 11:41:53 -06:00 |
|
Gregory Nutt
|
2c6b370c4a
|
Add ARMv7-A irqdisable() inline function
|
2013-07-30 11:37:09 -06:00 |
|
Gregory Nutt
|
5a94767c52
|
STM32 F3 I2C driver from John Wharington
|
2013-07-30 10:35:17 -06:00 |
|
Gregory Nutt
|
b57f54fbd0
|
STM32 DAC DMA fixes from John Wharington
|
2013-07-30 08:54:32 -06:00 |
|
Gregory Nutt
|
413aba0bf5
|
SAMA5: More cache and mmu inline utility functions
|
2013-07-29 19:57:15 -06:00 |
|
Gregory Nutt
|
36b1cd0a6b
|
SAMA5: Separate cache operations into separate files
|
2013-07-29 18:38:02 -06:00 |
|
Gregory Nutt
|
5351598323
|
Changes to ARMv7-A boot logic to handle the case where we execute out of NOR FLASH
|
2013-07-29 17:54:56 -06:00 |
|
Gregory Nutt
|
f96c6793b9
|
Add SAMA5 HSMC register definitions and logic to reconfigure the NOR FLASH
|
2013-07-29 10:56:21 -06:00 |
|
Gregory Nutt
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4ba648aaae
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SAMA5: Add file structure to support board-specific initialization of NOR flash
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2013-07-29 07:41:53 -06:00 |
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Gregory Nutt
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9a94a3707c
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SAMA5: The ostest configuration have been converted to run out of NOR flash. There is more to be done, however
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2013-07-28 15:07:35 -06:00 |
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Gregory Nutt
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7dc8dd4b50
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SAMA5: Correct a clock configuration bug; clarify some MMU memory types
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2013-07-28 12:44:06 -06:00 |
|
Gregory Nutt
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263678e05b
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SAMA5: Correct vector mapping
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2013-07-28 09:44:11 -06:00 |
|
Gregory Nutt
|
f0e3011fc3
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Removed unused ARMv7-A cache function
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2013-07-27 14:03:02 -06:00 |
|
Gregory Nutt
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efa21b82bc
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SAMA5: Fix heap allocation bugs
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2013-07-27 11:28:31 -06:00 |
|
Gregory Nutt
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c4ec723089
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SAMA5 page table is cached; need to flush the cache each time that the page table is updated
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2013-07-27 09:27:37 -06:00 |
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Gregory Nutt
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6fc4b9aacc
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Correct an error in Cortex-A5 intermediate MMU mapping
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2013-07-26 17:26:53 -06:00 |
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Gregory Nutt
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dc92037e67
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Add a hello world configuration to help with the SAMA5 bringup
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2013-07-26 15:28:01 -06:00 |
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Gregory Nutt
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70f0ffdfc5
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Finally... renamed all CONFIG_DRAM_ settings to CONFIG_RAM_
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2013-07-26 10:09:17 -06:00 |
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Gregory Nutt
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ec8a56259c
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SAMA5: If the page table is in high memory, make sure that it is excluded from the heap
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2013-07-26 09:16:46 -06:00 |
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Gregory Nutt
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0fb58d2cf1
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Fix some bad page table definitions of last commit
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2013-07-25 18:11:25 -06:00 |
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Gregory Nutt
|
49f9b7040e
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Misc Cortex-A5 MMU-related fix -- still does not boot
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2013-07-25 16:37:55 -06:00 |
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Gregory Nutt
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55df28dbcf
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Fix an uninitialized register error that crept into the ARM9 start up code many years ago and was recently cloned into the Cortex-A5. Obviously no on has used NuttX with ARM9 for years
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2013-07-24 20:12:04 -06:00 |
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Gregory Nutt
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e6beda428a
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Fix SAMA5 vector linking issue
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2013-07-24 12:51:42 -06:00 |
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Gregory Nutt
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77e1c27005
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Update SAMA5D3x-EK board configuration to support on-board UART connections, LEDs, and push buttons
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2013-07-24 12:27:12 -06:00 |
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Gregory Nutt
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04b3bb1826
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Revamp the way external memory regions are configured; Add logic to add SAMA5 external memory regions to the heap
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2013-07-24 10:08:32 -06:00 |
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Gregory Nutt
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3860fc17f0
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Improve Cortex-A5 context switching so that a little less copying is done
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2013-07-24 07:47:51 -06:00 |
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Gregory Nutt
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d6ae8db987
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ARMv7-N: Fix a copy error introduced in the previous check-in
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2013-07-23 19:09:17 -06:00 |
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Gregory Nutt
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535048a73c
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Improve some ARMv7-A/M floating point register save time; Add floating point register save logic for ARMv7-A
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2013-07-23 17:52:06 -06:00 |
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Gregory Nutt
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812bf02972
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ARMv7-A: Need 8-byte stack alignment when callign C code from interrupt handlers. This change needs to be ported to other ARM architectures as well
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2013-07-23 14:47:16 -06:00 |
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Gregory Nutt
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14df812735
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SAMA5: Adapt clocking for different boot modes. New header files for AXI matrix, BSC, and SFR
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2013-07-23 13:54:49 -06:00 |
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Gregory Nutt
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afdd6320ee
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Add SAMA5D3 pin multiplexing definitions
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2013-07-23 09:47:01 -06:00 |
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Gregory Nutt
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f07d09aa48
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Add SAMA5 GPIO configuration support
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2013-07-22 20:59:47 -06:00 |
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Gregory Nutt
|
339a55f1ea
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Add support SAMA5 UART and serial driver
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2013-07-22 19:16:37 -06:00 |
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Gregory Nutt
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e67d610347
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SAMA5 clock configuration should now agree with Atmel sample code; Added header file with macros to enable and disable peripheral clocking
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2013-07-22 17:00:02 -06:00 |
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Gregory Nutt
|
a9b0f304e6
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Add SAMA5 clock logic. Cloned from SAM3U and not yet verified
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2013-07-22 14:42:05 -06:00 |
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Gregory Nutt
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1350b2a576
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SAMA5 interrupt handling logic
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2013-07-22 11:54:39 -06:00 |
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Gregory Nutt
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5bbc86f894
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SAMA5/Cortex-A: Improve irqsave/restore inlines + add irqenable. Add skeleton file for SAMA5 interrupt management. Also change from last commit that was left in the editor
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2013-07-21 17:08:40 -06:00 |
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Gregory Nutt
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87f54f7d0b
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Add system timer logic for the SAMA5
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2013-07-21 15:49:17 -06:00 |
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Gregory Nutt
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543b5b7e03
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A few more Cortex-A5 and SAMA5 files
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2013-07-21 12:52:38 -06:00 |
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Gregory Nutt
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66259bfc53
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Misc Cortex-A5 changes include new file for cache operations
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2013-07-20 13:06:00 -06:00 |
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Gregory Nutt
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b26d5c7164
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A few more SAMA5D3 files
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2013-07-19 17:45:28 -06:00 |
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Gregory Nutt
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4a81d47c86
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Basic framework to support the AT91SAMA5D3 family and the SAMA5D3x-EK board(s) in particular
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2013-07-19 15:23:03 -06:00 |
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Gregory Nutt
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5356bd1bbd
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More ARMv7-A files that are just copies of the ARMv4/5 files for now
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2013-07-19 11:43:04 -06:00 |
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Gregory Nutt
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53a4f3443c
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Minor but fatal typo introduced in last checkin
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2013-07-18 15:45:21 -06:00 |
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Gregory Nutt
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8f2ad7eec1
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Some initial frame for Cortex-A5 support. No much yet
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2013-07-18 15:20:47 -06:00 |
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Gregory Nutt
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a7ae91c716
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NSH cmp command by Andrew Twidgell
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2013-07-18 08:24:29 -06:00 |
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Gregory Nutt
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f9b9bf6e04
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STM32 SDIO driver: Add supported for data block end (DBCKEND) interrupt. From Chia Cheng Tsao
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2013-07-08 09:04:05 -06:00 |
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Gregory Nutt
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7536b4654b
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Ticket #16: STM32 OTG FS device driver endpoint allocation. From Chia Cheng Tsao
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2013-07-08 08:55:05 -06:00 |
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Gregory Nutt
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25c393f371
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prohibit re-entrance into sam_configgpio()
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2013-07-05 17:15:54 -06:00 |
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Gregory Nutt
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94e2f4ceb4
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Fix SAM34 interrupt handling for ports D-F; fix MISO logic in Arduino Due touchscreen driver
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2013-07-03 08:12:45 -06:00 |
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Gregory Nutt
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f0ebaf8312
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Several fixes to get a clean compile of the Arduino touch screen
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2013-07-02 13:52:09 -06:00 |
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Gregory Nutt
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09faaccc02
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Created new directories to hold SPI-related files
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2013-07-01 08:11:54 -06:00 |
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Gregory Nutt
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f01a1517df
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Update LM FLASH definitions for LM4F120. From Vinti
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2013-06-29 07:02:56 -06:00 |
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Gregory Nutt
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2ba00060bc
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SAM33/4: Need to disable write protection before modify PIO pin configuration
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2013-06-28 15:34:51 -06:00 |
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Gregory Nutt
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3505ca7556
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Add an NSH configuration for the Arduino Due; Pluse several fixes related to the Due and to the SAM3X in general
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2013-06-28 14:32:08 -06:00 |
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Gregory Nutt
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e34e1ee987
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Arduino Due: Fixes to FLASH address, flash wait states, updated Comments. Now boots and runs a bit before crashing
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2013-06-28 11:29:14 -06:00 |
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Gregory Nutt
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9956392d00
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With these changes the Arduino Due port builds without errors
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2013-06-27 15:07:07 -06:00 |
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Gregory Nutt
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e0310e2cc8
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Flesh out the Arduino Due board configuratino and integrate it with the build and configuration system
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2013-06-27 14:24:27 -06:00 |
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Gregory Nutt
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293e46e435
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Review and update of SAM3/4 header files and conditional logic for SAM3X/A support
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2013-06-27 11:06:13 -06:00 |
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Gregory Nutt
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bc7ac20616
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Add peripheral configuration logic for the SAM3X/3A; Change all references to SAM3/4 SPI to SPI0 for compatibity with the SAM3X/3A which has SPI0 and SPI1; Add directory which will eventually holdl an Arduino Due port
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2013-06-26 18:46:44 -06:00 |
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Gregory Nutt
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d4b7efb34e
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Add SAM3X/3A pin multiplexing and GPIO encoding header files
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2013-06-26 17:02:43 -06:00 |
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Gregory Nutt
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f668abaed1
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Add SAM3X/3A memory map
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2013-06-26 14:37:57 -06:00 |
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Gregory Nutt
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3692dfaf26
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Add SAM3X/3A peripheral clock controls
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2013-06-26 14:00:26 -06:00 |
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Gregory Nutt
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b089263e1c
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Add SAM3X/3A interrupt vectors
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2013-06-26 12:59:56 -06:00 |
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Gregory Nutt
|
18240b07b6
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Add support for SAM3X and 3A chips, interrupts, and peripheral IDs
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2013-06-26 12:28:32 -06:00 |
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Gregory Nutt
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64dd806d89
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Fix integration of RAM test into the build and configuration system
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2013-06-26 10:54:12 -06:00 |
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Gregory Nutt
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3d1f29217e
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Add support for a separate CCM memory allocator for members of the STM32 family that support CCM memory
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2013-06-25 09:13:30 -06:00 |
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Gregory Nutt
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8959fffedc
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SAM4L Xplained SLCD driver is complete
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2013-06-23 09:05:20 -06:00 |
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Gregory Nutt
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5152ce9f79
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Beginning of a driver for the SAM4L LED1 module
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2013-06-21 17:42:09 -06:00 |
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Gregory Nutt
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add0a67995
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Straighten out issues about who calls C++ initializers with CXXTEST or HELLOXX are built as NSH applications; Add an ofstream test to CXXTEST suggested by Michael; Update many defconfig fiels to that they set configurations to handle C++ constructors just as before these configuration changes
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2013-06-21 09:32:57 -06:00 |
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Gregory Nutt
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59e1d1c6cd
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More KL25Z SPI fixes
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2013-06-20 19:58:45 -06:00 |
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Gregory Nutt
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b14f0cf9f7
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KL25Z GPIO register dump function now compiles
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2013-06-20 18:00:56 -06:00 |
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Gregory Nutt
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76f9df2941
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Fix backward wait condition in KL24Z SPI driver
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2013-06-20 17:39:42 -06:00 |
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Gregory Nutt
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d5a0c75bbb
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Add framework for managing SPI-related discretes on the Freedom KL25Z board.
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2013-06-20 13:50:16 -06:00 |
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Gregory Nutt
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876fcca8f7
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More Freedom KL25Z changed to and from Alan Carvalho de Assis
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2013-06-19 20:50:27 -06:00 |
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Gregory Nutt
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d8a8679781
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Fix errors in KL25Z SPI driver reported by Alan Carvalho de Assis
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2013-06-19 19:32:13 -06:00 |
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Gregory Nutt
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2cfeed654a
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Add SAM4L PDCA register definition file
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2013-06-19 18:38:31 -06:00 |
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Gregory Nutt
|
3ed35802ce
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SPI register definition file updated to include a few differences for the SAM4L
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2013-06-19 16:03:19 -06:00 |
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Gregory Nutt
|
2ede49fd6a
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SAM4L LCDCS register definitions
|
2013-06-19 13:59:47 -06:00 |
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Gregory Nutt
|
2a2de71b5d
|
Add SPI driver for the Freescale KL25Z
|
2013-06-19 12:10:01 -06:00 |
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Gregory Nutt
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f597172733
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Add SPI register definitions for the Freescale KL25Z
|
2013-06-19 09:56:32 -06:00 |
|
Gregory Nutt
|
69fc11bb71
|
Fix test of NULL pointer in the SAM3/4 SPI driver
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2013-06-18 12:16:52 -06:00 |
|
Gregory Nutt
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177a8c0e9b
|
Freescale KL25Z support from Alan Carvalho de Assis
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2013-06-18 11:20:57 -06:00 |
|
Gregory Nutt
|
39dcedb0f1
|
SAM3/4 SPI phase control (CPHA) is inverted
|
2013-06-18 09:29:55 -06:00 |
|
Gregory Nutt
|
15e846ad1d
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Corrections to the Kinetis TSI header file from Alan Carvalho de Assis
|
2013-06-18 07:14:05 -06:00 |
|
Gregory Nutt
|
c9f1d1857c
|
SAM3U-EK: Correct polarity of the PENIRQ signal
|
2013-06-16 14:31:18 -06:00 |
|
Gregory Nutt
|
c7fd7a4e27
|
Re-architected SAM3/4 SPI interface; Change BUSY bit handling in the ADS7843E driver
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2013-06-16 10:09:21 -06:00 |
|
Gregory Nutt
|
44fe999aea
|
Add support for the SAM4L Xplained Pro I/O1 module
|
2013-06-15 10:56:08 -06:00 |
|
Gregory Nutt
|
b1afe69591
|
Fixes for SAM4S and 4L due to recent changes to SAM3S; Updated README files
|
2013-06-14 08:54:24 -06:00 |
|
Gregory Nutt
|
8ed39d9f29
|
SAM3/4S GPIO interrupt changes
|
2013-06-13 18:53:14 -06:00 |
|
Gregory Nutt
|
9cf942bcb2
|
SAM3/4: Loop counter for PLL delay must be volatile or it may get optimized away
|
2013-06-13 16:18:25 -06:00 |
|
Gregory Nutt
|
e26381f0c0
|
SAM3/4: Some minor design improvements to the SAM3/4 serial driver
|
2013-06-13 15:16:52 -06:00 |
|
Gregory Nutt
|
3a351b60e1
|
Fix error in AT91SAM SPI driver introduced in recent comment. Varioius improvements to README files and debug output
|
2013-06-13 13:38:31 -06:00 |
|
Gregory Nutt
|
1f056e3826
|
Add support for a generic windows-based EABI toolchain; Add NX configuration to force default NXTK border colors
|
2013-06-13 11:04:18 -06:00 |
|
Gregory Nutt
|
507bacc6d5
|
Correct border colors for SAM3U-EK border; clean up some comments; make sure that sam_vectors.S is identical to stam32_vectors.S
|
2013-06-12 19:42:39 -06:00 |
|
Gregory Nutt
|
83ecc03d17
|
Remove CONFIG_XYZ_BUILTIN configurations, replace with the single CONFIG_NSH_BUILTIN_APPS. Add SAM3/4 sam_periphclks.h which is just a header file that includes the right header file. Misc SAM3U-EK cleanup
|
2013-06-12 17:32:00 -06:00 |
|
Gregory Nutt
|
535dc49dea
|
Misc updates to SAM3U register definition files for SAM4S compatibility
|
2013-06-12 12:35:48 -06:00 |
|
Gregory Nutt
|
fa45b86b4d
|
SAM4S: Add NSH configuration. Calibrated delay loops. Port now seems fully functional
|
2013-06-12 10:56:42 -06:00 |
|
Gregory Nutt
|
d9cec43398
|
Correct SAM3S-Xplained load address, FLASH wait states, and UART1 pin configuration
|
2013-06-12 08:18:42 -06:00 |
|
Gregory Nutt
|
a2a91bf8d6
|
Use UART1 for the console on the SAM4S-Xplained not USART0
|
2013-06-11 19:24:47 -06:00 |
|
Gregory Nutt
|
1ca5db1ebc
|
Changes for a clean build of configs/sam4s-xplained
|
2013-06-11 17:33:43 -06:00 |
|
Gregory Nutt
|
94a2776337
|
Add configs/sam4s-xplained
|
2013-06-11 16:29:59 -06:00 |
|
Gregory Nutt
|
54c777ef0d
|
SAM4S: Add macros to manage peripheral clocks
|
2013-06-11 15:42:30 -06:00 |
|