hotislandn
6aa86b469c
arch:rv64:c906:add PMP, change mem map for protect build.
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Signed-off-by: hotislandn <hotislandn@hotmail.com>
2021-03-28 09:02:48 -05:00
hotislandn
84daebf2cc
arch:risc-v:bl602: enable FPU for this target.
2021-02-08 00:29:34 -08:00
Abdelatif Guettouche
0f2b774dec
arch/risc-v: Remove unused and undefined file section "Public Variables"
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-27 18:40:10 -08:00
Virus.V
2b8e0945a9
Fix BL602 CI Build failed.
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Modify the default configuration in KConfig.
Sync latest commit from mainline.
Remove unused demo configuration
fixup bl602 nsh defconfig cause CICD failed
Rebase from mainline code
2020-12-29 01:52:09 -08:00
liang
b074ebec9e
fix redefined CSR_INSTRET
2020-12-23 01:34:14 -06:00
Xiang Xiao
92cefb0a78
arch/risc-v: Move CSR register bit definition to csr.h
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to avoid the macro duplication
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-12-20 20:27:13 -08:00
Xiang Xiao
d42c5a0bf6
arch/risc-v: Move csr.h to common place
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since CSR definition is same for 32bit and 64bit arch
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-12-19 08:41:33 +09:00
