In the lower half UART driver for PIC32MZ architecture, adding the
TIOCxBRK ioctl calls, which allow an application to transmit a UART
line BREAK signal.
This architecture does not support BSD-style BREAK in hardware so our
implementation follows the precedent set in STM32, GD32, and Kinetis
architectures: By default, if only PIC32MZ_UART_BREAKS is configured,
we produce the hardware-native BREAK, which lasts for 12 bit lengths;
if, in addition, PIC32MZ_SERIALBRK_BSDCOMPAT is configured, we
generate a BSD-style BREAK by putting the TX pin in GPIO mode and
driving it low "manually" until told to stop.
* arch/mips/src/pic32mz/Kconfig
(config PIC32MZ_UART_BREAKS): New. Appears as
CONFIG_PIC32MZ_UART_BREAKS in code.
(config PIC32MZ_SERIALBRK_BSDCOMPAT): New. Appears as
CONFIG_PIC32MZ_SERIALBRK_BSDCOMPAT in code.
* arch/mips/src/pic32mz/hardware/pic32mz_pps.h
(__PPS_OUTPUT_REGADDR_TO_GPIO, PPS_OUTPUT_REGADDR_TO_GPIO): New
macros to automatically determine the GPIO port and pin from the
corresponding PPS (Peripheral Pin Select) define. Since there is a
one-to-one correspondence between PPS output mappings and a single
port and pin, these macros avoid writing redundant pin mappings. We
use this when switching the TX pin from UART to GPIO to generate
the BREAK and we could use it in other peripheral drivers in the
future to override hardware behavior.
* arch/mips/src/pic32mz/pic32mz_serial.c
(struct up_dev_s): Add new field 'brk' to indicate line break in
progress when built with PIC32MZ_UART_BREAKS. If generating BSD-
compatible BREAKs, also add tx_gpio, tx_pps_reg, and tx_pps_val, to
let us toggle the pin between UART and GPIO modes.
(up_ioctl): Add cases for TIOCSBRK and TIOCCBRK to turn BREAK on and
off, with both hardware-native and BSD-compatible implementations.
This is similar to the STM32F7 implementation.
(up_txint): Block enabling TX interrupt if line break in progress.
This is similar to the STM32F7 implementation.
SOCK_CTRL is added to provide special control over network drivers
and daemons. Currently, SOCK_DGRAM and SOCK_STREAM perform this control,
but these use socket resources. In the case of usersocket in particular,
this is a waste of the device's limited socket resources.
Updating Simulator for macOS
macOS requires genromfs and X11 Libraries to run Simulators.
* Added instructions to install genromfs
* Added instructions to install X11
Adding Xorg Server
The linker was unable to identify the location of X11 libraries.
removed -L/opt/X11/lib from ln 145
Updating Changes to streamline with other Hosts
The PIC32MZ architecture provides a Peripheral Pin Select (PPS) which
allows mapping peripherals to different GPIO pins. To map a peripheral
output, a value is programmed to a register called RPnxR, where n is
the GPIO port (A thru K) and x is the GPIO pin (0 thru 15). The names
of these registers in code are PIC32MZ_RPnxR. However, in various
definitions, these were mistakenly written as PI32MZ_RPnxR (missing C
in PIC32). This prevents using any of the affected mappings. This
issue is fixed by repairing the define names.
* arch/mips/src/pic32mz/hardware/pic32mzec_pps.h,
arch/mips/src/pic32mz/hardware/pic32mzef_pps.h:
(): s/PI32MZ/PIC32MZ/g
The defines for Peripheral Pin Select (PPS) register RPE5R were called
RPE4R inadvertently; however, mappings elsewhere in the file used the
correct name of RPE5R, so the build would break if anyone attempted to
map those peripherals to GPIO pin E5. This issue is now fixed.
* arch/mips/src/pic32mz/hardware/pic32mzec_pps.h,
arch/mips/src/pic32mz/hardware/pic32mzef_pps.h:
(PIC32MZ_RPE4R_OFFSET): Rename to PIC32MZ_RPE5R_OFFSET.
(PIC32MZ_RPE4R): Rename to PIC32MZ_RPE5R.
When I checked how this register was set I discovered that 128 was not
accepted by the H7 but 64 was ok. Looking at the STM32Cube's HAL it
seems to be only 64 words long, however, the reference manual claims
otherwise.
I have opened a discussion on the ST community forum
https://community.st.com/s/question/0D73W000001nzqFSAQ
but unfortunately not received an answer yet.
In the meantime, I think, we should update this to what I found to be
working though.
Signed-off-by: Julian Oes <julian@oes.ch>
The TERMIOS(3) function tcsendbreak() and the IOCTLs TCSBRK and TCSBRKP
transmit a serial line Break.
Previously NuttX included an extern declaration for tcsendbreak() and
defines for TCSBRK and TCSBRKP but none of these were implemented.
Attempting to build programs that called tcsendbreak() would fail with
a linker error; attempting to use TCSBRK and TCSBRKP would result in an
error at runtime.
This changeset adds the tcsendbreak() function and handling for TCSBRK
and TCSBRKP; tcsendbreak() is implemented in terms of TCSBRK. Both
TCSBRK and TCSBRKP are implemented in terms of the BSD-compatible Break
IOCTLs TIOCSBRK and TIOCCBRK, which must be provided by the lower half
serial driver. Currently, not all lower half serial drivers in NuttX
support these IOCTLs. Those that do implement them may need one or more
Kconfig options to be set, such as `CONFIG_*_U[S]ART_BREAKS` and, on
some architectures, a separate `CONFIG_*_SERIALBRK_BSDCOMPAT`.
* drivers/serial/serial.c
(uart_tcsendbreak): New function.
(uart_ioctl): Implement TCSBRK and TCSBRKP.
* libs/libc/termios/lib_tcsendbreak.c
(): New file.
* libs/libc/termios/Make.defs
(CSRCS): Add lib_tcsendbreak.c to the build.
Thanks to Xiang Xiao for PR feedback.
Co-authored-by: Xiang Xiao <xiaoxiang781216@gmail.com>
The version information basically uses 20 characters for date and time,
which is small enough to specify an arbitrary version string. Therefore,
increase the buffer a little.
caculate blk address when mempool_multiple_free
have a bug. need a real blocksize to caulate the
memory address.
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Without this POSIX-compatible definition, support for nativesockets module in Nimlang is problematic.
.nimcache/(snip)@spure@snativesockets.nim.c: In function 'toInt__pureZnativesockets_69':
.nimcache/(snip): error: 'IPPROTO_ICMPV6' undeclared (first use in this function); did you mean 'IPPROTO_ICMP6'?
291 | result = IPPROTO_ICMPV6;
| ^~~~~~~~~~~~~~
| IPPROTO_ICMP6
Signed-off-by: Takeyoshi Kikuchi <kikuchi@centurysys.co.jp>
