Gregory Nutt
fe4e3f4529
Tiva Timer: Timer test must attach a timer handler or the timer is stopped at the first interrupt
2015-01-13 15:55:54 -06:00
Gregory Nutt
08638e10bd
Timer Timer: Timer driver now initializes without complaints. Need a test driver of some kind to make more testing progress.
2015-01-13 11:49:00 -06:00
Gregory Nutt
5aab327457
DK-TM3C129X Timer: Add timer initialization logic to the board bring-up
2015-01-13 11:10:35 -06:00
Gregory Nutt
0aa32a003c
Tiva Timer: Rename tiva_timerlow.c to tiva_timerlow32.c since it only supports 32-bit periodic timers
2015-01-13 10:10:02 -06:00
Gregory Nutt
ffa34aa5db
Tiva Timer: Completes implementation of the timer driver lower half
2015-01-13 10:06:40 -06:00
Gregory Nutt
1bd74b4dcc
Tiva Timer: Allow timeout interrupts even if the reload value is zero. That is the value that is need to get an interrupt on the wrap from 0xffffffff to 0x00000000
2015-01-13 08:29:25 -06:00
Gregory Nutt
cfc0732c57
Tiva Timer: Add conditional compilation to enable/disable each timer feature. Not only does this reduce the footprint by suppressing unused features, it also protects from partially implemented features that are now conditioned on EXPERIMENTAL
2015-01-13 07:49:20 -06:00
Gregory Nutt
73e6fc8142
Tiva Timer: Rename tiva_timer.c to tiva_timerlib.c
2015-01-12 15:55:41 -06:00
Gregory Nutt
f93e69e94e
Tiva Timer: First cut at timer driver lower half (still incomplete)
2015-01-12 15:52:48 -06:00
Gregory Nutt
4510be6c7d
Tiva Interrupts: Changes corresponding to the last needed in the Tiva Kconfig file as well
2015-01-12 10:14:48 -06:00
Gregory Nutt
90da8aa71d
Tiva Timers: Add interfaces to read the current timer value
2015-01-12 10:00:41 -06:00
Gregory Nutt
e5a0dcd0f9
USB host drivers: Change all parmeters named class to usbclass to avoid C++ conflicts
2015-01-11 08:05:09 -06:00
Gregory Nutt
b75c43f6ef
Tiva Timer: Fix a typo
2015-01-10 12:42:39 -06:00
Gregory Nutt
3c06976ba7
Tiva Timer: Implements configuration of the 32-bit RTC timer
2015-01-10 12:41:15 -06:00
Gregory Nutt
c0e1dc3b8a
Tiva Timer: Add support for RTC match interrupts
2015-01-10 12:22:37 -06:00
Gregory Nutt
a2a5c47d9d
Tive Timer: Add support for ADC trigger generation from one-shot and periodic timers for timeout and match evetns
2015-01-10 10:07:56 -06:00
Gregory Nutt
2eeca96330
Tiva Timer: Add support to set the match regiser(s) relative to the timer counter (and prescale) registers. Enable match interrupts. These are one time interruprts: After the match interrupt is dispatched, further match interrupts are disabled
2015-01-10 08:34:39 -06:00
Gregory Nutt
2871677362
Tiva Timer: Add support for input clock prescaler in 16-bit one-shot/periodic modes
2015-01-09 16:49:00 -06:00
Gregory Nutt
df48abcc47
Tiva Timer: Add logic to acknowledge Tiva Timer interrupts
2015-01-09 15:01:49 -06:00
Gregory Nutt
9ae597c441
Tive System Control: Add logic to configure the alternatie clock source (ALTCLK). Needed by the Tiva timer module
2015-01-09 14:10:31 -06:00
Gregory Nutt
7384857658
Tiva Timer: Add more interrupt management logic
2015-01-09 13:29:03 -06:00
Gregory Nutt
626d6cdab4
Tiva Timer: Add functions to set match registers; Add logic to select count direction
2015-01-09 12:05:26 -06:00
Gregory Nutt
8552b2f679
Tiva Timer: Add interfaces to start/stop timers and to set the interval load registers.
2015-01-09 11:07:52 -06:00
Gregory Nutt
d5d3a23ac3
Tiva Timers: Add framework to support tmer interrupts
2015-01-09 10:21:59 -06:00
Gregory Nutt
1193b4aa55
STM32 SDIO: Don't let architectures select CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE unless they have implemented SDIOWAIT_WRCOMPLETE
2015-01-08 17:47:34 -06:00
Gregory Nutt
09bd382697
Tiva Timer: Partial support for 16- and 32-bit, oneshot and periodic timer configurations
2015-01-08 13:44:10 -06:00
Gregory Nutt
58818e1afd
Tiva Timer: Add support to select alternate clock source and 32-bit register concatenation mode.
2015-01-08 11:08:54 -06:00
Gregory Nutt
d3bc0b7223
Tiva Timer: Add register level debug support
2015-01-08 10:14:38 -06:00
Gregory Nutt
6c612cf967
Tiva Timer: Add basic framework to configure timers. Incomplete on initial commit
2015-01-08 09:47:38 -06:00
Gregory Nutt
92dc58c376
Tiva Timer: SYNC regiser is only available on GPTM0
2015-01-08 08:07:31 -06:00
Gregory Nutt
e55df605a8
Tiva Timer: Update timer register bit definitions for the LM4F
2015-01-08 08:03:47 -06:00
Gregory Nutt
1ed2956ad5
Tiva Timer: Extend timer register definitions to handle other chips
2015-01-08 07:56:00 -06:00
Gregory Nutt
1ace391fcf
MMCSD SDIO: Add support for a new SDWAIT_WRCOMPLETE condition. The previous logic used a busy-wait loop to pool the card R1 start to determine when the card was ready for the next transfer. That busy-wait can be quite long -- hundreds of milliseconds. And alternative is to look the the SD D0 pin which will change state when the card is no longer busy.
...
This logic implements a change the avoids the busy-wait poll by reconfiguring the SD D0 pin as a GPIO interrupt, then waiting for the card to becom ready without taking up CPU cycles.
This change is conditioned on CONFIG_MMCSD_SDIOWATI_WRCOMPLETE and is currenlty only implemented for the STM32 SDIO driver.
From David Sidrane
2015-01-08 06:23:42 -06:00
Gregory Nutt
5c68f0dd34
Tiva Timer: Missed one register bit field definition
2015-01-07 12:03:08 -06:00
Gregory Nutt
9eb693845e
TM4C129X Timer: Completes timer register definition header file
2015-01-07 11:43:56 -06:00
Gregory Nutt
81afc06f54
TM4C129X Timer: Add some missing addresses and some of the register bit definitions. Still incomplete
2015-01-07 10:07:47 -06:00
Gregory Nutt
28a52cbd23
TM4C129X Timer: Update addresses in the timer register definitions file. Still missing bit field definitions
2015-01-07 08:57:48 -06:00
Gregory Nutt
0748291ce9
Tiva IRQs: Fix IRQ control logic; was limited to only 64 IRQs. That is a problem for higher numbered IRQs on many platforms
2015-01-06 10:49:47 -06:00
Gregory Nutt
c429a4d93f
Tiva I2C: For TM4C, high speed mode is now configurable (but disabled as EXPERIMENTAL)
2015-01-06 10:48:08 -06:00
Gregory Nutt
10b349bd1a
Tiva PHY Interrupts: Need to read the PHY interrupt status register in order to clear the pending PHY interrupt
2015-01-05 15:12:45 -06:00
Gregory Nutt
52c4334429
Tiva: Fixes to support building Tiva TM4C129X I2C driver
2015-01-05 13:15:40 -06:00
Gregory Nutt
67aeab7105
Tiva: Update I2C register definitions to include support for the TM4C129X
2015-01-05 13:08:07 -06:00
Gregory Nutt
c4f64c72c8
Tiva Ethernet: Add support for PHY interrupts
2015-01-03 13:16:26 -06:00
Gregory Nutt
40113f0b93
Tiva Ethernet: Configure external PHY interrupt pin
2015-01-03 10:59:12 -06:00
Gregory Nutt
a7e0acbc6f
Tiva Ethernet: Removed logic that holds the PHY and re-ordered some reset logic. Can not ping the DK
2015-01-03 09:28:54 -06:00
Gregory Nutt
15f0a046fd
Tive Ethernet: Wait for EMAC to come out of reset before accessing any registers
2015-01-03 06:52:19 -06:00
Gregory Nutt
6bb12a34dc
Tiva serial: Add volatile to fix a wait loop that was not waiting; CR really should preced LF in CR-LF expansion
2015-01-02 14:05:42 -06:00
Gregory Nutt
28d44e1b30
Cosmetic changes
2015-01-02 13:59:47 -06:00
Gregory Nutt
b828741900
Tiva: Fix typos in conditional compilation
2015-01-02 13:59:30 -06:00
Gregory Nutt
91a92fc538
Tiva Ethernet: Add lots of debug output for testing
2015-01-02 13:10:25 -06:00
Gregory Nutt
ce3dac34b2
Tiva: If peripheral ready register not available, then lets say the peripheral is ready
2015-01-02 12:58:20 -06:00
Gregory Nutt
194e5a9600
Tiva: Wait for the console UART to be ready before configuring it
2015-01-02 12:57:41 -06:00
Gregory Nutt
47b8ce855e
Tiva Ethernet: Fix compile problem when debug enabled
2015-01-02 12:04:22 -06:00
Gregory Nutt
86dc1726aa
Tiva GPIO: Fix a compiler error when debug is enabled with TM4C129X
2015-01-02 11:53:02 -06:00
Gregory Nutt
9688a9aacb
Tiva Ethernet: MMC interrupts need to be disable initially
2015-01-02 11:40:48 -06:00
Gregory Nutt
ea3895c2e8
Tiva Ethernet: Update DMA BUSMODE settings based on TI example code
2015-01-02 11:10:41 -06:00
Gregory Nutt
67699b8cae
Tiva Ethernet: Update PHY initialization
2015-01-02 10:11:57 -06:00
Gregory Nutt
a97d304d1a
STM32 RTC: Add Kconfig options needed with the preceding commit
2015-01-02 06:45:45 -06:00
Gregory Nutt
7b89f64b37
stm32-rtc: Add support for the internal low speed clock (LSI)
...
Some boards do not have the external 32khz oscillator installed, for those boards we must fallback to the crummy to the crummy internal RC clock. Turn on by defining CONFIG_RTC_LSICLOCK.
From Kevin Hester <kevinh@geeksville.com> via Lorenz Meier.
2015-01-02 06:32:40 -06:00
Gregory Nutt
367af5c65d
Cosmetic update to some comments
2015-01-02 06:07:56 -06:00
Gregory Nutt
adb9ac6c60
Cosmetic change to file formatting
2015-01-01 15:55:33 -06:00
Gregory Nutt
bc3fc9e3a3
TM4C129X Ethernet: Add logic to get pre-programmed MAC address from user FLASH registers
2015-01-01 12:28:46 -06:00
Gregory Nutt
48f6e06ed1
Tiva FLASH: Add FLASH register definitions for the TM4C129 family
2015-01-01 11:44:35 -06:00
Gregory Nutt
e83f531724
Tiva PHY: Hard code some properties of the internal PHY
2015-01-01 08:11:17 -06:00
Gregory Nutt
14992be38f
Tiva Ethernet: Update Ethernet intializaiton logic. Still things to be done
2015-01-01 07:55:15 -06:00
Gregory Nutt
61edf50f9a
Tiva: Add peripheral ready header file; fix typos in clock/pwr enable header files
2015-01-01 07:54:31 -06:00
Gregory Nutt
0eb224aeae
Ethernet skeleton: Add some more example logic
2014-12-31 13:45:19 -06:00
Gregory Nutt
cc038a61f6
Tiva Ethernet: Integrate use of workqueue so the network processing is not done at the interrupt level
2014-12-31 13:03:00 -06:00
Gregory Nutt
b81661c258
Tiva Ethernet: Add basic clock/power controls for Ethernet and internal PHY
2014-12-31 11:40:01 -06:00
Gregory Nutt
903e7f5d2b
Tiva Ethernet: First cut at TM4C129X Ethernet driver. Initial commit is basically just the STM32 Ethernet driver with modifications for a clean compilation in the Tiva environment
2014-12-31 11:34:24 -06:00
Gregory Nutt
a96c91db1e
Tiva Ethernet: Minor naming update for compatibility
2014-12-31 09:39:00 -06:00
Gregory Nutt
7c07766468
Tiva Ethernet: Add DMA descriptor definitions
2014-12-31 07:32:11 -06:00
Gregory Nutt
119e957472
Mostly cosmetic
2014-12-30 17:00:15 -06:00
Gregory Nutt
f61d15bb55
Tiva Ethernet: Completes TM4C129X Ethernet register definition header file
2014-12-30 13:42:19 -06:00
Gregory Nutt
408139dada
Don't error out if no ethernet definitions available
2014-12-30 13:26:18 -06:00
Gregory Nutt
9a71dc091b
Tiva Ethernet: More progress with register bit definitions
2014-12-30 11:08:18 -06:00
Gregory Nutt
8cea115be7
Tiva Ethernet: More progress with register bit definitions
2014-12-30 09:22:24 -06:00
Gregory Nutt
6bd5702778
TM4C129G Ethernet: Add Ethernet register addresses. Header files still incomplete
2014-12-30 08:09:09 -06:00
Gregory Nutt
1dc66f3104
Tiva: Add framework to support the uniqueu TM4C Ethernet register definitions
2014-12-30 07:07:16 -06:00
Gregory Nutt
a0727124c2
stm32: update description and code documentation. Also fixes a few code formattings.
...
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
2014-12-29 09:59:46 -06:00
Gregory Nutt
1a27614552
stm32: fix wait upon vertical blank. This should never have occurred before.
...
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
2014-12-29 09:48:25 -06:00
Gregory Nutt
171c017a0c
stm32: fix faulty access to non existing layer. This disables operation that requires double layer support, when configured for single layer only.
...
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
2014-12-29 09:45:30 -06:00
Gregory Nutt
ad9429a527
Tiva SSI: Fix oversight in last commit. Would only fixe the case where the single SSI enabled was SSI0
2014-12-28 16:58:36 -06:00
Gregory Nutt
c802d5276b
Tiva SSI: Fix some recent breakage to the Tiva SSI driver for the case where only one SSI modules is enabled
2014-12-28 16:55:47 -06:00
Gregory Nutt
59c6f42be4
STM32 Serial: PX4 HW workarround for flaky STM32 RTS. From David Sidrane
2014-12-27 18:58:18 -06:00
Gregory Nutt
d597e94332
Remove STM32-specific RX flow control logic from the upper level serial driver to the lower level STM32 serial driver
2014-12-27 09:45:45 -06:00
Gregory Nutt
405d72c1ad
Serial Upper Half: Add watermarks to RX flow control logic
2014-12-27 07:43:06 -06:00
Gregory Nutt
214183ff93
STM32: Fix some incorrectly placed conditional logic
2014-12-26 12:41:35 -06:00
Gregory Nutt
78affd0f9a
EFM32 Timer/PWM: Add support for timer/PWM EFM32GG. From Pierre-noel Bouteville
2014-12-26 09:55:19 -06:00
Gregory Nutt
45a93bb30e
ARMv7M: More runtine stack checking logic. From David Sidrane
2014-12-26 08:46:25 -06:00
Gregory Nutt
570943bd71
STM32 I2C: Add strings to decode trace events. From David Sidrane
2014-12-26 08:35:21 -06:00
Gregory Nutt
831167f806
Add support for run time stack checking for the STM32. From David Sidrane
2014-12-26 08:30:42 -06:00
Gregory Nutt
8a2a594348
Tiva: Update UART header file for TM4C129X
2014-12-22 14:11:56 -06:00
Gregory Nutt
21f6598faf
Tiva: Upate GPIO header file for TM4C129X
2014-12-22 12:59:13 -06:00
Gregory Nutt
f91583af61
TM4C129X: Simplify be removing unnecessary temporary variable
2014-12-22 12:01:33 -06:00
Gregory Nutt
bd2d83c656
TM4C129X: Simplify be removing unnecessary temporary variable
2014-12-22 11:53:31 -06:00
Gregory Nutt
3b863966fe
TM4C129X: First cut at new Tiva clock configuration logic
2014-12-22 11:45:10 -06:00
Gregory Nutt
5184e4dade
TM4C129X: A small step toward understanding new Tiva clocking
2014-12-22 09:30:41 -06:00
Gregory Nutt
7b6d0391ab
Tiva: Rename TIVA_CRC_BASE to TIVA_CCM_BASE
2014-12-21 17:44:11 -06:00
Gregory Nutt
488b02ff6c
Tiva: Add support for I2C6-9
2014-12-21 17:20:16 -06:00
Gregory Nutt
f26384c386
Tiva SSI and board configurations: hange negative Tiva logic CONFIG_SSIx_DISABLE to positive logic CONFIG_TIVA_SSIx. Add support for SSI2 and SSI3
2014-12-21 15:23:37 -06:00
Gregory Nutt
3ea03b9806
Improved comments
2014-12-21 14:09:04 -06:00
Gregory Nutt
f4543de408
TM4C129X: Increated power/clocking macros into I2C driver
2014-12-21 13:02:12 -06:00
Gregory Nutt
20986de89e
TM4C129X: Add macros to enable/disable peripheral power
2014-12-21 11:40:39 -06:00
Gregory Nutt
9857b59e79
Tiva SSI: Use portable macros to enable peripheral clocking
2014-12-21 11:16:21 -06:00
Gregory Nutt
8ed83ac3a5
Tiva: More run mode clock enable macros
2014-12-21 11:02:56 -06:00
Gregory Nutt
d701532141
TM4C129X: Framework for new Tiva clocking logic (details not yet implemented)
2014-12-21 10:14:40 -06:00
Gregory Nutt
36acfdb26f
Tiva: Completes first cut at system control header file
2014-12-20 12:05:22 -06:00
Gregory Nutt
22b4def56e
Tiva: More TM4C129 system control register definitions
2014-12-20 11:10:10 -06:00
Gregory Nutt
e14608b272
Tiva: More TM4C129 system control register definitions
2014-12-20 09:59:21 -06:00
Gregory Nutt
b49f8b3baf
Tiva: Add a configuration setting to better distinguish TM4C123 and 129 families. Reanem tm4c_syscontrol.h to tm4c123_syscontrol.h; rename tm4c129x_syscontrol.h to tm4c129_syscontrol.h
2014-12-20 08:38:11 -06:00
Gregory Nutt
ffae2cb3d7
Tiva: Updates to system control regiser definitions
2014-12-20 08:22:17 -06:00
Gregory Nutt
16a302e732
STM32 LTDC: Move ltdc.h from include/nuttx/video to arch/arm/include/stm32; Trivial updates after general review
2014-12-19 14:52:17 -06:00
Gregory Nutt
44d72c6545
stm32: Add configuration option for ltdc
...
This adds the following ltdc configuration options:
- dither support
- cmap support, is this the right place for CONFIG_FB_CMAP?
- support for extended ltdc interface
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
2014-12-19 13:58:39 -06:00
Gregory Nutt
193edfb7be
stm32: implements ltdc frambuffer and support for ltdc layer operation
...
This implements the framebuffer support for the generic nuttx framebuffer
interface, (see nuttx/video/fb.h)
This also implements the interface to perform hardware accelerated layer
operation by the ltdc controller and dma2d controller later (see
nuttx/video/ltdc.h).
The following methods are supported by the ltdc interface:
- getvideoinfo
Get video information of the layer
- getplaneinfo
Get plane information of the layer
- getlid
Handle specific layer identifier. This allows to detect to current layer
state (e.g. important for layer flipping)
- setclut
Set the layer color lookup table. Up to 256 color entries supported.
- getclut
Get the layer color lookup table
- setcolor
Set the default layer color. In the context of the ltdc layer this means set
the default color outside the active area or if the layer is disabled.
- getcolor
Get the default layer color
- setcolorkey
Set the layer colorkey (chromakey). Colorkey is enabled by blendmode
LTDC_BLEND_COLORKEY
- getcolorkey
Get the layer colorkey
- setalpha
Set the constant alpha value. If blend mode LTDC_BLEND_SRCPIXELALPHA or
LTDC_BLEND_DESTPIXELALPHA is defined than the blended color is calculated
by the formel:
Cdest = Pixelalpha * Constalpha * Csrc.
Otherwise:
Cest = Constalpha * Csrc
- getalpha
get the alpha value
- setblendmode
Set the layer blendmode.
Supported blendmodes:
non blendmode (do not perform blend operation independent on the layers
alpha and colorkey)
alpha alpha blending (transparency)
destpixelalpha use pixel alpha value for the top layer (Layer2)
srcpixelalpha use pixel alpha value for the subjacent layer (Layer1)
colorkey enable colorkey
- getblendmode
Get the layer blendmode
- setarea
Set the active layer area, the visible rectangle inside the whole layer.
This also allows to change the position of the whole layer which is visible in
the selected area independent on the area position.
- getarea
Get the active layer area
- update
Reload the layer shadow register and make changes visible. Also supports
layer flipping.
Note! Dithering and background color are static parameter and can only changed
at build time.
Implementation details:
The implementation of ltdc interface was inspired by SDL and DirectFB.
All layer settings are shadowed before they become active (except setclut).
They are still inactive until the layer is updated. This is done by the update
method. Should clut only active after an update or not? Clut is used for drawing
while the other settings usually used for blend or blit operations. So i think
this should be the right way.
The implementation of ltdc interface was inspired by SDL and DirectFB.
All layer settings shadowed before they become active (except clut).
They are still inactive until the layer is updated. This is done by the update
call. Should clut only activated after an update or not? Clut is used for draw
operation while the other settings usually used for blend or blit operations.
So i think this should be the right way.
Deviations from the ltdc hardware implementation:
- Shadow register update of both layer (Layer1 or Layer2) is independent as long
LTDC_UPDATE_SIM is not set. This flag allows to update both layer simultaneous.
Otherwise only the desired layer is updated.
Layer operation:
Keep in mind, both layer are allways active (of course if both enabled by the
configuration). First the Layer 1 is blended with the background color and the
result is blended with the Layer2. To avoid blend effects, set the Layer2 in non
blend mode. This is equal to blend with alpha = 255. Enable blending of Layer2
with the background color by enable blending of Layer1 and disable the opacity
by setting the alpha value to 0.
Layer flip:
A layer flip usual mean swapping two framebuffer. So the current inactive buffer
can refreshed with data while the active framebuffer is visible. A flip
operation changes the inactive layer to the active one and vice versa.
The ltdc implementation supports layer flip. This can be done by the update call
and the flag LTDC_UPDATE_FLIP. In this case ltdc makes the inactive layer
invisible. In detail, the inactive layer is disabled and the blendmode reset.
Detection of the current layer state (e.g. active or inactive) is supported
by the getlid method combined with one of the LTDC_LAYER_* flags.
Maybe an additional method "flip" for flip operation should be added to the ltdc
interface? But this make no sence from my view if the layer is a non LTDC layer,
e.g. playing with dma2d only.
Supported and tested nuttx pixel formats:
Single Layer without LTDC interface support:
- FB_FMT_RGB8 (cmap support required)
- FB_FMT_RGB16_565
- FB_FMT_RGB24
Single Layer with LTDC interface support:
- FB_FMT_RGB8 (cmap support required)
- FB_FMT_RGB16_565
- FB_FMT_RGB24
Dual Layer with LTDC interface support:
- FB_FMT_RGB8 (cmap support required)
- FB_FMT_RGB16_565
- FB_FMT_RGB24
Why is FB_FMT_ARGB8888 missing?
Changes:
- Remove unused register debug method.
Todo:
- Add support for backlight, currently not neccessary
Did i forgot something? Take a look in the ltdc example or the interface
description (see nuttx/include/video/ltdc.h).
Thanks to Ken for the base layout. ;)
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
2014-12-19 13:48:53 -06:00
Gregory Nutt
83d87e5ef7
stm32: Add infrastructure for dma2d support
...
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
2014-12-19 13:41:08 -06:00
Gregory Nutt
060a61dfac
stm32: Add common stm32 layer description. This defines a common layer description for the ltdc and dma2d controller.
...
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
2014-12-19 13:37:08 -06:00
Gregory Nutt
df31cf1db8
stm32: configure PLLSAI clock to enable ltdc register access
...
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
2014-12-19 13:30:58 -06:00
Gregory Nutt
3385fe60cf
stm32: Add missing clut register definition
...
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
2014-12-19 13:28:42 -06:00
Gregory Nutt
e9074c8a44
stm32: rename CFBLR register name to the name used in the reference manual
...
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
2014-12-19 13:26:04 -06:00
Gregory Nutt
f181dcef29
stm32: rename PLLSAI register name to this one in the reference manual
...
Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
2014-12-19 13:21:39 -06:00
Gregory Nutt
58e4e69656
TM4C129X: Add custom system control header file (incomplete)
2014-12-19 12:12:52 -06:00
Gregory Nutt
da700ddc06
Tiva: Fix configuration logic for IRQ interrupts. The various parts support varying numbers of GPIO blocks and with varying capabilities to support interrupts on the pins of different GPIO blocks
2014-12-18 15:33:52 -06:00
Gregory Nutt
aabd4c59a3
Tiva: Change negative logic CONFIG_TIVA_DISABLE_GPIOx_IRQS to positive logic CONFIG_TIVA_GPIOx_IRQS
2014-12-18 15:19:16 -06:00
Gregory Nutt
83c56151ab
Tiva: Add GPIO interrupt support for the TMS4C129X
2014-12-18 11:52:06 -06:00
Gregory Nutt
a719e75851
DK-TM4C129X: Fixes to get clean build. Logic is still not complete, however
2014-12-18 08:24:24 -06:00
Gregory Nutt
05d7520461
TM4C129X: Add pin multiplexing
2014-12-17 11:55:45 -06:00
Gregory Nutt
327a554d0b
Tiva TM4C129X: Fix some errors in memory map
2014-12-17 09:42:37 -06:00
Gregory Nutt
14b987dbfa
Add memory map for the TM4C129X
2014-12-17 09:40:56 -06:00
Gregory Nutt
aa724ea75b
Add interrupt definitions for the TM4C129X
2014-12-17 08:19:23 -06:00
Gregory Nutt
29d23ae626
Remove packaging indications for TM4C129 configuration variables
2014-12-16 16:22:52 -06:00
Gregory Nutt
188e092398
Add TM4C129XNCZAD and TM4C1294NCPDT to the Tiva configuration system
2014-12-16 16:02:21 -06:00
Gregory Nutt
f284c5cab2
Unify sensor debug. ADX driver was using input debug; LM75 and QENCODE that their own custom debug. Now all use CONFIG_DEBUG_SENSOR, sndbg()
2014-12-16 09:54:32 -06:00
Gregory Nutt
da8b040984
More changes associated with GPIO interrupt for the KL architecture from Alan Carvalho de Assis
2014-12-13 17:30:25 -06:00
Gregory Nutt
810fcd297e
Add GPIO interrupt capability for the KL architecture. The patch is almost the same as kinetis_pinirq.c, just minor modifications and rename kl_pinirq to kl_gpioirq to make it more generic to developers. From Alan Carvalho de Assis
2014-12-13 17:27:06 -06:00
Gregory Nutt
a574a3cc8a
STM32 LTDC: Fix a typo in conditional compilation
2014-12-13 07:45:42 -06:00
Gregory Nutt
f8592281a7
STM32 OTG HS DEV (in FS mode): Disable ULPI clock enable in RCC AHB1 Register. If Both ULPI and the FS clock enable bits are set in FS mode, then the ARM never awakens froom WFI due to a chip issue. From Ken Pettit
2014-12-13 07:44:13 -06:00
Gregory Nutt
c653ff5ce4
Tiva I2C: Don't try to ACK and STOP on the same byte. Improve logic that suppresses STOP on a repeated start
2014-12-12 12:13:31 -06:00
Gregory Nutt
54c8d5c6e4
Tiva I2C: Legacy mode reset logic ommitted in last commit
2014-12-12 09:31:17 -06:00
Gregory Nutt
19ef820925
Tiva I2C: Add logic to reset I2C when busy hangs with busy
2014-12-12 09:26:10 -06:00
Gregory Nutt
dd3d417aed
STM32 OTGHS Device: Fix for OTGHS core working in FS mode. From Ken Pettit
2014-12-12 07:43:32 -06:00
Gregory Nutt
310983bee6
Cosmetic change to force compliance with coding standard
2014-12-12 07:14:16 -06:00
Gregory Nutt
1311e76adc
Tiva I2C: Fix how I2C transactions are started and some I2C error reporting
2014-12-11 12:31:42 -06:00
Gregory Nutt
04d8169f0f
Tiva I2C: All SDA pins should be open drain, but all SCL pins should be digital output
2014-12-11 12:30:48 -06:00
Gregory Nutt
218967b80e
Tiva I2C: Add register-level debug capability
2014-12-11 09:34:03 -06:00
Gregory Nutt
6a98255aa0
Tiva I2C: Minor clean-up to I2C tracing
2014-12-11 08:11:32 -06:00
Gregory Nutt
2e8ad53ed4
Tiva I2C: Fix error in assertion logic
2014-12-11 07:02:14 -06:00
Gregory Nutt
af31b219a3
Tiva I2C: Add I2C options to Kconfig
2014-12-10 13:56:00 -06:00
Gregory Nutt
37eb362b08
Tiva I2C: Add workaround for errata; clean up some error handling
2014-12-10 13:01:47 -06:00
Gregory Nutt
38bd919930
Tiva I2C: Driver is code complete but untested
2014-12-10 12:43:46 -06:00
Gregory Nutt
bdd5289100
Tiva i2C: Lots of compilation fixes
2014-12-10 08:47:34 -06:00
Gregory Nutt
0951d80d45
Simplify I2C master/slave addresing to simplify driver development
2014-12-10 08:47:07 -06:00
Gregory Nutt
3313cee55c
Tiva I2C: Finishes initialization logic
2014-12-10 07:31:44 -06:00
Gregory Nutt
7373e66213
Tiva: Do I2C clock initialization without using legacy registers. Necessary for I2C3-5
2014-12-09 15:28:10 -06:00
Gregory Nutt
90c98f8526
Add a little bit more Tiva I2C initialization logic
2014-12-09 14:48:24 -06:00
Gregory Nutt
f851a1328e
Fix typo in Tiva UART regiser address definition. SourceForge Ticket #37
2014-12-09 12:18:41 -06:00
Gregory Nutt
286a142a08
Tiva: Add build framework and skeleton files for Tiva I2C driver. Initial commit is just the STM32 I2C driver with name changes and STM32-specific logic removed
2014-12-09 12:18:40 -06:00
Gregory Nutt
1d43784c48
Update the Tiva I2C register definitions for the TM4C123 and TM4C129
2014-12-09 08:42:12 -06:00
Gregory Nutt
cb9e3c2bb9
Set the GPIO_SPEED_50MHz on all F2 and F4 SPI pin configurations. This is based on an F411 SPI1 errata but the fixed is generalized to all SPI and all F2 and F4 (let me know if this introduces any other issues). Discovered and fixed by Sebastien Lorquet after much consternation.
2014-12-08 09:51:52 -06:00
Gregory Nutt
e333132280
SAMA5D3 Xplained: Add support for the Itead Joystick shield
2014-12-03 12:24:23 -06:00
Gregory Nutt
6d7106424e
STM32: Add MCO configuration for the STM32L1xx. From Jussi Kivilinna
2014-12-02 10:19:37 -06:00
Gregory Nutt
13de352dcd
STM32L15: Fix typo in MCO pin definition. From Jussi Kivilinna
2014-12-02 10:18:02 -06:00
Gregory Nutt
f94052de26
Update comments
2014-11-29 15:28:28 -06:00
Gregory Nutt
eace825e3b
STM32 F4 I2C: Port Tridge's I2C noise resiliance logic from the PX4 repository.
2014-11-29 13:37:45 -06:00
Gregory Nutt
0d50608eae
Fix one warning. There are a couple of others that look like real problems
2014-11-28 11:49:24 -06:00
Gregory Nutt
70f778c02b
EFM32 Serial: Add support for termios TCGET and TCSET. For the moment, only set/get speed is implemetned. From Pierre-noel Bouteville
2014-11-27 19:14:10 -06:00
Gregory Nutt
3d55cd82ee
Forgot too add file before last commit
2014-11-27 06:14:09 -06:00
Gregory Nutt
0ad88d9664
Enable support for STM32F102. https://github.com/PX4/NuttX/pull/28.diff
2014-11-27 06:12:35 -06:00
Gregory Nutt
4f22093bfa
Initial support for the LPC4357-EVB provided by Toby Duckworth
2014-11-26 15:18:24 -06:00
Gregory Nutt
2c1f018e85
More fixes to problems noted by cppcheck. Some are kind of risky; some are real bugs.
2014-11-25 13:15:09 -06:00
Gregory Nutt
727a7c9e40
Fixes for more issues found by cppcheck
2014-11-24 17:00:26 -06:00
Gregory Nutt
697b0f8f19
More bugs/warnings found by cppcheck
2014-11-24 13:24:51 -06:00
Gregory Nutt
8becf3c18c
Various issues/bugs detected by cppcheck
2014-11-24 12:59:52 -06:00
Gregory Nutt
7dfb945979
I2C header file for the Freescale KL family. From Alan Carvalho de Assis.
2014-11-23 16:49:00 -06:00
Gregory Nutt
f548a10c6b
SAMA5D3 Xplained: Add an apps/examples/bridge configuration
2014-11-20 16:24:30 -06:00
Gregory Nutt
184ebdf191
STM32 F4 OTGHS device controller driver from Brennan Ashton
2014-11-20 07:19:04 -06:00
Gregory Nutt
7ab214d811
SAM EMAC: Fix typo in the check for successfull allocation of a timer
2014-11-18 14:20:31 -06:00
Gregory Nutt
7dd183fa50
SAMA5D4-EK EMAC1: Correct name of EMAC1 configuration variable
2014-11-18 11:02:22 -06:00
Gregory Nutt
62e94bc883
Cosmetic fixes to comments
2014-11-18 07:19:10 -06:00
Gregory Nutt
f4736a2042
Update ChangeLog
2014-11-17 12:48:01 -06:00
Gregory Nutt
2330c9c842
Rename CONFIG_NET_BUFSIZE to CONFIG_NET_ETH_MTU is all MCU Ethernet drivers
2014-11-16 08:10:06 -06:00
Gregory Nutt
da160bfee9
EFM32 USART setup: Computation of BAUD includes shift; Eliminate additional shift. From Pierre-noel Bouteville
2014-11-16 07:57:57 -06:00
Gregory Nutt
83e5ee1c04
SAM3/4: Add missing SPI0 clock configuartion macro for the SAM4S
2014-11-16 06:43:08 -06:00
Gregory Nutt
f4e947ee80
Remove use of NET_LL_HDRLEN from Ethernet drivers. Use ETH_HDRLEN instead
2014-11-15 09:05:34 -06:00
Gregory Nutt
bf984b2b3a
Netwoek: Ada a parameter to netdev_register() to indicate the link protocol supported by the driver. Use this value to replace some logic commited yesterday
2014-11-15 08:22:51 -06:00
Gregory Nutt
025e36ba8c
Cosmetic updates; updates to README
2014-11-14 09:54:00 -06:00
Gregory Nutt
a451f3b99e
EFM32: Finishes USB naming fixup. Still some missing initialization logic
2014-11-14 08:36:18 -06:00
Gregory Nutt
3a4e126f2d
EFM32: More USB naming updates. Still not finished
2014-11-14 07:20:13 -06:00
Gregory Nutt
d667b9072a
EFM32: More USB register name corrections. Still incomplete
2014-11-13 12:25:42 -06:00
Gregory Nutt
299b4db5de
EFM32: Finishes USB naming changes for device
2014-11-13 10:45:47 -06:00
Gregory Nutt
e69e2767ad
Correct a typo in the STM32 OTGFS register bit definitions
2014-11-13 10:43:54 -06:00
Gregory Nutt
312cb6ffa0
EFM32: Tweaks to get EFM32GG-STK3700 running NSH over LEUART0
2014-11-12 12:50:09 -06:00
Gregory Nutt
e424ddbabd
EFM32: More USB register name corrections. Still incomplete
2014-11-12 10:43:29 -06:00
Gregory Nutt
365afd95a6
EFM32: More USB register name corrections. Still incomplete
2014-11-12 09:46:58 -06:00
Gregory Nutt
123baad163
Add protection from C++ name mangling in the ARM up_internal.h. From Lorenz Meier.
2014-11-12 07:27:28 -06:00
Gregory Nutt
dc16ffe11a
Fix a typo in an I2C header file. From Jahu Niskanen
2014-11-11 07:12:16 -06:00
Gregory Nutt
c65372b80c
Support for the STM32F103RG. From Murilo Ponte
2014-11-10 07:48:46 -06:00
Gregory Nutt
089124ef8a
EFM32: Reduce writes to the CTRL register
2014-11-09 09:43:43 -06:00
Gregory Nutt
6ea107784d
EFM32: Fix issues associated with SPI bi order. From Pierre
2014-11-09 08:21:38 -06:00
Gregory Nutt
b96654347b
EFM32: Fix typo in connecting ODD GPIO interrupt. Noted by Pierre
2014-11-08 06:18:21 -06:00
Gregory Nutt
ceffd2f121
EFM32 USB: More naming fixes... still does not compile
2014-11-05 14:22:12 -06:00
Gregory Nutt
a2a2af526f
EFM32 USB: A few more naming conversions... still a long way to go
2014-11-04 11:48:41 -06:00
Gregory Nutt
d8bfd5a4d2
EFM32: Port USB device and host drivers from STM32. Still does not compile
2014-11-04 10:14:04 -06:00
Gregory Nutt
88dc7b3b3c
EFM32: Add USB build support
2014-11-04 06:47:14 -06:00
Gregory Nutt
9051ffd638
STM32GG Starter Kit: Add basic NSH configuration
2014-11-03 16:58:22 -06:00
Gregory Nutt
493ba46ec6
Fix typo is SAM4E pinmap file
2014-11-03 11:59:53 -06:00
Gregory Nutt
811d557053
EFM32 ROM table header files
2014-11-01 13:27:36 -06:00
Gregory Nutt
3189a1acc7
EFM32: Add LESENSE header file
2014-11-01 12:56:55 -06:00
Gregory Nutt
458992ca5b
EFM32: Add USB header file
2014-11-01 11:57:11 -06:00
Gregory Nutt
0f754bd6d7
Add optional timestamp to syslog output. From pn_bouteville@yahoo.fr
2014-11-01 09:17:34 -06:00
Gregory Nutt
3d2a34045b
Remove carriage returns
2014-11-01 08:06:50 -06:00
Gregory Nutt
918a74805c
ARMv7-M: ETM header file
2014-11-01 08:06:06 -06:00
Gregory Nutt
442c646955
EFTM32 ITM: Add missing ~ in bit clear operation. From pn_bouteville@yahoo.fr
2014-11-01 06:51:14 -06:00
Gregory Nutt
0f59ab369a
EFM32: Add LCD header file
2014-10-31 20:25:37 -06:00
Gregory Nutt
a36bb77e05
EFM32: Add DAC header file
2014-10-31 20:05:47 -06:00
Gregory Nutt
7f3bd970d7
EFM32: Add BURTC header file
2014-10-31 13:05:00 -06:00
Gregory Nutt
61300aa12e
EFM32: Add PRS signals
2014-10-31 12:30:01 -06:00
Gregory Nutt
a9fb2f78b5
EFM32: Add ADC heder file
2014-10-31 12:22:45 -06:00
Gregory Nutt
54af514ef6
EFM32: Add I2C header file
2014-10-31 12:07:57 -06:00
Gregory Nutt
ecd84c7844
EFM32: Add PRS header file
2014-10-31 11:47:40 -06:00
Gregory Nutt
4660eb6e1f
EFM32: Add PCNT header file
2014-10-31 11:34:00 -06:00
Gregory Nutt
acf5cbb3dc
EFM32: Add RMU header file
2014-10-31 11:17:12 -06:00
Gregory Nutt
afdf44e3c6
EFM32: Add EMU header file
2014-10-31 10:56:15 -06:00
Gregory Nutt
16c1eb924a
EFM32: Add VCMP header file
2014-10-31 10:41:28 -06:00
Gregory Nutt
f4fd24acb7
EFM32: Add RTC header file
2014-10-31 10:27:52 -06:00
Gregory Nutt
b984a7c9c0
EFM32: Add AES header file
2014-10-31 10:17:48 -06:00
Gregory Nutt
f081a9ccf5
EFM32: Add watchdog header file
2014-10-31 10:02:37 -06:00
Gregory Nutt
7e661442ed
EFM32: Add LETIMER header file
2014-10-31 09:54:26 -06:00
Gregory Nutt
c25f0062ce
EFM32: Add ACMP header file
2014-10-31 09:38:21 -06:00
Gregory Nutt
16c9292c3e
EFM32: Add timer header file
2014-10-31 09:27:15 -06:00
Gregory Nutt
6313e5dcb3
EFM32: Changes picked up from Pierre's repository
2014-10-30 18:01:46 -06:00
Gregory Nutt
0eaa74962c
Costmetic changes -- spacing, comments.
2014-10-30 16:33:40 -06:00
Gregory Nutt
05c1d9707d
SAM3/4: Fix error serial TERMIOS ioctl handling
2014-10-30 12:23:15 -06:00
Gregory Nutt
11ab9c908e
Add support for SAM3/4 basic TERMIOS and flow control. There are issues with IFLOW control: PDC or DMAC support is required
2014-10-29 15:47:15 -06:00
Gregory Nutt
692f63e3ee
EFM32: In order to use LEUART, LE clocking must be enabled
2014-10-29 11:20:54 -06:00
Gregory Nutt
4ec43d1002
EFM32: Various fixes for LEUART build
2014-10-29 09:37:39 -06:00
Gregory Nutt
2ea73f760c
EFM32: Minor serial interrupt mask change; Add LEUART0 board support
2014-10-29 08:04:29 -06:00
Gregory Nutt
7e697f2369
EFM32: Implement HFPERCLK logic
2014-10-28 19:46:45 -06:00
Gregory Nutt
b13b80e35f
Fix a few more EFM32 integration bugs
2014-10-28 19:02:21 -06:00
Gregory Nutt
4098d8c4a2
SAM4: Fix a usbnsh build problem that has crept into all serial drivers
2014-10-28 15:44:47 -06:00
Gregory Nutt
7edef0f970
EFM32: Need to configure UART GPIOs as outputs
2014-10-28 14:50:15 -06:00
Gregory Nutt
28ac9e5841
Oops... fix an error in an assertion of last commit
2014-10-28 12:42:19 -06:00
Gregory Nutt
77a622da0b
EFM32: Add missing shift of register value
2014-10-28 12:36:47 -06:00
Gregory Nutt
5ab16ee550
EFM32: Fix GPIO configuration logic; Add missing board initializatin logic; Fix LED naming
2014-10-28 10:39:57 -06:00
Gregory Nutt
1e6524cac8
EFM32G: Fix typo in memory map header file
2014-10-28 09:26:06 -06:00
Gregory Nutt
103e5dc791
SAM4E: Fix error TC header file
2014-10-28 09:22:37 -06:00
Gregory Nutt
3805a31473
EFM32: Correct a typo in LFXO bit in clock configuration
2014-10-28 08:59:27 -06:00
Gregory Nutt
027b7c5983
EFM32: Update a configuration; Compile fix for when DEBUG is enabled
2014-10-28 07:24:04 -06:00
Gregory Nutt
5ebc472f43
STM32 Serial: Don't compile up_earlyserialinit() if USE_EARLYSERIALINIT is not define. Otherwise, a macro definition clobbers the function definition
2014-10-28 06:58:37 -06:00
Gregory Nutt
60d2547cd7
Move selection for CONFIG_SERIAL_TERMIOS out of MCU Kconfigs to common drivers/serial/Kconfig. Add CONFIG_ARCH_HAVE_SERIAL_TERMIOS to indicate if an MCU supports TERMIOS
2014-10-27 11:31:16 -06:00