Basically, it reserves an area of the RTC memory to preserve the
RTC timer.
Please refer to:
fa76c82a5b
This commit also removes the rtc.dummy section because C3, C6 and
H2 don't need to skip it once the region is accessed by the same
address space using the instruction and data bus.
The length of the IROM and DROM segments should be related to the extent
of the address space, and not be limited to the capacity of the External
Flash device.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
Initially supporting ESP32-C3 chip, to be followed by other RISC-V-based
chips from Espressif.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
