Commit Graph

2027 Commits

Author SHA1 Message Date
ChenWen
6ce335fa84 xtensa/esp32: Fix some Wi-Fi issues
1. Fix the issue that Wi-Fi can't connect to some special routers occasionally.
    2. Update Wi-Fi driver code to fix issue of failure to send pkt.
    3. Replace software random with hardware random
2021-12-28 23:48:25 -06:00
Xiang Xiao
f768e1268b boards/sim: Remove sim_tsc_setup
since all NX and VNC initialization should be initiated from
user space through BOARDIOC_NX_START and BOARDIOC_VNC_START

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-12-28 17:14:04 -03:00
Huang Qi
d71cfc178a arch/risc-v: Remove unneeded kconfigs
CONFIG_RV32IM_HW_MULDIV can be safely removed since this behavior is
controlled by M extension.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-12-28 05:02:42 -06:00
Huang Qi
c2e8c92b25 arch/risc-v: Refine Toolchain.defs
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-12-28 00:30:10 -06:00
chao.an
cbd82f1c1b compile/flags: remove redundant -fomit-frame-pointer from board flags
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-12-27 22:31:27 -06:00
Petro Karashchenko
3ccb657dc2 nuttx: remove space befone newline in logs
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2021-12-27 21:01:19 -06:00
Xiang Xiao
540c6f8c39 esp32-devkitc: Change CONFIG_USER_ENTRYPOINT to CONFIG_INIT_ENTRYPOINT
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-12-25 18:05:59 +08:00
ligd
412d030149 boards: move USERMAIN_XX out of INIT_ENTRYPOINT
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-12-24 08:23:30 -06:00
Alan C. Assis
36389dab76 Add board support to SHT3X sensor 2021-12-24 08:11:51 -06:00
Alan C. Assis
01e4e249cc Add WiFi/BLE Coexistence support
Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-12-23 20:42:23 -06:00
Eero Nurkkala
509350a614 risc-v/mpfs: update m100pfsevp board info
Update the cache settings for the Aries m100pfsevp board. This
assigns scratchpad ways for this board as well, as seen in the
commit 491ae6c.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-12-23 06:55:18 -06:00
Eero Nurkkala
b128ce334f mpfs: introduce OpenSBI
OpenSBI may be compiled as an external library. OpenSBI commit d249d65
(Dec. 11, 2021) needs to be reverted as it causes memcpy / memcmp to
end up in the wrong section. That issue has yet no known workaround.

OpenSBI may be lauched from the hart0 (e51). It will start the U-Boot
and eventually the Linux kernel on harts 1-4.

OpenSBI, once initialized properly, will trap and handle illegal
instructions (for example, CSR time) and unaligned address accesses
among other things.

Due to size size limitations for the mpfs eNVM area where the NuttX
is located, we actually set up the OpenSBI on its own section which
is in the bottom of the DDR memory. Special care must be taken so that
the kernel doesn't override the OpenSBI. For example, the Linux device
tree may reserve some space from the beginning:

  opensbi_reserved: opensbi@80000000 {
      reg = <0x80000000 0x200000>;
      label = "opensbi-reserved";
  };

The resulting nuttx.bin file is very large, but objcopy is used to
create the final binary images for the regions (eNVM and DDR) using
the nuttx elf file.

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-12-22 20:48:12 -06:00
Eero Nurkkala
491ae6cc53 mpfs: cache: assign ways to L2 zero device
Assign ways to L2 zerodevice. L2 zero device is used for
the scratchpad functionality. The area may be used for the
harts communicating to each other.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-12-22 20:48:12 -06:00
Alan C. Assis
aa41b9732a boards/esp32: Enable canaries stack protection to ESP32 chips 2021-12-21 08:46:46 -06:00
Juha Niskanen
422ceec99b Fix typos in comments and Kconfig files
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
2021-12-21 03:26:16 -06:00
Ryan Abel
fd9ef2f6a2 fix: Correct issues with userled support on the Nucleo F4x1RE.
Remove space following left parenthesis.

Add space after comment.

Update stm32_bringup.c
2021-12-18 09:11:44 -06:00
raiden00pl
26c7ec5087 boards/arm/nrf52/nrf52832-dk: add sdc support 2021-12-17 11:24:48 -06:00
raiden00pl
4812f9f390 boards/arm/nrf52/nrf52840-dk: add sdc support 2021-12-17 11:24:48 -06:00
raiden00pl
2bb01b25bd boards/arm/nrf52/nrf52832-dk: add procfs support 2021-12-17 11:24:48 -06:00
raiden00pl
ff25063c62 boards/arm/nrf52/nrf52840-dk: add procfs support 2021-12-17 11:24:48 -06:00
Alexander Lunev
12c128ae43 boards/emw3162: enabled internal pull-up resistors on SDIO bus
in STM32F205 chip as there are not external pull-up resistors on SDIO bus on EMW3162 module.
2021-12-16 07:16:49 -06:00
Gerson Fernando Budke
24c0e8bc75 boards/arm/samv7/samv71-xult: Add MCUboot support
Refactor to use common sam_progmem implementation and enable MCUboot
support.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-12-16 06:56:42 -03:00
Gerson Fernando Budke
a6fc88740c boards/arm/samv7: Move MCUboot to common folder
Move MCUboot bootloader implementation to samv7 common folder. This drop
all duplicated code and unify implementation.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-12-16 06:56:42 -03:00
Gerson Fernando Budke
b5868aed6f boards/arm/samv7: Introduce common folder
This introduce common folder structre and rework scripts & tools
files. The linker scripts were reorganized to use best the current
infrastructure which uses a template to create a final samv7.ld
file based in the current SoC memories and bootloader definitions.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-12-16 06:56:42 -03:00
Gerson Fernando Budke
463fbfe975 boards/arm/samv7: Unify linker scripts
After define memory sizes for samv7 it is possible unify linker scripts.
This add necessary changes to perform such operation.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-12-16 06:56:42 -03:00
Gerson Fernando Budke
2dd5578d50 arch/arm/src/samv7/Kconfig: Define mem sizes
Current samv7 platform does not define SoC memories sizes. This define
both internal flash and sram memories sizes and update all defconfig
files.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-12-16 06:56:42 -03:00
zhanghu6
d05b9a9c79 note dump: add CONFIG_SCHED_INSTRUMENTATION_SWITCH
1. If CONFIG_SCHED_INSTRUMENTATION_SWITCH is enabled, then these additional interfaces are expected:
        sched_note_suspend
        sched_note_resume
at the same time,If CONFIG_SMP is enabled,then expected:
        sched_note_cpu_pause
        sched_note_cpu_paused
        sched_note_cpu_resume
        sched_note_cpu_resumed
2. other board if enable SCHED_INSTRUMENTATION,SCHED_INSTRUMENTATION_SWITCH to defconfig.
2021-12-15 07:07:00 -06:00
Petro Karashchenko
51a2db6ffc Kconfig: improve uniformity
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2021-12-14 07:32:48 -06:00
Masayuki Ishikawa
5bae799238 boards: spresense: Adjust CONFIG_FAT_MAXFNAME and CONFIG_NAME_MAX
Summary:
- This commits adjusts the following settings for spresense
- CONFIG_FAT_MAXFNAME : 255 to 128
- CONFIG_NAME_MAX : 765 to 128

Impact:
- None

Testing:
- Tested with spresense:wifi_smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-12-13 23:36:49 -06:00
Abdelatif Guettouche
93def58b9d esp32-wrover-kit/esp32_autoleds.c: Use LEDs to show CPUs activity.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-12-13 08:30:58 -06:00
Huang Qi
8ce3337e85 arch/risc-v: Implement TLS support
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-12-12 10:19:00 -06:00
Masayuki Ishikawa
8438813ebe boards: spresense: Update smp/defconfig
Summary:
- Add CONFIG_ARCH_LEDS_CPU_ACTIVITY=y
- Add CONFIG_BOARDCTL_RESET=y

Impact:
- None

Testing:
- Tested with ostest

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-12-10 06:46:22 -06:00
Jari van Ewijk
2e47ef32cf GPIO driver: register all pintypes as generic /dev/gpioN 2021-12-09 23:55:12 -06:00
Jari van Ewijk
bcf9b4e5cd timer-gpout example renamed to timer-gpio 2021-12-09 12:00:36 -06:00
Xiang Xiao
334bb9768a Revert "sim: Specify -fshort-wchar as NuttX wchar_t is 16-bit"
It's better to apply the default compiler option to improve the compatibility
This reverts commit 3fc06ff2d1.
2021-12-09 16:57:23 +09:00
Huang Qi
58e0781e2e arch/arm: Implement TLS support
Signed-off-by: Huang Qi <no1wudi@qq.com>
2021-12-07 23:31:41 -06:00
Huang Qi
3d4be7089c drivers/serial/uart_16550: Fix warning for format
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-12-07 23:28:33 -06:00
Huang Qi
63ab2f4308 arch/risc-v: Introduce basic support for qemu rv32
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-12-07 23:28:33 -06:00
fenghang
c39ef4420e 1.phyplus update files to accord with the requirement of chcekpatch.sh
2.fix some files to fix compile warning

3.remove blueteeth header files, which are not used in nuttx core.

4.fix configs and add lost files

5.update defconfig, remove useless items

6.fix compile warning for nuttx phyplus

7.delete useless: ble, h4, zblue defconfig files form phyplus configure folder

8.fix file format check error on phyplus source code

9.fix phyplus kconfig param error

10.update configure file for nuttx
2021-12-07 01:37:29 -06:00
fenghang
073c9880a3 phyplus first submit 2021-12-07 01:37:29 -06:00
Masayuki Ishikawa
264a03f04c boards: lc823450-xgevk: Update bt/defconfig for SMP
Summary:
- Remove dvfs, netinit, pipe, instrumentation, hpwork
- Add SMP related configs, ntpc

Impact:
- lc823450-xgevk:bt only

Testing:
- Tested with ostest and btstack (external)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-12-06 22:10:15 -06:00
Dong Heng
698f1f76ff risc-v/esp32c3: Refactor SPI Flash to support umask interrupt when R/W/E SPI Flash
This can fix BLE assert when erase SPI Flash.
2021-12-06 13:13:11 +09:00
raiden00pl
59786bf208 boards/nucleo-f302r8: add 3ph Hall sensor support 2021-12-04 08:51:25 -06:00
ligd
4dfefb4e06 boards/sim: update sim for 'merge hostfs_rpmsg to rpmsgfs'
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-12-04 01:04:18 -06:00
Petro Karashchenko
d4a5003376 board/same70-xplained: MCUboot related improvements
- simplify LDSCRIPT file name selection
- rename CONFIG_SAME70XPLAINED_APP_FORMAT_MCUBOOT to
  CONFIG_SAME70XPLAINED_FORMAT_MCUBOOT
- fix usage of SAME70XPLAINED_PROGMEM_OTA_PARTITION
  config option

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2021-11-29 23:53:46 -06:00
Petro Karashchenko
4b2b7d1d91 boards/same70-qmtech: add support of SAME70 QMTECH board
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2021-11-29 11:17:47 -06:00
Petro Karashchenko
31809724e1 boards/same70-xplained: disable systick before loading MCUboot application
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2021-11-28 20:33:53 -06:00
Gerson Fernando Budke
5c1cefd09d boards/arm/samv7/samv71-xult: Set console at usart1
Set default console port to USART1. This allows easy access to serial
console by embedded debug CDC-ACM driver.

The README is updated with correct information about PB04 use once
samv71-xult can only be debugged using SWD mode. This means that it is
safe use CDC-ACM as default serial console.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-11-28 20:32:13 -06:00
Petro Karashchenko
919aeced30 boards/same70-xplained: fix usage of SAMV71XULT instead of SAME70XPLAINED
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2021-11-27 16:06:48 -03:00
Petro Karashchenko
7ba330dff1 boards/same70-xplained/scripts: fix memory region size for MCUboot app
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2021-11-27 16:06:31 -03:00