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6d3e291da1
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3451 Commits

Author SHA1 Message Date
Gregory Nutt
6d3e291da1 Tiva Timer: Remove a big chunk of unnecessary logic 2015-01-13 17:08:37 -06:00
Gregory Nutt
1d2a4f3b4c Tiva Timer: Timer test must attach a timer handler or the timer is stopped at the first interrupt 2015-01-13 15:55:54 -06:00
Gregory Nutt
3efd127e64 Timer Timer: Timer driver now initializes without complaints. Need a test driver of some kind to make more testing progress. 2015-01-13 11:49:00 -06:00
Gregory Nutt
9c3dce06e1 DK-TM3C129X Timer: Add timer initialization logic to the board bring-up 2015-01-13 11:10:35 -06:00
Gregory Nutt
47b04339d2 Tiva Timer: Rename tiva_timerlow.c to tiva_timerlow32.c since it only supports 32-bit periodic timers 2015-01-13 10:10:02 -06:00
Gregory Nutt
1ae213c0b6 Tiva Timer: Completes implementation of the timer driver lower half 2015-01-13 10:06:40 -06:00
Gregory Nutt
72cd8e57a9 Tiva Timer: Allow timeout interrupts even if the reload value is zero. That is the value that is need to get an interrupt on the wrap from 0xffffffff to 0x00000000 2015-01-13 08:29:25 -06:00
Gregory Nutt
b1697c7ff4 Tiva Timer: Add conditional compilation to enable/disable each timer feature. Not only does this reduce the footprint by suppressing unused features, it also protects from partially implemented features that are now conditioned on EXPERIMENTAL 2015-01-13 07:49:20 -06:00
Gregory Nutt
f3438d0d68 Tiva Timer: Rename tiva_timer.c to tiva_timerlib.c 2015-01-12 15:55:41 -06:00
Gregory Nutt
bbfc5cf747 Tiva Timer: First cut at timer driver lower half (still incomplete) 2015-01-12 15:52:48 -06:00
Gregory Nutt
c93b205eea Tiva Interrupts: Changes corresponding to the last needed in the Tiva Kconfig file as well 2015-01-12 10:14:48 -06:00
Gregory Nutt
b9dcced1aa Tiva interrupts: Fix chip-specific interrupt un-definitions 2015-01-12 10:00:42 -06:00
Gregory Nutt
487f9a3be9 Tiva Timers: Add interfaces to read the current timer value 2015-01-12 10:00:41 -06:00
Gregory Nutt
31a94816b2 USB host drivers: Change all parmeters named class to usbclass to avoid C++ conflicts 2015-01-11 08:05:09 -06:00
Gregory Nutt
2444605b95 Tiva Timer: Fix a typo 2015-01-10 12:42:39 -06:00
Gregory Nutt
d09a9e2741 Tiva Timer: Implements configuration of the 32-bit RTC timer 2015-01-10 12:41:15 -06:00
Gregory Nutt
2c6cf27405 Tiva Timer: Add support for RTC match interrupts 2015-01-10 12:22:37 -06:00
Gregory Nutt
1ea2f5da1c Tive Timer: Add support for ADC trigger generation from one-shot and periodic timers for timeout and match evetns 2015-01-10 10:07:56 -06:00
Gregory Nutt
9cead4170b Tiva Timer: Add support to set the match regiser(s) relative to the timer counter (and prescale) registers. Enable match interrupts. These are one time interruprts: After the match interrupt is dispatched, further match interrupts are disabled 2015-01-10 08:34:39 -06:00
Gregory Nutt
fa4a54c5ad Tiva Timer: Add support for input clock prescaler in 16-bit one-shot/periodic modes 2015-01-09 16:49:00 -06:00
Gregory Nutt
3544eb2fdf Tiva Timer: Add logic to acknowledge Tiva Timer interrupts 2015-01-09 15:01:49 -06:00
Gregory Nutt
64530008ba Tive System Control: Add logic to configure the alternatie clock source (ALTCLK). Needed by the Tiva timer module 2015-01-09 14:10:31 -06:00
Gregory Nutt
9531dd1a80 Tiva Timer: Add more interrupt management logic 2015-01-09 13:29:03 -06:00
Gregory Nutt
59555646c5 Tiva Timer: Add functions to set match registers; Add logic to select count direction 2015-01-09 12:05:26 -06:00
Gregory Nutt
c092ecb131 Tiva Timer: Add interfaces to start/stop timers and to set the interval load registers. 2015-01-09 11:07:52 -06:00
Gregory Nutt
db556691f3 Tiva Timers: Add framework to support tmer interrupts 2015-01-09 10:21:59 -06:00
Gregory Nutt
f787440a04 STM32 SDIO: Don't let architectures select CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE unless they have implemented SDIOWAIT_WRCOMPLETE 2015-01-08 17:47:34 -06:00
Gregory Nutt
45e09d9df7 Tiva Timer: Partial support for 16- and 32-bit, oneshot and periodic timer configurations 2015-01-08 13:44:10 -06:00
Gregory Nutt
4357af2493 Tiva Timer: Add support to select alternate clock source and 32-bit register concatenation mode. 2015-01-08 11:08:54 -06:00
Gregory Nutt
6715926fab Tiva Timer: Add register level debug support 2015-01-08 10:14:38 -06:00
Gregory Nutt
737108e066 Tiva Timer: Add basic framework to configure timers. Incomplete on initial commit 2015-01-08 09:47:38 -06:00
Gregory Nutt
4224fd0edc Tiva Timer: SYNC regiser is only available on GPTM0 2015-01-08 08:07:31 -06:00
Gregory Nutt
ff02574863 Tiva Timer: Update timer register bit definitions for the LM4F 2015-01-08 08:03:47 -06:00
Gregory Nutt
54bf159bdb Tiva Timer: Extend timer register definitions to handle other chips 2015-01-08 07:56:00 -06:00
Gregory Nutt
1842525cc2 MMCSD SDIO: Add support for a new SDWAIT_WRCOMPLETE condition. The previous logic used a busy-wait loop to pool the card R1 start to determine when the card was ready for the next transfer. That busy-wait can be quite long -- hundreds of milliseconds. And alternative is to look the the SD D0 pin which will change state when the card is no longer busy. 
This logic implements a change the avoids the busy-wait poll by reconfiguring the SD D0 pin as a GPIO interrupt, then waiting for the card to becom ready without taking up CPU cycles.

This change is conditioned on CONFIG_MMCSD_SDIOWATI_WRCOMPLETE and is currenlty only implemented for the STM32 SDIO driver.

From David Sidrane
 2015-01-08 06:23:42 -06:00
Gregory Nutt
1f10c56dd0 Tiva Timer: Missed one register bit field definition 2015-01-07 12:03:08 -06:00
Gregory Nutt
6a4935f12b TM4C129X Timer: Completes timer register definition header file 2015-01-07 11:43:56 -06:00
Gregory Nutt
a1065a919a TM4C129X Timer: Add some missing addresses and some of the register bit definitions. Still incomplete 2015-01-07 10:07:47 -06:00
Gregory Nutt
7be7ace918 TM4C129X Timer: Update addresses in the timer register definitions file. Still missing bit field definitions 2015-01-07 08:57:48 -06:00
Gregory Nutt
7277d66529 Tiva IRQs: Fix IRQ control logic; was limited to only 64 IRQs. That is a problem for higher numbered IRQs on many platforms 2015-01-06 10:49:47 -06:00
Gregory Nutt
6f8125bf61 Tiva I2C: For TM4C, high speed mode is now configurable (but disabled as EXPERIMENTAL) 2015-01-06 10:48:08 -06:00
Gregory Nutt
207835bd0d Tiva PHY Interrupts: Need to read the PHY interrupt status register in order to clear the pending PHY interrupt 2015-01-05 15:12:45 -06:00
Gregory Nutt
317b7efc7f Tiva: Fixes to support building Tiva TM4C129X I2C driver 2015-01-05 13:15:40 -06:00
Gregory Nutt
b6fbf41925 Tiva: Update I2C register definitions to include support for the TM4C129X 2015-01-05 13:08:07 -06:00
Gregory Nutt
5752f301de Tiva Ethernet: Add support for PHY interrupts 2015-01-03 13:16:26 -06:00
Gregory Nutt
bb76c88f19 Tiva Ethernet: Configure external PHY interrupt pin 2015-01-03 10:59:12 -06:00
Gregory Nutt
84c809afe4 Tiva Ethernet: Removed logic that holds the PHY and re-ordered some reset logic. Can not ping the DK 2015-01-03 09:28:54 -06:00
Gregory Nutt
1f013b220d Tive Ethernet: Wait for EMAC to come out of reset before accessing any registers 2015-01-03 06:52:19 -06:00
Gregory Nutt
24f8fd53ab Tiva serial: Add volatile to fix a wait loop that was not waiting; CR really should preced LF in CR-LF expansion 2015-01-02 14:05:42 -06:00
Gregory Nutt
52aeabb4b2 Cosmetic changes 2015-01-02 13:59:47 -06:00