Commit Graph

6002 Commits

Author SHA1 Message Date
Gregory Nutt
6e000dc4fa i.MX6: Need to mapping OCRAM before enabling MMU because the page table lies in OCRAM 2016-03-29 17:51:58 -06:00
Gregory Nutt
426a6dae74 i.MX6: Fix missing DRAM mapping 2016-03-29 17:16:46 -06:00
Gregory Nutt
679a26cdf8 Update some comments 2016-03-29 15:35:47 -06:00
Gregory Nutt
1c56b8dd87 Update some ARM registers for Cortex-A9 2016-03-29 11:47:35 -06:00
Michael Spahlinger
940075f629 SAMV71/SAME70: Error in UART1 Pinmapping corrected 2016-03-29 07:25:37 -06:00
Dave
f9c2f70b36 STM32L4 PWR: Fix reversed parameters in putreg32() 2016-03-29 07:19:00 -06:00
Sebastien Lorquet
8fdef878ba Minor optimization to PR #60 2016-03-29 07:13:24 -06:00
Gregory Nutt
446618a644 Misc. trivial changes from review of last PR 2016-03-27 13:15:49 -06:00
Gregory Nutt
2a54bf91e5 Merged in ziggurat29/arch/stm32l4_lse (pull request #60)
Stm32l4_lse support
2016-03-27 13:06:55 -06:00
Gregory Nutt
267e20c729 PM: Add domain to all PM interfaces. Internal PM data structures now handle multiple PM domains. 2016-03-27 13:01:32 -06:00
Gregory Nutt
32acc35c88 PM: Add activity domain to all PM callbacks 2016-03-27 11:18:54 -06:00
ziggurat29
5bd7b7b54c add support for LSE oscillator configuration; requires also initial support of PWR control block 2016-03-27 12:07:47 -05:00
ziggurat29
cc53b25dbd fix typos in names of some LSE-related constants 2016-03-27 10:48:02 -05:00
ziggurat29
860a139ba0 trivial; update stm32l4 readme indicating things recently completed 2016-03-26 11:58:30 -05:00
Gregory Nutt
a52f638d7e Eliminate a warning 2016-03-25 14:59:53 -06:00
Gregory Nutt
03a31fca25 Misc costmetic changes from review of last PR 2016-03-25 14:35:35 -06:00
ziggurat29
c856bbb264 support RNG on STM32L4. add support for SAI1PLL and SAI2PLL. fix some errors in defines and configs. 2016-03-25 11:31:23 -05:00
Sebastien Lorquet
b2e7f63a7b Fix for bad type in stm32l4_spi.c 2016-03-24 08:18:30 -06:00
Gregory Nutt
35707e4d48 SIM: Update scheduler implementation to match prototype changes 2016-03-22 18:18:37 -06:00
Gregory Nutt
e767df5994 SIM: Add another name to the NuttX names list 2016-03-22 13:00:09 -06:00
Gregory Nutt
be5b79875f Fix an error in the simulator version of up_unblock_task() 2016-03-21 15:20:14 -06:00
Gregory Nutt
ad611e2cca Merged in paulpatience/nuttx-arch (pull request #58)
STM32 DAC: Fix DMA support for STM32F2xxx and STM32F4xxx
2016-03-20 15:33:55 -06:00
Paul A. Patience
2f187f8714 STM32 DAC: Fix DMA support for STM32F2xxx and STM32F4xxx 2016-03-20 17:26:40 -04:00
Gregory Nutt
748edc0445 Fix a error in the previous commit 2016-03-20 14:23:45 -06:00
Gregory Nutt
e0249bd025 STM32L4: Fix incorrect and conflicting definitions for STM32L4_NGPIOS and STM32L4_NGPIO_PORTS. Now there is only STM32L4_NPORTS. 2016-03-20 14:12:07 -06:00
Gregory Nutt
f7d3b8147f Rename CONFIG_NET_MULTICAST to avoid name conflicts 2016-03-20 13:14:36 -06:00
Gregory Nutt
47b36e9de4 i.MX6: Fix uninitialized variable warning in GPIO logic 2016-03-19 13:59:50 -06:00
Gregory Nutt
2a15f73fd3 SAMV7 USB: Eliminate a warning 2016-03-17 17:43:29 -06:00
Gregory Nutt
0ff29023f1 SAMV7 USB: Fix a DMA related issue. When DMA completes with NBUSYBK greater than zero, need to way for NBUSYBK interrupt. 2016-03-17 17:43:29 -06:00
Gregory Nutt
bd846c2e72 All architectures: Register the schedule note driver if enabled 2016-03-17 17:00:59 -06:00
Gregory Nutt
82c58eb609 SIM: Register the schedule note driver if enabled 2016-03-17 14:43:29 -06:00
Gregory Nutt
8fbe5b6243 sim: Omit built-in scheduler imstrumentation if buffered instrumentation is selected. 2016-03-17 09:50:33 -06:00
Gregory Nutt
b1c09dc0c5 i.MX6: Hmm.. I think the i.MX6 Solo Lite has global and private timers. Note cleare from the reference manual 2016-03-16 10:54:55 -06:00
Gregory Nutt
e1ff2af690 All i.MX6 family members have GIC 390; SoloLite does not seem to have MPCore timers 2016-03-14 13:41:53 -06:00
Gregory Nutt
dcc93a7a44 Make it clear that GIC support is GICv2 2016-03-14 10:50:54 -06:00
Gregory Nutt
41b3af52b7 i.MX6: Revamp GIC initialization logic; add missing register bit definitions and initialization of GIC control register for secure cases 2016-03-13 10:12:45 -06:00
Gregory Nutt
411cf0ba1f SMP: Add per-CPU initialization logic 2016-03-13 07:16:26 -06:00
Gregory Nutt
2b2f157569 Forgot to add a file before last commit 2016-03-12 15:28:58 -06:00
Gregory Nutt
6288e381ee Conform to revised SMP interfaces. Improve i.MX6 SMP startup handshake. 2016-03-12 15:22:45 -06:00
Gregory Nutt
8ad1188fe5 i.MX6: Finish initial cut at all SMP support 2016-03-12 13:23:49 -06:00
Gregory Nutt
9addc363f5 i.MX6 no longer depends on EXPERIMENTAL 2016-03-12 11:46:53 -06:00
Gregory Nutt
11f3554153 i.MX6: Kconfg needs to autoselect ARCH_HAVE_TRUSTZONE 2016-03-12 11:40:27 -06:00
Gregory Nutt
cbe7321508 i.MX6: Finish GIC initialization 2016-03-12 11:38:16 -06:00
Gregory Nutt
08fa7a0c6b Rename CONFIG_SAMA5_HAVE_TRUSTZONE to CONFIG_ARCH_HAVE_TRUSTZONE; Eliminate CONFIG_SAMA5_SECURE; Add CONFIG_ARCH_TRUSTZONE_SECURE 2016-03-12 10:53:22 -06:00
Gregory Nutt
a1ee5ae6e5 EFM32 Serial: Fix typo in initializer. Noted by Pierre-noel Bouteville 2016-03-12 08:53:41 -06:00
Gregory Nutt
a74c19bbae SIM: Add TLS support to to the simulator 2016-03-11 14:03:27 -06:00
Gregory Nutt
4d484399a9 ARM: Remove some obsolete and incorrect conditional compilation 2016-03-11 12:42:58 -06:00
Michael Spahlinger
faa0c4f1ca SAMV7: MCAN: Correct typo in MCAN0 configuration 2016-03-11 12:30:57 -06:00
Gregory Nutt
4e07680554 TLS: Forgot to add a file before last commit 2016-03-11 12:30:04 -06:00
Gregory Nutt
87e7e135ba i.MX6: GIC decode and prioritization logic 2016-03-11 09:49:00 -06:00