Commit Graph

51402 Commits

Author SHA1 Message Date
Michal Lenc
6e4ffb9ea1 ci: add fopencookie test
This adds fopencookie test for simulator CI.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-10-18 21:13:01 +08:00
Michal Lenc
0a107ca6d9 libc: add support for custom streams with fopencookie()
This commit adds support for custom stream via fopencookie function.
The function allows the programmer the create his own custom stream
for IO operations and hook his custom functions to it.

This is a non POSIX interface defined in Standard C library and implemented
according to it. The only difference is in usage of off_t instead of
off64_t. Programmer can use 64 bits offset if CONFIG_FS_LARGEFILE is
enabled. In that case off_t is defined as int64_t (int32_t otherwise).

Field fs_fd is removed from file_struct and fs_cookie is used instead
as a shared variable for file descriptor or user defined cookie.

The interface will be useful for future fmemopen implementation.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-10-18 21:13:01 +08:00
zhangyuan21
083c87b39a sched: Exit immediately when cpuset change to 0.
Exit immediately when finished processing the current CPU
if there are no other CPUs to be processed.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-10-18 21:12:35 +08:00
Masayuki Ishikawa
a98650f609 arch: arm64: Remove unnecessary code in arm64_cpu_idle.S
Summary:
- I noticed that irq is enabled explicitly in arm64_cpu_idle.S
- The code is unnecessary since tasks, including the idle task,
  are created with irq enabled in up_initial_state()

Impact:
- Should be none

Testing:
- qemu-armv8a:netnsh_smp_hv with qemu-7.2.4

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2023-10-18 17:06:29 +08:00
makejian
3dbe2d790e crypto/rsa_verify: export rsa verify via /dev/crypto
kernel supports asymmetric encryption RSA signature verification
Signed-off-by: makejian <makejian@xiaomi.com>
2023-10-18 12:23:13 +08:00
makejian
aeac109e50 crypto/bn:Add exponentiation algorithm in bignum
add exponentiation algorithm: pow_mod_faster
Signed-off-by: makejian <makejian@xiaomi.com>
2023-10-18 12:23:13 +08:00
makejian
12935f2d33 crypto/bn: porting tiny-Bignum-C into nuttx crypto
porting from https://github.com/kokke/tiny-bignum-c commit ac136565378c624365e0f5f556d386b3966bff32 and adapting to the nuttx
Signed-off-by: makejian <makejian@xiaomi.com>
2023-10-18 12:23:13 +08:00
zhangyuan21
48ca996ad7 arch: arm64 support smp function call
Add up_send_smp_call function to support smp function call.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-10-18 09:57:50 +08:00
zhangyuan21
34412349e9 sched: add smp function call
Support smp function call, calling smp_call_function allows
a specific core to execute a function. It should be noted
that there should be no waiting operations in the executed
function.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-10-18 09:57:50 +08:00
simbit18
b5d640acc5 fix Cygwin/MSYS2 ld: unrecognized option '-z'
The '-z' options don't supported for Windows versions of ld.
2023-10-18 01:23:39 +08:00
Xiang Xiao
a34be7f7c2 sched: Remove the unused tcb argument from group_setupidlefiles
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-10-17 17:23:05 +03:00
Ville Juven
0e75e53cc8 mpfs_head.S: Simplify clearing PMP
Initially clear PMP for all harts, this fixes random warm reset issues.

Signed-off-by: Ville Juven <ville.juven@unikie.com>
2023-10-17 20:13:09 +08:00
Christian Catchpole
495253385f improve macOS install docs 2023-10-17 17:53:42 +08:00
Dong Heng
1cb17b8a6a boards/esp32s3-box: Support hardware version 3
config/lvgl: For old ESP32-S3-BOX board
config/lvgl-3: For new ESP32-S3-BOX-3 board
2023-10-17 17:32:32 +08:00
makejian
be72a6e26f math/mpi: add mpi driver in math
add interface for MPI(Multiple Precision Integer) registration in /math/mpi
Signed-off-by: makejian <makejian@xiaomi.com>
2023-10-17 13:43:43 +08:00
Xiang Xiao
b1c8c84e81 stdio: Merge fs_fdopen into fdopen to simplify the code logi
since fs_fdopen could avoid call the kernel specific function now

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-10-17 13:34:00 +08:00
Xiang Xiao
62c2b1abba stdio: Initialize stdin, stdout and stderr directly
and then remove group_setupstreams

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-10-17 13:34:00 +08:00
Xiang Xiao
b0d197534f stdio: Move lib_stream_[initialize|release] from libc/stdio to sched/tls
both functions aren't suitable to be put into libc,
because they call the kernel internal functions directly.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-10-17 13:34:00 +08:00
Xiang Xiao
b892ec5c6e libc/machine: Remove FAR from sparc
since sparc is 32bit arcch, FAR is useless

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-10-17 13:15:48 +08:00
yinshengkai
58c6b60df5 note: remove remaining event code
Some event-related codes were missed in the previous modification and have not been deleted.

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2023-10-17 09:07:06 +08:00
Simon Filgis
882afc885e channel gain switching in aefc by ioctl
Update arch/arm/include/samv7/sam_afec.h

remove "offset may be uninitialized" warning

Update arch/arm/include/samv7/sam_afec.h

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>

Update arch/arm/include/samv7/sam_afec.h

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>

Update arch/arm/src/samv7/sam_afec.c

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>

Update arch/arm/src/samv7/sam_afec.c

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>

Update arch/arm/include/samv7/sam_afec.h

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>

Update arch/arm/include/samv7/sam_afec.h

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>

remove blank line
2023-10-16 21:55:40 +08:00
Ville Juven
3f878d8100 mpfs_ethernet.c: Release tx descriptor and rx buffer properly
Instead of releasing rx descriptor twice and tx buffer twice.
2023-10-16 21:54:31 +08:00
Ville Juven
ee9e41f2dd mpfs_ethernet.c: Fix possible NULL de-reference
Fix case where NULL is de-referenced via tx/rx buffer or descriptor. Only
1 queue is currently set up for each, so the indices 1,2,3 are not valid
and should not be handled.
2023-10-16 21:54:31 +08:00
Ville Juven
64b6ac3d87 mpfs/mpfs_entrypoints.c: Fix potential R_RISCV_JAL linker error
Change bgtz t0, mpfs_opensbi_prepare_hart to tail-call to ensure there
will be no link time error due to the jump offset being too large.
2023-10-16 21:52:01 +08:00
zhangyuan21
21d9066c95 arm64: support up_coherent_dcache function
Before code is executed after being loaded into memory,
it is necessary to ensure the consistency of I and D cache.
The up_coherent_dcache function will flush the dache and
invalidate the icache to ensure cache consistency.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-10-16 16:08:23 +08:00
zhangyuan21
ca46cbb0bd arm64: target cpuid calculation error in arm64_gic_raise_sgi function
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-10-16 16:08:04 +08:00
Bowen Wang
77306e5029 assert: move the backtrace dump after the stack dump
Execute the simple logic first to avoid rarely crash information
when crash in backtrace again.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2023-10-16 16:07:44 +08:00
Philippe Leduc
98b15b1409 Cleanup interface and a4988 implementation
Change step frequency from step/ms to step/s
Add DRV8825 stepper driver
2023-10-16 08:55:53 +08:00
Alan Carvalho de Assis
444b6d9635 boards: Update all boards that were using CONFIG_NET_LL_GUARDSIZE=50 2023-10-16 08:55:21 +08:00
Alan Carvalho de Assis
4741ef7ca7 net: Fix RNDIS compilation error
The minimum value to CONFIG_NET_LL_GUARDSIZE work
with USB RNDIS support is 50.
2023-10-16 08:55:21 +08:00
TaiJu Wu
e28fcbd777 fix: Mac sim-02 compiler issue
This path just for modify Mac sim-02 issue.
The compiler require the firt paramter of atomic_compare_exchange_strong
is atomic type and second parameter is int type.

Signed-off-by: TaiJu Wu <tjwu1217@gmail.com>
2023-10-16 08:55:01 +08:00
TaiJu Wu
68a4d3df7e spinlock: implement read writer spinlock
spinlock.c:
Implement read write spinlock.
Readers can take lock simultaneously but only one writer can take lock.

irq_spinlock.c:
Align g_irq_spin_count.
If the lock is NULL, the caller will get global lock (e.g. g_irq_spin) and spin_lock_irqsave() support nest on the same CPU.
If the CPU can write lock, it can call write_lock_irqsave() again (e.g. support nest).

Signed-off-by: TaiJu Wu <tjwu1217@gmail.com>

Co-authored-by: David Sidrane <David.Sidrane@Nscdg.com>
2023-10-16 08:55:01 +08:00
raiden00pl
8bdb78b446 libdsp/lib_observer.c: use float numbers in all calculations
we want to use FPU instructions in calculations not __aeabi
2023-10-15 10:43:37 -04:00
simbit18
2be45a3391 Update Fix more generic for platforms that do not have execinfo.h
Improve multiplatform code with __has_include.
2023-10-15 01:34:17 +08:00
chenrun1
73ca090ab9 filemtd:Fix teardown return error number EINVAL
In previous versions, during the teardown phase, the "open_blockdriver" would call the "mtd proxy" causing the "file mtd" node to be registered in the ftl. " node is registered in ftl.
Therefore, we changed the behavior to find the corresponding inode by node name.

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-10-15 01:29:12 +08:00
Philippe Leduc
095c32b0eb Add a stepper generic upperhalf driver
Add a stepper A4988 lowerhalf driver
2023-10-14 12:28:41 -04:00
TaiJuWu
1989749850 cpu_pause.c: fix typo
Signed-off-by: TaiJuWu <tjwu1217@gmail.com>
2023-10-14 00:26:31 -04:00
Xiang Xiao
f196d108bf drivers/note: Change 0/1 to false/true
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-10-13 14:38:51 -04:00
zhangyuan21
abfeafa876 arm64: XN should only be set when the attribute MT_EXECUTE_NEVER is set
Only when SCTLR_ELn.WXN is set to 1, regions that are writable at ELn
are treated as non-executable. Therefore, when SCTLR_ELn.WXN is set to
0, regions that are writable at ELn can be executed, so the writable
attribute cannot be used to restrict the executable attribute.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-10-13 22:48:13 +08:00
Marco Casaroli
0f56d3428b feat(esp32s3-eye): lcd defconfig 2023-10-12 16:57:04 -04:00
Marco Casaroli
e5b4b58f96 feat(esp32s3-eye): i2c defconfig 2023-10-12 16:57:04 -04:00
Marco Casaroli
effab1bd61 feat(esp32s3-eye): SPI and LCD
LCD is connected to SPI2 and uses DC signalling.
2023-10-12 16:57:04 -04:00
Marco Casaroli
20b5d2b84c fix(esp32s3-eye): unexpose backlight GPIO
This IO is not exposed in any headers and it is only used for LCD.

So we don't expose it as gpio device.
2023-10-12 16:57:04 -04:00
Marco Casaroli
b7bc0e542c fix(esp32s3-eye): spiflash declaration 2023-10-12 16:57:04 -04:00
Marco Casaroli
09ee163d37 feat(esp32s3-eye): I2C 2023-10-12 16:57:04 -04:00
Marco Casaroli
e99966ec70 chore(esp32s3_board_i2c): suppress warning
If only I2C1 is configured but not I2C0, gcc is giving a warning,
so we suppress it.
2023-10-12 16:57:04 -04:00
hujun5
cef8c598c7 arm64: Add support for FIQ interrupts
To compile arm64 NuttX, use the following command:
 ./tools/configure.sh -l qemu-armv8a:nsh_fiq
To run,use the following command
 qemu-system-aarch64 -cpu cortex-a53 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-10-12 16:56:24 -04:00
ThomasNS
696717b28b add munmap logic to pseudofs 2023-10-13 03:17:27 +08:00
liqinhui
d27ca03b6c wifi/simdriver: Support the sim wifi.
Add the Sim WiFi function, which can provide the wifi operating on nuttx sim emulator,
  and support two modes that simulate wifi, HWSIM and RNC(real network card).

 - In the HWSIM mode, we simulates two wlan interfaces. The wlan0 is STA and
   the wlan1 is AP. The wlan0 can connect to the wlan1 in the nuttx simulator.
 - In the RNC mode, we can use the same wlan interface name on the nuttx simulator
   to control the connection behavior of the real wireless card.

Signed-off-by: liqinhui <liqinhui@xiaomi.com>
2023-10-12 17:08:25 +08:00
hujun5
061be5f18e refine: move BIT Macro to nuttx/bits.h
The BIT macro is widely used in NuttX,
and to achieve a unified strategy,
we have placed the implementation of the BIT macro
in bits.h to simplify code implementation.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-10-12 14:52:56 +08:00