Commit Graph

1491 Commits

Author SHA1 Message Date
chao an
39a0e6fa74 toolchain/lto: enable lto flags only on GNU toolchain
Some commercial customized toolchains do not support these options

Signed-off-by: chao an <anchao@lixiang.com>
2024-02-18 00:47:53 -08:00
Raman Gopalan
0967eb4c24 avr32dev1: Fix compilation and nsh boot-up
I recently imported NuttX version 6.0 (and nsh) into a Microchip
Studio project [1] on Windows to figure out what was going wrong with
the avr32dev1 build. I also briefly checked NuttX version 10.

I worked with the assumption that the avr32 (avr32dev1) specific
changes to the codebase were minimal across NuttX releases.

For the initial proof of concept I used Microchip Studio version 7.0
(with the recent Microchip's ASF updates). I use avr32-gcc (4.4.7)
hosted here [2] for building NuttX for avr32dev1 on GNU/Linux.

Even with the Microchip Studio project, I had initial debug problems
with just stepping through the code a line at a time. I had to bring
in crt0, a trampoline stub and the linker file from one of my older
projects to really build on the suspicion I had with the linker file.

Perhaps an older version of avr32-gcc did something differently. I am
not sure about this. I used avr32-objdump to see the output sections
of the generated elf file. I just had to tweak the linker script to
ensure correct linking of the sections.

With those changes, I was able to inspect the UART sections within
NuttX Microchip Studio project.

Second important change: the transmit pin: I had to reassign the pin
to see the nsh console.

These are the currently assigned UART pins:

RX: PA_24 -> Physical IC pin 59
TX: PB_02 -> Physical IC pin 24

For the avr32dev1 board, they are pins: J1 (berg pin 28) and J2 (berg
pin 10).

In addition, the PR fixes silly compilation problems with avr32dev1.

I have tested the nsh build with my avr32dev1 boards. I used Atmel ICE
to program one of them (flash at 0x80000000) and dfu-programmer to
test my other board (flash at 0x80002000). The other RS-232 parameters
are the same as they were.

References:
[1]: https://github.com/ramangopalan/nuttx_avr32dev1
[2]: https://github.com/ramangopalan/avr32-gnu-toolchain-linux_x86_64
2024-02-08 11:12:13 -03:00
chao an
5424ace1cf compiler/tasking: fix compiler warning on tasking
ctc W549: ["serial/serial.c" 877/37] condition is always true
ctc W549: ["inode/fs_inodesearch.c" 72/8] condition is always true
ctc W545: ["obstack/lib_obstack_malloc.c" 69/1] missing 'return'
ctc W545: ["obstack/lib_obstack_malloc.c" 82/1] missing 'return'

Signed-off-by: chao an <anchao@lixiang.com>
2024-01-31 05:02:56 -08:00
chao an
8ff97f6210 compiler/tasking: fix unreachable code on tasking toolchain
ctc W544: ["serial/serial.c" 284/3] unreachable code
ctc W544: ["vfs/fs_lseek.c" 96/13] unreachable code
ctc W544: ["wqueue/kwork_thread.c" 210/32] unreachable code
ctc W544: ["stdio/lib_fopen.c" 327/19] unreachable code
ctc W544: ["stdio/lib_fopen.c" 404/13] unreachable code
ctc W544: ["string/lib_strcasestr.c" 120/3] unreachable code
ctc W544: ["unistd/lib_getopt_common.c" 156/21] unreachable code
ctc W544: ["unistd/lib_getopt_common.c" 216/21] unreachable code
ctc W544: ["wctype/lib_iswctype.c" 155/3] unreachable code

Signed-off-by: chao an <anchao@lixiang.com>
2024-01-30 20:53:00 -08:00
Huang Qi
fe5ca39a79 libc.csv: Fix qsort signature with unexpected quotation mark
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2024-01-14 02:17:22 -08:00
yinshengkai
97096bed83 libs: fix the problem that the address obtained in thumb mode cannot be executed.
The lowest bit of the thumb instruction is 1 by default, which is used to distinguish arm instructions and thumb instructions.
Fixed the problem of misalignment of symbol table when performing binary search

In arm, the lowest bit of the instruction is 1, which is a thumb instruction, and 0, which is an arm instruction.
The nm command was used in mkallsym.sh before, and the result it will return will set the lowest bit of the thumb instruction to 0. There will be a one-byte deviation during binary search, so mkallsyms.py will also set the lowest bit to 0 according to the previous format.
```sh
arm-none-eabi-nm -Cn nuttx | grep hello
0801c384 T hello_main
arm-none-eabi-objdump nuttx -t |grep hello
0801c384 g F .text 0000004c hello_main
arm-none-eabi-readelf nuttx -s |grep hello
4558: 0801c385 76 FUNC GLOBAL DEFAULT 1 hello_main
```

However, in the following case, when you need to find the function address according to the symbol name and execute the corresponding function, the lowest address obtained is 0. It will follow the arm instruction, causing an exception.
```c
void sym_test(void)
{
   printf("call sym_test\n");
}

int main(int argc, FAR char *argv[])
{
   FAR void *addr = sym_test;
   printf("sym_test:%p %pS\n",addr, addr);
   printf("sym_test - 1: %pS\n", (char *)addr - 1);
   printf("sym_test + 1: %pS\n", (char *)addr + 1);

   size_t size;
   void (*func)(void);
   const struct symtab_s *sym = allsyms_findbyname("sym_test", &size);
   printf("sym_test:%p %pS\n",sym, sym);
   func = sym->sym_value;
   func();

   return 0;
}
```

Therefore, you need to change mkallsyms.py back to the correct result and correct the binary search.

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-01-04 09:22:57 -08:00
Peter van der Perk
40f4cde8f5 armv7-m: Expose section name to allow relocation 2024-01-04 15:07:18 +01:00
xuxin19
524425573e CMake:init arm64 CMake qemu-armv8a build
this patch contains arm64 Toolchain, arch common, qemu board and arm64 libc modifications.
support using CMake to compile the qemu executable file.

```
 cmake -B build -DBOARD_CONFIG=qemu-armv8a:nsh -GNinja
 cmake --build build -t menuconfig
 cmake --build build
 qemu-system-aarch64 -cpu cortex-a53 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx
```
Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2023-12-27 07:27:17 -08:00
yinshengkai
81fccf96db libc/stream: add file out stream
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2023-12-25 16:54:16 -03:00
yinshengkai
0c95bf73dc libc/stream: provide lowerout_stream default initialization function
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2023-12-25 16:54:16 -03:00
guoshichao
b3867d5230 libs/libc/wchar: add ungetwc implementation
Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2023-12-17 01:39:06 -08:00
guoshichao
0b2f7f7f3c libs/libc/wchar: add getwc implementation
Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2023-12-17 01:39:06 -08:00
guoshichao
8c37c3841b libs/libc/wchar: add fgetwc implementation
Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2023-12-17 01:39:06 -08:00
Ville Juven
e03599d9ae libs/log2ceil: Move implementation of log2ceil to a common place
Move log2ceil from riscv_pmp to libc. Also, implement log2floor for
completeness.

These are the run-time alternative to the compile-time macros.
2023-12-14 08:46:12 -08:00
Ville Juven
90d73153fb riscv/arch_elf: Check for _HI20 relocation validity
As pointed out in #11322 there is a hardware design issue in RISC-V that
affects RV64 relocations. The problem is with how address bits are loaded
into registers via lui / auipc and sign extension.

If the hi20 relocation value happens to have its 32-bit sign bit set, i.e.
value is 0x80000000 (but not negative! i.e. negative in 64-bit format) the
relocation will fail, as the address is erroneously sign extended:

0x00000000_80000000 becomes 0xffffffff_80000000 which is not correct.

Also, make sure the correct opcode is used with PCREL_HI20, it expects
AUIPC (not LUI). The C compiler will never emit such code but when hand-
writing assembly code this can happen.
2023-12-14 06:54:17 -08:00
Ville Juven
996625ec58 riscv/arch_elf.c: Handle PCREL_HI20/LO12_I/S relocations correctly
There is a problem with the current elf loader for risc-v: when a pair of
PCREL_HI20 / LO12 relocations are encountered, it is assumed that these
will follow each other immediately, as follows:

label:
	auipc      a0, %pcrel_hi(symbol)    // R_RISCV_PCREL_HI20
	load/store a0, %pcrel_lo(label)(a0) // R_RISCV_PCREL_LO12_I/S

With this assumption, the hi/lo relocations are both done when a hi20
relocation entry is encountered, first to the current instruction (addr)
and to the next instruction (addr + 4).

However, this assumption is wrong. There is nothing in the elf relocation
specification[1] that mandates this. Thus, the hi/lo relocation always
needs to first fixup the hi-part, and when the lo-part is encountered, it
needs to find the corresponding hi relocation entry, via the given "label".
This necessitates (re-)visiting the relocation entries for the current
section as well as looking for "label" in the symbol table.

The NuttX elf loader does not allow such operations to be done in the
machine specific part, so this patch fixes the relocation issue by
introducing an architecture specific cache for the hi20 relocation and
symbol table entries. When a lo12 relocation is encountered, the cache
can be consulted to find the hi20 part.

[1] https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc
2023-12-12 17:32:36 -08:00
anjiahao
bf03bb557f support gdbstub use serial.
we can use uart to debug nuttx,like debugger:

1. read/write memory
2. Use watchpoint,breakpoint,single step.
    use up_debugpoint api

3. Ctrl+c to stop, continue, or single step.
    hold uart send and receive

4. register a panic event, when crash or assert/panic, we use uart to
   debug.

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-12-11 08:43:26 -08:00
anjiahao
a423d9b404 gdbstub:convert gdb pid strat to 1
gdb pid strat is 1, nuttx is 0, so convert it

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-12-11 08:43:26 -08:00
anjiahao
7dfbd14eba libc: add instrument api support
Add registration function instrumentation API,
which can achieve instrumentation of entering and
exiting functions through the compiler's functionality.

We can use CONFIG_ARCH_INSTRUMENT_ALL to add instrumentation for all
source, or add '-finstrument-functions' to CFLAGS for Part of the
source.

Notice:
1. use CONFIG_ARCH_INSTRUMENT_ALL must mark _start or entry noinstrument_function,
   becuase bss not set.
2. Make sure your callbacks are not instrumented recursively.

use instrument_register to register entry function and exit function.
They will be called by the instrumented function

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-12-11 02:06:51 -08:00
Federico Braghiroli
8b9c64eecf lib_slcd: fix encode/decode of binary nibble to/from ascii hex
Binary nibble to/from ascii hex conversion was buggy on both
lib_slcdencode and lib_slcddecode libraries.

This bug caused the slcd library to fail to decode 5-byte sequence command
which have 'count' argument value bigger than 0x9.

Signed-off-by: Federico Braghiroli <federico.braghiroli@gmail.com>
2023-12-10 21:54:01 -08:00
anjiahao
35051dd715 coredump: support coredump save to block device when crash
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-12-10 07:02:03 -08:00
anjiahao
542a5555d3 libc:add parse_memory_range to parse memory string
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-12-10 07:02:03 -08:00
Zhang Yang
4f9d014994 Fix -nan issue with f32 2023-12-01 18:49:46 -08:00
chao an
3d57055057 libc/arm: add support of PACBTI
Reference:
https://developer.arm.com/documentation/100748/0617/Security-features-supported-in-Arm-Compiler-for-Embedded/PACBTI-M-extension-mitigations-against-ROP-and-JOP-style-attacks
https://developer.arm.com/documentation/101754/0619/armclang-Reference/armclang-Command-line-Options/-mbranch-protection

Signed-off-by: chao an <anchao@xiaomi.com>
2023-11-30 01:12:24 -08:00
chao an
29bda7cf27 libc/machine/arm: align related implementations of armv7 architecture
1. sync arch elf changes
2. fix cmake compilation break
3. remove the definition of related math files

Signed-off-by: chao an <anchao@xiaomi.com>
2023-11-29 19:04:30 -08:00
Michal Lenc
eea7db24f3 libc: add support for open_memstream
Adds support for POSIX interface open_memstream() that allows writing
to dynamic memory buffer stream. The stream is dynamically reallocated
as the buffer grows with initial size set to zero.

The caller has to free the buffer after the stream is closed.

The implementation uses fopencookie() for custom stream operations and
callbacks.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-11-29 02:13:19 -08:00
Ville Juven
e39ef8563e semaphore/_SEM_XX: Remove the _SEM redirection macros as unnecessary 2023-11-27 04:52:54 -08:00
Ville Juven
5f36a43609 sched/semaphore: Move named semaphores to user space 2023-11-27 04:52:54 -08:00
Ville Juven
c9bdadd541 sched/semaphore: Move cancel point and errno handling to libc / user-space
This moves all the public POSIX semaphore functions into libc and with
this most of the user-space logic is also moved; namely cancel point and
errno handling.

This also removes the need for the _SEM_XX macros used to differentiate
which API is used per user-/kernel mode. Such macros are henceforth
unnecessary.
2023-11-27 04:52:54 -08:00
Ville Juven
57de6484e9 task/pthread_cancelpt: Fix task_delete from another task group
PR #11165 causes an unnecessary regression; task_delete no longer works,
if the deleted task is from another group.

The logic that prevents this comes from:

nxnotify_cancellation() ->
tls_get_info_pid() ->
nxsched_get_stackinfo()

Which checks for permissions, which does not make sense in this case since
it is the kernel asking for the stack information.

Fix this by partially reverting 11165 and implementing a direct path for
the kernel to query for any tasks TLS.
2023-11-22 08:05:58 -08:00
anjiahao
749655d785 tcbinfo:remove total_num form tcbinfo.
total_num is not required
test:

make -f tools/Makefile.host
cp tools/jlink-nuttx /opt/SEGGER/JLink_V786a/libnuttxplugin.so
JLinkGDBServer -if SWD -speed 5000 -device STM32F429ZI -NoGui 1 -rtos libnuttxplugin

can run normally

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-11-21 21:52:24 -08:00
chenrun1
f12c4fb887 Revert "libc/lib_bzero:Add bzero prototype." 2023-11-21 07:56:52 -08:00
PwnVerse
e2627d4558 Fix improper handling of 64 bit types for libvsprintf 2023-11-15 18:37:43 -08:00
Ville Juven
0dedbcd4ae task/pthread_cancelpt: Move cancel point handling to libc, data to TLS
This moves task / thread cancel point logic from the NuttX kernel into
libc, while the data needed by the cancel point logic is moved to TLS.

The change is an enabler to move user-space APIs to libc as well, for
a coherent user/kernel separation.
2023-11-15 08:52:04 -08:00
Ville Juven
1e31ec8003 sched/tls_info: Add tl_ prefix to pthread cleanup stack / tos 2023-11-15 08:52:04 -08:00
fengxuesong
bb14e45ec9 the bug of sscanf exception output in arm64 platform
Signed-off-by: fengxuesong <fengxuesong@xiaomi.com>
2023-11-15 03:45:32 -08:00
zhanghongyu
234dd95e0b libc_atomic: add file to cmake script
resolves an error where atomic related symbols cannot be found at cmake compile time.

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2023-11-07 17:39:03 +01:00
zhanghongyu
c831c8cc56 cmake: add needed file to cmake script for build sim
nuttx/crypto/chachapoly.c:232: undefined reference to `timingsafe_bcmp'

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2023-11-07 17:39:03 +01:00
zhanghongyu
766e4a4154 libs/libc: adapt the cmake script from the makefile
fix the cmake build error.

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2023-11-07 17:39:03 +01:00
chao an
d410a6e1a6 libc/realpath: allocate link buffer of pseudofs to save stack
The link buffer of pseudofs will occupy too much of stack, allocate from
the heap to save the stack usage.

Signed-off-by: chao an <anchao@xiaomi.com>
2023-11-07 09:05:50 +08:00
Stuart Ianna
c1db9732c5 libs/libc/spawn: Add minimal implementation for posix_spawnattr_destory.
Add a minimal implementation to suppress warnings when building
application code shared with other operating systems.

For example:

When building with a c++ compiler and GCC 12.2.0, the following warning is emitted:

nuttx/include/spawn.h:178:40: warning: statement has no effect [-Wunused-value]
  178 | #define posix_spawnattr_destroy(attr) (0)
2023-10-31 13:42:00 +08:00
dongjiuzhu1
489bd15271 arch/arm64: support relocate for aarch64
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2023-10-30 18:20:22 +08:00
raiden00pl
5b87fdfb9d Documentation: remove all migrated READMEs 2023-10-29 21:03:54 -03:00
Xiang Xiao
7aad7eebff libc: Change errno to set_errno and get_errno
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-10-29 17:16:09 +02:00
Xiang Xiao
f911d3a1c3 stdio: Implement [clearerr|putc|fflush]_unlocked
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-10-29 17:09:18 +02:00
Xiang Xiao
2c9511e655 libc/stdio: Remove bforce from lib_fflush[_unlocked]
since all callers set bforce to true

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-10-29 17:09:18 +02:00
Xiang Xiao
c3be772441 libc/stdio: lib_fwrite_unlocked must call lib_fflush_unlocked with true
otherwise the following file i/o mess up the output

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-10-29 17:09:18 +02:00
dongjiuzhu1
5c98649a7a libs/lib_psfa_adddup2.c: remove workaround aboud dup2
Because popen no longer needs to rely on intermediate
tasks to start command tasks.

Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2023-10-27 21:15:07 +08:00
Michal Lenc
65ae8a545c libc: add support for memory buffer stream with fmemopen()
Add support for POSIX interface fmemopen(). This interface open a memory
buffer as a stream and permits access to this buffer specified by mode.
This allows I/O operations to be performed on the memory buffer.

The implementation uses fopencookie() for custom stream operations and
callbacks.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-10-27 08:55:24 +08:00
simbit18
8f96e59aee libs/libc/stdlib/lib_exit.c: fix multiple definition of __dso_handle in msys2
CPP:  nuttx-names.in-> nuttx-names.dat
LD:  nuttx
/usr/lib/gcc/x86_64-pc-msys/13.2.0/../../../../x86_64-pc-msys/bin/ld: nuttx.rel:/d/a/nuttx_windows/nuttx_windows/nuttxspace/nuttx/libs/libc/stdlib/lib_exit.c:48: multiple definition of `__dso_handle'; /usr/lib/gcc/x86_64-pc-msys/13.2.0/crtbegin.o:cygming-crtbeg:(.data+0x0): first defined here
2023-10-27 01:21:10 +08:00