- Add ARCH_KVMA_MAPPING to guard kernel mapping.
- Set dependency from MM_KMAP to ARCH_KVMA_MAPPING, as per commit
70de321de3.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
Now we only supports conntrack info from NAT entries, to let our apps in user space know the mapping status in NAT.
Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
icr is tested below with macros like GPIO_INT_LOWLEVEL et al. Those macros
are shifted left by GPIO_INTCFG_SHIFT, so the temporary icr variable
should not be shifted right.
This commit adds support for reallocarray function. The functionality
is the same as for standard realloc, but the function also checks for
multiplication overflow and fails safely in case it occurs.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
The current macro guard for TLS related symbols is
not enough, only if !defined(CONFIG_DISABLE_PTHREAD)
and CONFIG_TLS_NELEM > 0, the TLS related symbols
will enabled.
So if CONFIG_DISABLE_PTHREAD is not defined, but
TLS is disabled, the reference to TLS related symbols
will cause build error (undefined reference to xxx).
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
The SAMV7's qencoder driver now supports the GETINDEX ioctl call
which does not reset the internal Timer/Counter and returns
the current position, position of the last index and the number
of captured indexes to a struct qe_index_s pointer. Because the
SAMV7's timers are 16bit, the extension to 32 bits must be done.
Select CONFIG_SAMV7_QENCODER_ENABLE_GETINDEX in the Kconfig to
enable this functionality.
This driver does not obey the instructions given in the ATSAMV7
2023 datasheet because the recommended trigger resets the internal
counter which is not desired. Instead, a capture into capture A
and capture B registers is used. This way if an event happens
(the rising edge of the index signal), the current counter's value
is captured.
Signed-off-by: Stepan Pressl <pressste@fel.cvut.cz>
The Simple Boot feature for Espressif chips is a method of booting
that doesn't depend on a 2nd stage bootloader. Its not the
intention to replace a 2nd stage bootloader such as MCUboot and
ESP-IDF bootloader, but to have a minimal and straight-forward way
of booting, and also simplify the building.
This commit also removes deprecated code and makes this bootloader
configuration as default for esp32s3 targets and removes the need
for running 'make bootloader' command for it.
Other related fix, but not directly to Simple Boot:
- Instrumentation is required to run from IRAM to support it during
initialization. `is_eco0` function also needs to run from IRAM.
- `rtc.data` section placement was fixed.
- Provide arch-defined interfaces for efuses, in order to decouple
board config level from arch-defined values.
Signed-off-by: Almir Okato <almir.okato@espressif.com>
The DS1307 was used as board specific, but it is better move it to
stm32/common to be easily used by other boards as well.
Signed-off-by: Alan C. Assis <acassis@gmail.com>
Currently Simple Boot image have fixed 2 ROM segments and
2 RAM segments, then the parsing iterator must stop when all
ROM segments are found.
Signed-off-by: Almir Okato <almir.okato@espressif.com>
- Add missing include guard
- Add missing C++ guard
- Fix the initialization ordering in IOMUX_PADCFG macro. Why ? Becaused of:
imx9_iomuxc.h:54:3: error: designator order for field 'iomux_padcfg_s::dsyreg' does not match declaration order in 'iomux_padcfg_s'
54 | }
|
The original assumption was that the interrupt numbers are divided
so that 16 pins from 1 port are handled by a single interrupt source.
So source 0 would handle pins 0-15 and source 1 would handle pins 16-31.
This assumption is wrong, each pin has two sources, thus there are two
interrupt lines for each pin.
The driver uses source 0, and leaves source 1 disabled.
This disables the leading spaces removal for block comments to
avoid changing well-formatted blocks.
Based on test with uncrusity 0.72.0+dfsg1-2 on Ubuntu 22.04, the
leading spaces of block comment lines are unexpectedly removed by
current version w/o this patch.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
According to the qemu source code, hw/arm/virt.c.
The secure memory of the ARM Virt board is [0xe000000~0xf000000]
and the non-secure memory is configured as [0x40000000~0xffffffff].
We made the following adjustments based on the above virt board configuration
Signed-off-by: hujun5 <hujun5@xiaomi.com>
This patch supports listing configs for a given board like
- `tools/configure.sh -L sama5`
- `tools/configure.sh -L rv-virt`
- `tools/configure.sh -L virt`
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
I found `struct ipv*_nat_entry` is missing `_s` suffix, but the name is too long in some cases, so maybe `ipv*_nat_entry_t` could be better.
Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
1. The critical section does not prevent task scheduling
2. If the critical section is in sched_lock, there is no need to check,
scheduling is not going to happen
3. If sched_lock is in the critical section, sched_unlock will also
trigger scheduling without waiting for the exit of the critical section
4. After exiting the critical section, if there is an interrupt,
the scheduling will be automatically triggered
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Notes:
1. This version of NAT66 is a stateful one like NAT44, corresponding to Linux's MASQUERADE target of ip6tables. We can support stateless NAT66 & NPTv6 later by slightly modify the address & port selection logic (maybe just match the rules and skip the entry find).
2. We're using same flag `IFF_NAT` for both NAT44 & NAT66 to make control easier. Which means, if we enable NAT, both NAT44 & NAT66 will be enabled. If we don't want one of them, we can just disable that one in Kconfig.
3. Maybe we can accelerate the checksum adjustment by pre-calculate a difference of checksum, and apply it to each packet, instead of calling `net_chksum_adjust` each time. Just a thought, maybe do it later.
4. IP fragment segments on NAT66 connections are not supported yet.
Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
