141 Commits

Author SHA1 Message Date
anjiahao
a4563b8744 Fix the coding style and typo issue
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-14 09:34:04 +09:00
anjiahao
d07792a343 Initialize global mutext/sem by NXMUTEX_INITIALIZER and SEM_INITIALIZER
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-14 09:34:04 +09:00
Tiago Medicci Serrano
6317f6d597 esp32s2/i2s: use internal buffer to handle multiple audio formats 2022-11-07 13:46:44 +08:00
Tiago Medicci Serrano
d98df37f35 xtensa/esp32s2: add i2s_mclkfrequency to set master clock on I2S 2022-11-07 13:46:44 +08:00
Gustavo Henrique Nihei
facdd4f2b9 esp32[-s2/-s3/-c3]: Re-sort SPI Flash configs
- Reduce "SPI Flash configuration" menu dependency on SPI Flash driver
  just to MTD-related configs.
- Move SPI Flash Mode and Frequency configs to SPI Flash configuration
  menu.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-10-27 10:07:40 +08:00
Tiago Medicci Serrano
16b99ee013 xtensa/esp32s2: add initial support for I2S
Add initial support for the I2S peripheral on ESP32S2.
Add I2S character driver and generic I2S audio driver.
Include i2schar defconfig for ESP32-S2-Saola-1 board.
2022-10-22 15:18:35 +08:00
anjiahao
e1ca516488 use SEM_INITIALIZER inside of NXSEM_INITIALIZER
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2022-10-22 14:50:48 +08:00
Alan Carvalho de Assis
0e4c2fed93 esp32s2: Add DMA support to SPI 2022-10-20 10:11:26 +08:00
Alan Carvalho de Assis
a0a7375911 Fix esp32s2_spi.h offset 2022-10-20 10:11:26 +08:00
anjiahao
dee38ce3e8 arch: Replace critical section with nxmutex in i2c/spi/1wire initialization
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-17 15:59:46 +09:00
anjiahao
d1d46335df Replace nxsem API when used as a lock with nxmutex API
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-17 15:59:46 +09:00
Alan Carvalho de Assis
c297ecaa5d esp32s2: Add missing ESP32S2 SPIRAM config 2022-10-13 01:41:47 +08:00
Xiang Xiao
bdeaea3742 Remove the unnessary empty line after label
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-30 17:54:56 +02:00
Xiang Xiao
70290b6e38 arch: Change the linker generated symbols from uint32_t to uint8_t *
and remove the duplicated declaration

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-24 21:26:56 +02:00
Xiang Xiao
3c1c29f2c4 arch: move non arm g_current_regs defintion to common place
to avoid the code duplicaiton

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-09-21 22:23:11 +02:00
Alan Carvalho de Assis
0b4ef1406d xtensa/esp32s2: Add basic support to SPI 2022-08-11 15:49:55 +03:00
zhuyanlin
031c89db89 power: add PM_IDLE_DOMAIN to pm.h and remove definations
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-07-29 11:15:40 +08:00
Xiang Xiao
2166c98809 Add printflike and scanflike to all printf/scanf like functions
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-18 14:14:36 +03:00
Gustavo Henrique Nihei
b9703619b5 xtensa: Unify common options within a single Make.defs
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-07-05 23:07:00 +08:00
Gustavo Henrique Nihei
0657621848 xtensa/esp32s2: Add driver for I2C peripheral in Master mode
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-06-30 00:32:02 +03:00
Gustavo Henrique Nihei
31cddc922c xtensa/esp32s2: Sync GPIO driver implementation with ESP32-S3
Sync driver interfaces, also fixes the handling of special pin value for
esp32s2_gpio_matrix_in and esp32s2_gpio_matrix_out functions

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-06-30 00:10:41 +08:00
Abdelatif Guettouche
1f90e5a5b0 arch/xtensa: Don't build xtensa_coproc.S, it has only macros and is
included when needed.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-06-13 21:32:23 +03:00
Abdelatif Guettouche
c99776659f xtensa: Delete the assembly signal trampoline.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-05-31 17:40:54 +08:00
chao.an
3f65b562bb arch: inline up_interrupt_context()
inline the up_interrupt_context() to avoid unnecessary stack pushes

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-05-26 04:36:07 +08:00
Xiang Xiao
a021177de8 arch: Fix the style found in review
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-01 11:29:44 +03:00
Abdelatif Guettouche
da273fce0b arch/xtensa: Replace the xcp context with stack context to improve context switching
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-04-29 02:51:41 +08:00
Abdelatif Guettouche
64e4c9ca02 arch/xtensa: Move xtensa_save_context to up_saveusercontext for
consistency with other archs.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-04-21 01:59:34 +08:00
Abdelatif Guettouche
6db910a1aa arch/xtensa: Use syscall interface for xtensa_save/restore_context.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-04-21 01:59:34 +08:00
Xiang Xiao
6bc61b5752 arch/xtensa: Remove FAR from chip and board folder
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-17 18:42:38 +03:00
Alan C. Assis
c232be541c Add SPIRAM to ESP32-S2 2022-04-14 22:10:23 +08:00
Abdelatif Guettouche
f527abc324 arch/xtensa: Build the xtensa_tcbinfo.c file for S2 and S3.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-04-04 21:25:47 +08:00
Gustavo Henrique Nihei
c92c4af304 xtensa/esp32s2: Initialize instruction cache on startup
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-23 20:05:40 -03:00
Gustavo Henrique Nihei
bc071ec243 xtensa/esp32s2: Use functions defined in xtensa_counter for TimerISR
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-23 19:38:28 -03:00
Gustavo Henrique Nihei
04b80cc8d2 xtensa/esp32s2: Remove unused and not unsupported configs from Kconfig
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-23 19:38:28 -03:00
Petro Karashchenko
68902d8732 pid_t: unify usage of special task IDs
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-03-22 21:22:32 +08:00
Abdelatif Guettouche
10f8f6c9e3 xtensa/esp32(s2)_user.c: For EXCCAUSE values, use macros defined in xtensa_corebits.h
instead of those defined in core.h as they are deprecated.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-22 10:20:27 +08:00
Petro Karashchenko
b04447d066 timer_lowerhalf: minor improvements
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-03-15 10:30:48 +08:00
Gustavo Henrique Nihei
140dc248db xtensa/esp32s2: Add support for Main System Watchdog Timers
Support for RTC Watchdog Timer is currently in place, but not yet
functional due to not yet implemented RTC driver.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-08 22:24:07 -03:00
Gustavo Henrique Nihei
bd7ee0d675 xtensa/esp32s2: Sync IRQ management API with ESP32 and ESP32-S3
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-08 11:36:32 -03:00
Gustavo Henrique Nihei
6a12befcd5 xtensa/esp32s2: Fix Scheduler CPU Load feature using Oneshot Timer
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-02-26 03:23:13 +08:00
zhuyanlin
fbc1da98b7 xtensa: use swint to swith context
Reason for use sw-interrupt as syscall interrupt:
The xtensa `syscall` instruction can cause SYSCALL interrupt.
But SYSCALL interrupt is same interrupt level with level-one
interrupt.
Nuttx swint can enter `enter_critical_section` and gerenate
interrupt.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-25 20:43:03 +08:00
Abdelatif Guettouche
dc130b4830 arch/xtensa/esp32s2_irq.c: Correctly enable the software interrupt.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-02-25 08:55:41 +09:00
zhuyanlin
bf40d70df9 xtensa:esp32s2: setup software interrupt as swi interrupt
Enable and setup software interrupt for esp32s2

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-24 00:06:43 +01:00
Xiang Xiao
1d1bdd85a3 Remove the double blank line from source files
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-20 20:10:14 +01:00
Abdelatif Guettouche
ab18b7b3d3 esp32xx_irq.c: Fix CPU interrupt documentation to remove the MAC
interrupt from the internal interrupt table.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-02-18 13:40:21 +08:00
Xiang Xiao
4c167b0729 Correct the code alignment
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-01 21:22:21 -03:00
Gustavo Henrique Nihei
04723a89f2 xtensa: Fix core voltage level when SPI Flash runs at 80Mhz
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-01-18 02:21:46 +08:00
Petro Karashchenko
8d3bf05fd2 include: fix double include pre-processor guards
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-01-16 11:11:14 -03:00
Alan C. Assis
7b32849b84 esp32s2: Fix data cache option in menuconfig 2022-01-12 21:45:04 +01:00
Gustavo Henrique Nihei
80436dd7be xtensa/esp32s2: Fix some wrong definitions related to IRQ management
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-01-12 21:28:40 +01:00