Gregory Nutt
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ad6c760522
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SAMA5 UDPHS: Support USPHS clock configuration
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2013-09-01 11:29:51 -06:00 |
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Gregory Nutt
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bc57cd5684
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Beginning of support for SAMA5 EHCI. Not much there yet
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2013-08-20 15:46:36 -06:00 |
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Gregory Nutt
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91a2700f31
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SAMA5: Correct the PLL 48MHz divisor. It was off by a factor of two... no idea why
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2013-08-14 19:38:48 -06:00 |
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Gregory Nutt
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8686c040ac
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SAMA5: Alternatie clock configuration that yields a perfect 48MHz full speed USB clock and a CPU clock of 384MHz
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2013-08-14 15:16:04 -06:00 |
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