Gregory Nutt
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e5182acbe3
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Xtensa ESP32: Make sure that SMP configuratin still builds without errors.
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2016-12-19 14:12:19 -06:00 |
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Gregory Nutt
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e61549d8b9
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Xtensa ESP32: Clean-up and fixes from last commits
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2016-12-19 13:57:37 -06:00 |
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Gregory Nutt
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097f09cb02
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Xtensa ESP32: Corrects timer initialization and timer input frequency.
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2016-12-19 11:50:28 -06:00 |
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Gregory Nutt
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a9a39800a4
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Xtensa ESP32: Fixes some double faults and user errors, but I do not fully understand why.
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2016-12-19 11:14:08 -06:00 |
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Gregory Nutt
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886ce88b4f
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Xtensa ESP32: Automatically mount /proc at start-up.
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2016-12-19 09:43:16 -06:00 |
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Gregory Nutt
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b47255a6de
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Update README.
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2016-12-18 17:30:30 -06:00 |
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Gregory Nutt
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2b0b698d72
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ESP32 Serial: Add logic to prevent infinite loops in interrupt handler.
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2016-12-18 16:04:25 -06:00 |
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Gregory Nutt
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71bb79a6c7
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ESP32 Serial: Fix some register bit definitions.
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2016-12-18 15:11:34 -06:00 |
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Gregory Nutt
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4bd530d026
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Xtensa ESP32: Last change should be conditioned on the window ABI.
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2016-12-18 13:17:31 -06:00 |
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Gregory Nutt
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665c1647b5
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Xtensa ESP32: Need to spill registers to memory as the last dying action before switching to a new thread.
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2016-12-18 12:54:47 -06:00 |
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Gregory Nutt
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586f0aab50
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Fix context save logic when called in window ABI configuration. Add an IDLE stack. Don't depend on the mystery stack received from the bootloader.
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2016-12-18 10:08:08 -06:00 |
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Gregory Nutt
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8ce1fdaab0
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Add an attribution to the scanset addition to sscanf()
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2016-12-17 16:18:04 -06:00 |
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Author: Aleksandr Vyhovanec
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7be1b86a81
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Add scansets to the scanf function. Enabled CONFIG_LIBC_SCANSET option.
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2016-12-17 14:39:19 -06:00 |
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Gregory Nutt
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93e6d16f75
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Xtensa ESP32: wsr, not rsr.
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2016-12-17 11:23:10 -06:00 |
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Gregory Nutt
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a88c50d366
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Xtensa ESP32: Need to clone some logic for syncrhonous context switch. Window spill logic in the conmon restores logic is inappropriate in this context
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2016-12-17 11:00:12 -06:00 |
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Gregory Nutt
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6b80e5f15f
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Xtensa ESP32: Fix clobbered a9 in co-processor context save/restore
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2016-12-17 11:00:12 -06:00 |
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Gregory Nutt
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8de1127899
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Xtensa ESP32: Using wrong register to disable interrupts.
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2016-12-17 11:00:12 -06:00 |
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Gregory Nutt
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b506bd6ee6
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Merged in david_s5/nuttx/master_cdcacm_fix (pull request #185)
BugFix:uart_ops_s portion of cdcacm will not be initalized with correct functions if CONFIG_SERIAL_DMA is lit.
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2016-12-17 08:57:33 -06:00 |
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Gregory Nutt
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e7a21b510f
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Merged in david_s5/nuttx (pull request #184)
C&P error from F7
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2016-12-17 08:57:08 -06:00 |
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David Sidrane
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950c140fcd
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Merged nuttx/nuttx into master
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2016-12-17 04:39:46 -10:00 |
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David Sidrane
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ec85425041
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STM32: Fix some STM32F7 copy paste errors
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2016-12-17 08:31:12 -06:00 |
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David Sidrane
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548108764a
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BugFix:uart_ops_s portion of cdcacm will not be initalized with correct functions if CONFIG_SERIAL_DMA is lit.
This fixes the issses in a C99 compatible way
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2016-12-17 04:29:41 -10:00 |
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Gregory Nutt
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38ebe6c13f
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Xtensa ESP32: Change that should have been included in a previous commit was not.
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2016-12-17 08:11:32 -06:00 |
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Gregory Nutt
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05e798488b
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One register getting clobber on context save
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2016-12-17 08:10:10 -06:00 |
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Gregory Nutt
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adbacfc42c
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Xtensa ESP32: Fix a duplicate in Kconfig files. Level 1 should return via RFE.
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2016-12-17 07:07:33 -06:00 |
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David Sidrane
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d9c01052d9
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C&P error from F7
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2016-12-17 02:20:10 -10:00 |
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Gregory Nutt
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6599feb310
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Xtensa ESP32: Fixes a few issue with restoring registers on interrupt return, but there is still a problem
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2016-12-16 17:56:22 -06:00 |
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Gregory Nutt
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cdd8dc72a5
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Xtensa ESP32: Basically a redesign of the interrupt dispatch logic.
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2016-12-16 15:36:52 -06:00 |
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Gregory Nutt
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d4ad5f04d3
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Xtensa ESP32: Minor rearchitecting of how CPU interrupts are enabled. MOre to come.
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2016-12-16 14:13:09 -06:00 |
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Gregory Nutt
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cd3d414ba2
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Xtensa: Fix some missing SMP logic
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2016-12-16 13:37:28 -06:00 |
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Gregory Nutt
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34a994b0f6
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Correct a logic problem the prevented dumping the IDLE thread's stack on an assertion
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2016-12-16 13:21:01 -06:00 |
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Gregory Nutt
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6337fadd8c
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Missing escape character on CR of CR-LF expansion.
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2016-12-16 10:49:42 -06:00 |
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Gregory Nutt
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935e49f5bb
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Update some comments
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2016-12-16 09:38:08 -06:00 |
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Gregory Nutt
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f1a5b91cd8
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Use r6, not r2 when passing paramters with call4
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2016-12-16 09:21:44 -06:00 |
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Gregory Nutt
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41cf32a20e
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Fix windowspill register handling + Use r6, not r2 when passing paramters with call4
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2016-12-16 09:20:36 -06:00 |
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Gregory Nutt
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aa5a8b0ca2
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Xtensa: Make sure that all C callable assembly functions includes ENTRY prologue and RET epilogue.
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2016-12-15 14:02:19 -06:00 |
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Gregory Nutt
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c56268b416
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Fix missing CALL0 ABI condition.
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2016-12-15 11:06:41 -06:00 |
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Gregory Nutt
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ea9e6c48e4
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Cosmetic update to comments.
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2016-12-15 10:43:34 -06:00 |
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Gregory Nutt
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10b9a10d2f
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Xtensa ESP32: Fix several build-related issues associated with vector section
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2016-12-15 10:08:26 -06:00 |
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Gregory Nutt
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4795d58e03
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Back out most of 46dbbe837e. The order is correct -- or, rather, the order is the same as the order that response data is provided. Change the order will break all other drivers.
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2016-12-15 07:16:24 -06:00 |
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Gregory Nutt
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ca92ecafa7
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MMC/SD: Format changed from %d to %lu. Must cast argument to unsigned long to avoid crash on 64-bit machine.
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2016-12-14 17:44:12 -06:00 |
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Gregory Nutt
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f4f32bc740
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MMC/SD SDIO (again): This is really an endian-ness issue. Behavior should be different on big- vs little-endian machines.
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2016-12-14 17:04:27 -06:00 |
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Gregory Nutt
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5755f2348c
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Fix some crap left in README from copy and paste.
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2016-12-14 14:57:43 -06:00 |
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Alan Carvalho de Assis
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3c4a8d05b0
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MMC/SD SDIO driver: Change the endianess order to read the return of long response command
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2016-12-14 14:17:52 -06:00 |
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Gregory Nutt
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b5e979d58f
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ESP32: Fix a couple of bugs associated with handling of CPU interrupts.
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2016-12-14 13:31:44 -06:00 |
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Gregory Nutt
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b504b8daff
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Update README
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2016-12-14 12:34:25 -06:00 |
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Gregory Nutt
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4052ec2d90
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Add missing ENTRY() and RET() macros in C callable assembly language. At one time I though the that the ESP32 support the CALL0 ABI. I was mistaken so there may be a few more like this.
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2016-12-14 12:14:51 -06:00 |
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Gregory Nutt
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730ca4ce41
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Fix missing semicolons in DEBUGASSERT statements
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2016-12-14 09:06:09 -06:00 |
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Gregory Nutt
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a560d70e7a
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Add some comments from Angus Gratton to a Kconfig file for future reference.
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2016-12-14 08:19:35 -06:00 |
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Angus Gratton
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dd5e47a418
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ESP32 core v2: Two changes (1) flushes the UART TX buffer in the esp32 serial shutdown routine. The ROM bootloader does not flush the FIFO before handing over to user code, so some of this output is not currently seen when the UART is reconfigured in early stages of startup. And changes the openocd config file's default flash voltage from 1.8V to 3.3V. This is not necessary right now, but may save some hard-to-debug moments down the track (3.3V-only flash running at 1.8V often half-works and does weird things...)
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2016-12-14 08:15:03 -06:00 |
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