Commit Graph

11685 Commits

Author SHA1 Message Date
Alan Carvalho de Assis
86cfcfd58a Add the up_getc() function to STM32 in order to support the minnsh configuration. 2016-06-04 07:22:45 -06:00
Gregory Nutt
37e8536a88 STM32: Put timer selections in a separate menu 2016-06-04 07:11:05 -06:00
Gregory Nutt
34df98d97e Use DEBUG assertions to save space 2016-06-03 14:49:05 -06:00
Gregory Nutt
704fadb0e6 STM32 TIM: Assure that a compilation error will occur if the old timer input clock frequency definitions are used 2016-06-03 14:17:18 -06:00
Gregory Nutt
3ec2386be8 STM32 TIM: There is a TIM17 on some parts too 2016-06-03 14:08:28 -06:00
Gregory Nutt
282edefab3 STM32 TIM: Add hooks for all previously unsupported timers. Also fix some PWM warnings. 2016-06-03 13:51:43 -06:00
Gregory Nutt
c11e923ad4 Fix a cut'n'paste error left from last commit. 2016-06-03 12:11:55 -06:00
Gregory Nutt
910bac65fa STM32 Timer: Generalize and extend calculation of per-timer pre-scaler value. Inspired by original proposal from Pierre-noel Bouteville. 2016-06-03 11:38:59 -06:00
Gregory Nutt
88a41862b5 Revert "STM32 Timer Driver: Change calculation of per-timer pre-scaler value"
This reverts commit 082d32226b.
2016-06-03 09:41:17 -06:00
Pierre-noel Bouteville
082d32226b STM32 Timer Driver: Change calculation of per-timer pre-scaler value 2016-06-03 08:45:22 -06:00
Pierre-noel Bouteville
426e425a55 Correct conditional compilation in STM32 timer cpature logic 2016-06-03 08:41:53 -06:00
Pierre-noel Bouteville
6a2a0bf11f Note reserved bits in STM32 ADC 2016-06-03 08:39:17 -06:00
Pierre-noel Bouteville
94a14de190 Fix EFM32 FLASH conditional compilation 2016-06-03 08:38:11 -06:00
Gregory Nutt
fcdc17056b STM32 F4 RTC: I believe that the F405/407 has only a single alarm. Not sure. 2016-06-02 15:04:23 -06:00
Gregory Nutt
82c73e206e STM32 F4 RTC, trivial changes 2016-06-02 07:58:13 -06:00
Frank Benkert
90ccba1ad0 SAMV7: MCAN: fix missing unlock of device in mcan_txempty 2016-06-01 10:38:19 -06:00
Gregory Nutt
2f974ffeaf Merged in david_s5/nuttx/upstream_to_greg (pull request #37)
Fix the Value Line adc IRQ number selection
2016-05-31 19:18:11 -06:00
Gregory Nutt
82dec4acab STM32F4 RTC: Remove 24 hour limit; Fix calculation of the alarm register (was not including day of the month). Fix a bad shift value 2016-05-31 19:13:21 -06:00
David Sidrane
70f2b47a0d Fix the Value Line adc IRQ number selection 2016-05-31 14:54:04 -10:00
Gregory Nutt
6eac8bf28d Update some comments 2016-05-31 17:31:15 -06:00
Gregory Nutt
15810946b1 Update some comments 2016-05-31 17:28:02 -06:00
Gregory Nutt
8ca5daf2b3 Changes from review of last PR 2016-05-31 15:52:56 -06:00
Gregory Nutt
213c1900b0 Merged in neilh20/anuttx/bugfix_rtcalarm (pull request #36)
The rtc examples "alarm 10" now runs to completion
2016-05-31 15:43:36 -06:00
neilh10
639410849e alarm 10 now runs to completion 2016-05-31 14:17:52 -07:00
Gregory Nutt
b80bf20374 Fix another bungle in the last commit 2016-05-31 11:52:40 -06:00
Gregory Nutt
b5c37f0270 LP43: Add support for more than 63 interrupts (not currently needed) 2016-05-31 11:42:21 -06:00
Gregory Nutt
828c898a80 LP43: Add support for more than 63 interrupts (not currently needed) 2016-05-31 11:39:51 -06:00
Gregory Nutt
f06a06952f LPC43xx: 1KB is 1024, not 1025. Noted by phreakuencies. 2016-05-31 06:22:10 -06:00
Pierre-noel Bouteville
39c1e3aba2 Allow to not use all channet in a lower part of PWM 2016-05-30 11:58:22 -06:00
Gregory Nutt
5ef3e3e215 Replace confusing references to uIP with just 'the network' 2016-05-30 11:52:07 -06:00
Gregory Nutt
f65616f872 Replace confusing references to uIP with just 'the network' 2016-05-30 09:16:32 -06:00
Gregory Nutt
815bea77ea i.MX6: Update ECSPI header file 2016-05-29 10:23:06 -06:00
Gregory Nutt
fa10927dcc Stefan Kolb's change to the SAMV7 Oneshot Timer (commit d44ecbcfbb) should also be applied to the SAM3/4 oneshot time since the drivers are identical. Here are the commit commits from Stefan's original change:
"This is a fix to a problem in the handling of the oneshot timer. Due to a wrong assumption concerning the behavior directly after the start of the timer/counter the function sam_oneshot_cancel(…) calculates the wrong remaining time. The code assumes that the counter register is zero directly after the start of the timer, but this is not true. To start the time/counter a software trigger is invoked, this trigger starts the timer/count and sets the counter register to zero, but the reset of the counter register is not performed instantly. According to the datasheet: “The counter can be reset by a trigger. In this case, the counter value passes to zero on the next valid edge of the selected clock.” Thus the counter is set to zero between 0 and USEC_PER_TICK microseconds after the clock was started.

"In my fix I use the freerun count value to determine if at least one tick passed since the start of the timer and thus if the value of the oneshot counter is correct. I also tried to use the function up_timer_gettime(…) to achieve this but, at least if compiled with no optimization the problem vanishes without using the value of the function, the function call takes too long.

"Another problem treated in the fix is that if the oneshot timer/counter is canceled, we only know the remaining time with a precision of USEC_PER_TICK microseconds. This means the calculated remaining time is between 0 and USEC_PER_TICK microseconds  too long. To fix this I subtract one tick if the calculated remaining time is greater than one tick and otherwise set the remaining time to zero. By doing so the measured times are much more precise as without it."
2016-05-29 08:25:41 -06:00
Gregory Nutt
9071a22c28 Cosmetic fix to spacing 2016-05-29 08:25:05 -06:00
Gregory Nutt
0b17b1feb3 i.MX6: Add ECSPI configuration logic. Updated ECSPI header files 2016-05-28 17:42:29 -06:00
Gregory Nutt
16cb0a9205 i.MX6: Divide ported i.MX1/L CSPI header file into two header files 2016-05-28 17:10:58 -06:00
Gregory Nutt
13b53d87a9 i.MX6: Add ECSPI header file 2016-05-28 12:23:05 -06:00
Konstantin Berezenko
5c6cd17d46 Add support for SPI 4 and 5 on stm32f411 chips 2016-05-27 11:08:18 -07:00
Gregory Nutt
b4354cf130 Stefan Kolb's change to the SAMV7 Oneshot Timer (commit d44ecbcfbb) should also be applied to the SAMA5 oneshot time since the drivers are identical. Here are the commit commits from Stefan's original change:
"This is a fix to a problem in the handling of the oneshot timer. Due to a wrong assumption concerning the behavior directly after the start of the timer/counter the function sam_oneshot_cancel(…) calculates the wrong remaining time. The code assumes that the counter register is zero directly after the start of the timer, but this is not true. To start the time/counter a software trigger is invoked, this trigger starts the timer/count and sets the counter register to zero, but the reset of the counter register is not performed instantly. According to the datasheet: “The counter can be reset by a trigger. In this case, the counter value passes to zero on the next valid edge of the selected clock.” Thus the counter is set to zero between 0 and USEC_PER_TICK microseconds after the clock was started.

"In my fix I use the freerun count value to determine if at least one tick passed since the start of the timer and thus if the value of the oneshot counter is correct. I also tried to use the function up_timer_gettime(…) to achieve this but, at least if compiled with no optimization the problem vanishes without using the value of the function, the function call takes too long.

"Another problem treated in the fix is that if the oneshot timer/counter is canceled, we only know the remaining time with a precision of USEC_PER_TICK microseconds. This means the calculated remaining time is between 0 and USEC_PER_TICK microseconds  too long. To fix this I subtract one tick if the calculated remaining time is greater than one tick and otherwise set the remaining time to zero. By doing so the measured times are much more precise as without it."
2016-05-27 07:58:03 -06:00
Stefan Kolb
d44ecbcfbb This is a fix to a problem in the handling of the oneshot timer. Due to a wrong assumption concerning the behavior directly after the start of the timer/counter the function sam_oneshot_cancel(…) calculates the wrong remaining time. The code assumes that the counter register is zero directly after the start of the timer, but this is not true. To start the time/counter a software trigger is invoked, this trigger starts the timer/count and sets the counter register to zero, but the reset of the counter register is not performed instantly. According to the datasheet: “The counter can be reset by a trigger. In this case, the counter value passes to zero on the next valid edge of the selected clock.” Thus the counter is set to zero between 0 and USEC_PER_TICK microseconds after the clock was started.
In my fix I use the freerun count value to determine if at least one tick passed since the start of the timer and thus if the value of the oneshot counter is correct. I also tried to use the function up_timer_gettime(…) to achieve this but, at least if compiled with no optimization the problem vanishes without using the value of the function, the function call takes too long.

Another problem treated in the fix is that if the oneshot timer/counter is canceled, we only know the remaining time with a precision of USEC_PER_TICK microseconds. This means the calculated remaining time is between 0 and USEC_PER_TICK microseconds  too long. To fix this I subtract one tick if the calculated remaining time is greater than one tick and otherwise set the remaining time to zero. By doing so the measured times are much more precise as without it.
2016-05-27 07:51:50 -06:00
Gregory Nutt
3d3b7b5422 EFM32, STM32, TIVA: Allow lower half driver to build if any ADC is selected. Should not depend on CONFIG_ADC. 2016-05-27 06:46:33 -06:00
Gregory Nutt
31ac3f5123 STM32 ADC: Missed on adc_receive 2016-05-26 12:42:34 -06:00
Gregory Nutt
aa05767a00 Add ADC bind method to the Tiva ADC drivers 2016-05-26 12:39:22 -06:00
Gregory Nutt
8f2a660c8b Add ADC bind method to the STM32 ADC drivers 2016-05-26 12:25:54 -06:00
Gregory Nutt
2f5221ed91 Add ADC bind method to the LPC43xx and SAMA5Dx ADC drivers 2016-05-26 12:19:17 -06:00
Gregory Nutt
957634519d Missed a few adc_receive calls in the LPC17xx ADC driver. That design has several. 2016-05-26 12:04:17 -06:00
Gregory Nutt
9d6845b7ec Add ADC bind method to the EFM32 and LPC17xx ADC drivers 2016-05-26 11:57:18 -06:00
Gregory Nutt
783bab6c82 Costmetic changes from review of last PR 2016-05-25 18:04:39 -06:00
Gregory Nutt
0d2698a710 Merged in ziggurat29/nuttx/stm32l4_i2c_lcd_mjkdz_001 (pull request #30)
get I2C working for STM32L4
2016-05-25 17:58:19 -06:00
Gregory Nutt
3603dc6218 1-wire: Initialization/uninitialization functions are not use MCU-independent up_ naming. Should use STM32-specific stm32_ naming. These are not globally accessible but only accessible from STM32 board logic. 2016-05-25 17:56:47 -06:00