Commit Graph

37268 Commits

Author SHA1 Message Date
YAMAMOTO Takashi
76add63598 Bump the default of CONFIG_NETDB_DNSCLIENT_MAXRESPONSE
It's better to have a default working for many cases.
Usually DNS servers are not optimized for embedded clients.
Users can fine tune for their environment anyway.
2020-05-15 14:23:48 +08:00
YAMAMOTO Takashi
e783a59f9d netdb: Truncate the list of ips instead of bailing out with ERANGE
In many cases, users only care the first address anyway.
2020-05-15 14:23:48 +08:00
YAMAMOTO Takashi
b36420ef32 Bump the default of CONFIG_NETDB_BUFSIZE
The old default didn't work even for moderate cases.
(eg. strlen(name) == 17, two ipv4 addresses, on 64-bit sim)
2020-05-15 14:23:48 +08:00
Jukka Laitinen
1071934350 arch/arm/src/stm32h7/stm32_sdmmc.c: Fixes for IDMA transfer and cache usage
This simplifies the sdmmc driver when the IDMA is in use. There is no need to mix
IDMA and interrupt based transfers; instead, when making unaligned data tranfers,
just make IDMA into an internal aligned buffer and then copy the data.

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:31:33 -06:00
Jukka Laitinen
a532b0b53a arch/arm/src/stm32h7/stm32_dma.c: Optimization for stm32_sdma_capable
It should not be an error to clean cache beyond the dma source buffer
boundaries. It would just prematurely push some unrelated data from
cache to memory.

The only case where it would corrupt memory is that there is a dma
destination buffer overlapping the same cache line with the source
buffer. But this can't happen, because a destination buffer must always
be cache-line aligned when using write-back cache.

This patch enables doing dma tx-only transfer from unaligned source
buffer when using write-back cache.

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:31:06 -06:00
Jukka Laitinen
c7acbb80d8 arch/arm/src/stm32h7/stm32_dma.c: Allow transfer from peripheral to AXI SRAM
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:31:06 -06:00
Jukka Laitinen
f5571b2550 arch/arm/src/stm32h7/stm32_dma.c: Fix DEBUGASSERT compilation
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:31:06 -06:00
Jukka Laitinen
8f559b1276 arch/arm/src/stm32h7/stm32_dma.c: Split long lines to pass style checks
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:31:06 -06:00
Jukka Laitinen
1e0f416a93 arch/arm/src/stm32h7: Make flash program size configurable
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:27:49 -06:00
Jari Nippula
de8f3b73d5 arch/arm/src/stm32h7/stm32_flash.c: fix write and erase
Correct flash write and erase functions, they inherit some
broken code from other platforms. Also fix the confusion between
eraseblock(sector) and page sizes.

Signed-off-by: Jari Nippula <jari.nippula@intel.com>
2020-05-14 17:27:49 -06:00
Jukka Laitinen
f9a886f8b7 arch/arm/src/stm32h7/stm32_flash.c: Lock flash option register
If the flash option register was locked before modifying it, return
it to the locked state after modify.

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:27:49 -06:00
YAMAMOTO Takashi
573f02791f netdev_ioctl: Update a comment 2020-05-14 11:26:03 -06:00
Nathan Hartman
8d985819b3 Fix typos
Comments only. No functional changes.
2020-05-14 10:49:44 -06:00
chao.an
a5868864bc net: remove unnecessary spaces
minor style fix

Change-Id: I06b6fe48628440490090b89a39baf01481f79b79
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-05-14 07:54:57 -06:00
chao.an
8bce416c25 sim/tapdev: follow the tunnel MTU size
Change-Id: Ia32255517650d95ea3a675ee9fe5b69e923fb51a
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-05-14 07:54:57 -06:00
chao.an
9cc2f50405 netdev/register: configurable net packet size
Change-Id: I2af571a0273e67a06c1b4543eac3ded7cfdd8060
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-05-14 07:54:57 -06:00
chao.an
03f462c5cd net/sockopt: fix nxstyle warning
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-05-14 07:53:15 -06:00
chao.an
608436a75f net/sockopt: do not set the errno to SO_ERROR
SO_ERROR is used to report asynchronous errors that are the result
of events within the network stack and not synchronous errors that
are the result of a library call(send/recv/connect)

Synchronous results are reported via errno.

Linux Programmer's Manual
...
NAME
       getsockopt, setsockopt - get and set options on sockets
...
RETURN VALUE
...
       On error, -1 is returned, and errno is set appropriately

Change-Id: I1a1a05a684dff8672aaf47eabee157ac0d275c2d
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-05-14 07:53:15 -06:00
Masayuki Ishikawa
0bd5dda2a3 boards: spresense: Remove CONFIG_EXAMPLES_FTPC=y to avoid compile error on CI
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>>
2020-05-14 14:17:47 +02:00
Masayuki Ishikawa
2a47370af3 include: wireless: Fix style violations in ioctl.h
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-05-14 14:17:47 +02:00
Masayuki Ishikawa
d2de9238a4 boards: spresense: Add support ftpc and ftpd to wifi/defconfig
NOTE: lpwork's priority has been changed from 30 to 60 to avoid an
error when calling getsockname() just after connect() in ftpc.c

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-05-14 14:17:47 +02:00
Masayuki Ishikawa
3ead63c353 drivers: wireless: Fix to bind() with port=0 in gs2200m.c
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-05-14 14:17:47 +02:00
Masayuki Ishikawa
21c588b126 drivers: wireless: Add support for getsockname() to gs2200m
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-05-14 14:17:47 +02:00
Matias Nitsche
c86258c9a0 stm32 nunchuck: small fixes 2020-05-14 08:32:48 +02:00
Matias Nitsche
e0d21275df fix all remaining nxstyle errors 2020-05-14 08:32:48 +02:00
Matias Nitsche
2d8a534ef5 nxstyle 2020-05-14 08:32:48 +02:00
Matias Nitsche
5fd9bd5837 stm32: moved all remaining sensor initialization to common board logic 2020-05-14 08:32:48 +02:00
Matias Nitsche
05e005c58e stm32: move ina219 initialization to common board logic directory 2020-05-14 08:32:48 +02:00
Matias Nitsche
60d51f2907 nxstyle fixes 2020-05-14 08:32:48 +02:00
Matias Nitsche
4fdf2520e6 stm32: move qencoder initialization to common board logic 2020-05-14 08:32:48 +02:00
Matias Nitsche
856c3e4263 nxstyle fixes 2020-05-14 08:32:48 +02:00
Matias Nitsche
cf1ff36e0e stm32: move zerocross sensor initialization to common board logic 2020-05-14 08:32:48 +02:00
Matias Nitsche
562210a9bd stm32: move APDS9960 initialization to common board logic 2020-05-14 08:32:48 +02:00
Matias Nitsche
beba7a8f0b stm32: move HCSR04 initialization to common board logic 2020-05-14 08:32:48 +02:00
Matias Nitsche
382ccf7b79 nxstyle fixes 2020-05-14 08:32:48 +02:00
Matias Nitsche
126be360fa stm32: fix NRF24L01 initialization for stm32_tiny 2020-05-14 08:32:48 +02:00
Matias Nitsche
c442725f23 nxstyle fix 2020-05-14 08:32:48 +02:00
Matias Nitsche
6ca46520df stm32: migrate all boards to common logic system (Makefile -> Make.defs) 2020-05-14 08:32:48 +02:00
Matias Nitsche
64987db9e1 stm32: use macros from board.h to pass configuration to common board logic, not structs 2020-05-14 08:32:48 +02:00
Matias Nitsche
944ed5ae0a stm32: move NRF24L01 support into common board logic 2020-05-14 08:32:48 +02:00
Matias Nitsche
7c7836d1d7 stm32: move lm75 handling into common board logic; delete unused lm75 file for stm3210e-eval 2020-05-14 08:32:48 +02:00
Matias Nitsche
35471e33dc stm32: move ssd1306 and tone driver handling to common board logic 2020-05-14 08:32:48 +02:00
Matias Nitsche
717fa46a53 stm32: move nunchuck driver to common board logic 2020-05-14 08:32:48 +02:00
Matias Nitsche
d444df59af stm32: move APA102, VEML6070 and MAX6675 initialization to board common logic 2020-05-14 08:32:48 +02:00
Matias Nitsche
cf8206a0cb nxstyle fixes 2020-05-14 08:32:48 +02:00
Matias Nitsche
edafeccc9f stm32: make BMP180 initialization part of stm32 board-common logic 2020-05-14 08:32:48 +02:00
Gregory Nutt
801b9d6e5f arch/arm: Remove support for old redundant toolchains.
Remove support for the Codesourcery, Atollic, DevKitArm, Raisonance, and CodeRed toolchains.  Not only are these tools old and no longer used but they are all equivalent to standard ARM EABI toolchains.  Retaining specific support has no effect (they are still supported, but now just as generic EABI toolchains).
2020-05-13 18:41:10 +01:00
Jukka Laitinen
e989147119 arch/arm/src/stm32h7: Add support for spi simplex configurations
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 07:29:14 -06:00
Jukka Laitinen
574b2593e6 arch/arm/src/stm32h7/stm32_spi.c: Correct the dmacapable check
First, configure the dmacfg in spi_dmarxsetup and spi_dmatxsetup. Then,
check for dmacapable, and only after that set up the dma.

This way the dmacapable actually works, and we don't need to initialize
the dmacfg structures twice.

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 07:29:14 -06:00
Jukka Laitinen
d1c406d65d arch/arm/src/stm32h7/stm32_spi.c: Correct cache flush
When starting dma transfer, the dcache for the TX buffer should be cleaned.
"flush" performs also invalidate, which is unnecessary. The TX buffer
can be unaligned to the cahche line in some(most) cases, whereas RX buffer
can never be.

The cache for the receive buffer can be dirty and valid before call to exchange.
Thus another memory access (hitting the same cache line) may corrupt receive data
while waiting for transfer to complete. So the receive buffer should be
invalidated before the transfer

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 07:29:14 -06:00