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Author SHA1 Message Date
Alin Jerpelea
cbbcdd2393 boards: lpc43xx: update licenses to Apache 
Gregory Nutt is the copyright holder for those files and he has submitted the
SGA as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-08-16 07:11:32 -07:00
Alin Jerpelea
7f458a8cb2 boards: lpc17xx_40xx: update licenses to Apache 
Gregory Nutt is the copyright holder for those files and he has submitted the
SGA as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-08-16 07:11:32 -07:00
Alin Jerpelea
2d395fae31 boards: kinetis: update licenses to Apache 
Gregory Nutt is the copyright holder for those files and he has submitted the
SGA as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-08-16 07:11:32 -07:00
Alin Jerpelea
4fdeea8f4b boards: imxrt: update licenses to Apache 
Alan Carvalho de Assis has submitted the ICLA

Gregory Nutt is the copyright holder for those files and he has submitted the
SGA as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-08-16 07:11:32 -07:00
Alin Jerpelea
12ebe75fa0 include: update licenses to Apache 
Gregory Nutt is the copyright holder for those files and he has submitted the
SGA as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-08-16 07:11:32 -07:00
Alin Jerpelea
351091ed75 author: Pierre-noel Bouteville: update licenses to Apache 
Gregory Nutt has submitted the SGA as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-08-16 07:11:32 -07:00
Xiang Xiao
4f8c3ab901 fs: Support 64bit in register_[block|mtd]partition 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-16 10:16:09 -03:00
Xiang Xiao
71269811ca mtd: Implement BIOC_PARTINFO for all drivers 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-16 10:08:26 -03:00
Virus.V
5a1de89370 riscv/bl602: Fix that AP cannot be start when STA have been started. 2021-08-16 02:06:59 -07:00
YAMAMOTO Takashi
c073b36741 tools/esp32/backtrace.gdbscript: Add a few convenient functions 2021-08-16 11:01:13 +02:00
Xiang Xiao
f63d1cfbbb arch/arm: Add NVIC_FPCCR_XXX macro to avoid the hard code value 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-15 10:50:52 +02:00
Xiang Xiao
fad0c3b38b arch/arm: Add NVIC_CPACR_CP_XXX(n) macro to avoid the hard code value 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-14 11:41:59 -07:00
Xiang Xiao
33666832c5 arch/arm: Add NVIC_AIRCR_VECTKEY macro to avoid the hard code value 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-14 11:41:59 -07:00
mi
21316466d2 fs/littlefs: improve littlefs flash block erase balance performance 2021-08-14 11:21:44 -07:00
Abdelatif Guettouche
5b350f3a0f arch/*_reprioritizertr.c: Fix typos in comments. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-08-14 11:19:34 -07:00
Abdelatif Guettouche
9859ceb8fd sched/: Fix some typos. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-08-14 11:19:34 -07:00
zhuyanlin
5e817e25e8 libs:cxx.defs: bypass -Wno-missing-exception-spec flag in xcc 
Xtensa-toolchain do not recognize -Wno-missing-exception-spec flags
 2021-08-14 14:11:34 -03:00
Abdelatif Guettouche
6b412c873b tools/esp32/Config.mk: Bring back the old behaviour where ESPTOOL_BINDIR 
can be omitted from the command line when flashing.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-08-13 20:46:51 -03:00
Abdelatif Guettouche
11fe075e5e tools/esp32/Config.mk: Remove an unused option. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-08-13 20:46:51 -03:00
Xiang Xiao
162893cc3b fs/partition: Support BIOC_PARTINFO 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-13 08:45:18 -03:00
Gustavo Henrique Nihei
1dfcc6ab49 xtensa/esp32: Enable boot from Espressif's port of MCUboot 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-08-13 08:44:20 -03:00
zhuyanlin
1a1b1cc2b4 arch:xtensa: replace include file from src/chip_xxx to chip.h 
Use chip.h as a standard include file, replace chip_xxx in src dir
 2021-08-12 16:18:35 +02:00
zhuyanlin
30a2338e92 arch:esp: create chip.h header for chip src code. 
Create chip.h header for esp src code.
 2021-08-12 16:18:35 +02:00
zhuyanlin
6d592256fb arch:xtensa: add __ASSEMBLY__ for espxxx_soc.h 
Those header contain syntax not be recognize by gnu assembler.
 2021-08-12 16:18:35 +02:00
Alexander Vasiljev
4229099944 arch/arm/stm32h7: dma and serial: add TRBUFF flag. It is obligatory for uart. 2021-08-12 08:07:18 -03:00
Xiang Xiao
6b6c11f0ad mtd: Replace MTDIOC_XIPBASE with BIOC_XIPBASE 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-12 08:01:29 -03:00
Xiang Xiao
177e1ced3f Revert "mtd: Add MTDIOC_FLUSH IOCTL like MTDIOC_XIPBASE" 
to simplify flt and partion layer implementation

This reverts commit 2e49e1bc5c.
 2021-08-12 08:01:29 -03:00
Xiang Xiao
f4addbd640 mtd: Replace MTDIOC_PARTINFO with BIOC_PARTINFO 
to simplify flt and partion layer implementation

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-12 08:01:29 -03:00
Alan C. Assis
1023918d37 Doc/esp32: Fix wapi psk command, value 1 is for WEP 2021-08-11 20:04:48 -07:00
Michal Lenc
c456b15916 Documentation: add guide for pysimCoder integration with NuttX 
This commit adds documentation for compiling NuttX for pysimCoder and
then running pysimCoder designed applications on NuttX. PysimCoder is
a Rapid Control Application Development Tool that can transfer block
diagrams into C code and can be used in real time control applications.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
 2021-08-11 18:04:09 +02:00
Xiang Xiao
d1687418db mtd: Remove the empty MTDIOC_XIPBASE implmentation 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-11 09:50:51 -03:00
raiden00pl
610ac21240 nucleo-f302r8: add qenco example configuration 2021-08-11 09:30:12 -03:00
raiden00pl
736bcf035e nucleo-g431rb: add qenco example configuration 2021-08-11 09:30:12 -03:00
raiden00pl
f0b377f434 nucleo-f446re: add qenco example configuration 2021-08-11 09:30:12 -03:00
raiden00pl
8cb58213e5 nucleo-f103rb: add qenco example configuration 2021-08-11 09:30:12 -03:00
Xiang Xiao
76904371a1 fs: Remove endsector from partition_info_s 
since it can be computed from startsector and numsectors simply

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-11 09:26:43 -03:00
Gustavo Henrique Nihei
62fa4b0018 mtd: Translate BIOC_PARTINFO into MTDIOC_PARTINFO on FTL driver 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-08-10 19:45:14 -07:00
Gustavo Henrique Nihei
b321ae023c fs: Add ioctl command for retrieving partition info of a block device 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-08-10 19:45:14 -07:00
Gustavo Henrique Nihei
cddd9c9c38 mtd: Enable retrieval of MTD partition information 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-08-10 19:45:14 -07:00
Gustavo Henrique Nihei
6f5d02fb91 fs: Add data structure for Partition Information 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-08-10 19:45:14 -07:00
zhuyanlin
e333733053 xtensa:coproc: fix XTENSA_CP_ALLSET error in some case 
Consider follow coprocessor configuration case:

\#define XCHAL_CP_NUM                    1       /* number of coprocessors */
\#define XCHAL_CP_MAX                    2       /* max CP ID + 1 (0 if none) */
\#define XCHAL_CP_MASK                   0x02    /* bitmask of all CPs by ID */
\#define XCHAL_CP_PORT_MASK              0x00    /* bitmask of only port CPs */
\
\#define XCHAL_CP1_NAME                  "AudioEngineLX"
\#define XCHAL_CP1_IDENT                 AudioEngineLX
\#define XCHAL_CP1_SA_SIZE               208     /* size of state save area */
\#define XCHAL_CP1_SA_ALIGN              8       /* min alignment of save area */
\#define XCHAL_CP_ID_AUDIOENGINELX       1       /* coprocessor ID (0..7) */

In this case, XTENSA_CP_ALLSET is 0x1, but valid coprocessors
bitmap is 0x2, use marco XCHAL_CP_MASK instead, it is bitmap of all
vaild coprocs.

Change-Id: I63ec01e4bd0cbafc62d56636cc11bdc4a2f7857f
 2021-08-10 19:44:55 -07:00
Abdelatif Guettouche
054e284785 *_cpustart.c: Fix typos in function description. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-08-11 11:06:27 +09:00
Xiang Xiao
a09f262f1e fs/userfs: Support fchstat and chstat callback 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-10 14:57:48 -03:00
Xiang Xiao
9d96c54b1b fs/unionfs: Support fchstat and chstat callback 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-08-10 14:57:34 -03:00
Alan C. Assis
9d79f82e24 mmap: Fix note: initialize the variable 'ret' 2021-08-10 09:08:25 -07:00
Alan C. Assis
f3d1b6342c mkrd: Fix error: variable 'ret' is uninitialized 2021-08-10 09:08:25 -07:00
Alan C. Assis
e809c80f07 mtd/smartfs: Fix implicit conversion from 'int' to 'short' 2021-08-10 09:08:25 -07:00
Alan C. Assis
3309b8eee6 boards/sim: Add smartfs profile example 2021-08-10 09:08:25 -07:00
Fotis Panagiotopoulos
5b7ff03f40 lpc17_40: Fixed I2C port sanity check. 2021-08-10 09:04:33 -07:00
raiden00pl
2b3106fb47 Qencoder implementations for imxrt, stm32f7, stm32h7, stm32l4 and tivia don't support QEIOC_SETPOSMAX 2021-08-10 11:19:05 -03:00