Commit Graph

17153 Commits

Author SHA1 Message Date
Abdelatif Guettouche
77302f9d3a xtensa/esp32: Add more flash options to esptool.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-03 18:28:18 -08:00
Xiang Xiao
c8d4a4c76a mtd/progmem: Add up_progmem_read callback guarded by ARCH_HAVE_PROGMEM_READ
since sometime platform code need do some special action during memcpy

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Id108ef4232376feab3e37e9b3aee9a7927a03bd4
2021-03-03 13:47:59 -08:00
ligd
f9d20ea4d2 sigdeliver: fix system block when kill signal to idle in SMP
Bug description:

CONFIG_SMP=y

Suppose we have 2 cores in SMP, here is the ps return:

PID GROUP CPU PRI POLICY TYPE    NPX STATE     STACK   USED  FILLED COMMAND
  0     0   0   0 FIFO   Kthread N-- Assigned 004076 000748  18.3%  CPU0 IDLE
  1     0   1   0 FIFO   Kthread N-- Running  004096 000540  13.1%  CPU1 IDLE

nsh> kill -4 0
or:
nsh> kill -4 1

system blocked.

Reason:

In func xx_sigdeliver() restore stage, when saved_irqcount == 0, that means
rtcb NOT in critical_section before switch to xx_sigdeliver(), then we need
reset the critical_section state before swith back.

Fix:

Add condition to cover saved_irqcount == 0.

Change-Id: I4af7f95e47f6d78a4094c3757d39b01ac9d533b3
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-03-03 15:03:32 +00:00
Yuichi Nakamura
9d0b3594f6 arm/rp2040: Add RP2040 I2C device support 2021-03-03 09:35:45 -03:00
Yuichi Nakamura
60b18467f3 arm/rp2040: Add rp2040_gpio_set_pulls() 2021-03-03 09:35:45 -03:00
David Sidrane
ab5f46d46c stm32h7:Add DBGMCU 2021-03-02 18:28:19 -08:00
chenwen
19627095e4 esp32/esp32_allocateheap.c: Support the maximum available internal heap configuration 2021-03-02 18:27:20 -08:00
chenwen
516c553b97 esp32/esp32_wifi_adapter.c: Fix the issue of WiFi internal malloc from PSRAM 2021-03-02 18:27:20 -08:00
Nathan Hartman
a3f0923ad0 arch/stm32f7: Fix nxstyle errors
arch/arm/src/stm32f7/stm32_tim.h:

    * Fix nxstyle errors.
2021-03-02 21:34:33 +00:00
David Sidrane
1e5754232a stm32f7:Add option to auto select LSE CAPABILITY
This Knob will cycle through the values from
   low to high. To avoid damaging the crystal.
   We want to use the lowest setting that gets
   the OSC running. See app note AN2867
2021-03-02 14:34:56 -03:00
David Sidrane
9fbd7f9dc5 stm32h7:Add option to auto select LSE CAPABILITY
This Knob will cycle through the correct*
   values from low to high. To avoid damaging
   the crystal. We want to use the lowest setting
   that gets the OSC running. See app note AN2867

    *It will take into account the rev of the silicon
    and use the correct code points to achive the drive
    strength. See Eratta ES0392 Rev 7 2.2.14 LSE oscillator
    driving capability selection bits are swapped.
2021-03-02 14:34:56 -03:00
Michael Jung
fbfddda28b armv8-m: Fix EXC_RETURN for non-secure usage
With TrustZone support in armv8-m the bit-fields in EXC_RETURN have been
extended.  Bit 6 ('S') now specifies whether the interrupted program was
running in the Non-Secure (S=0) or Secure (S=1) security state.
Furthermore, Bit 0 ('ES' - Exception Secure) specifies the
security state athe exception is taken to (0: Non-Secure, 1: Secure).

When NuttX is run together with TrustedFirmware-M as the application in
the non-secure world both the S and the ES bits have to be set to '0'.
For armv8-m those are also the correct values if TrustZone is not
implemented on the respective MCU or if it is disabled.

Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-02 07:28:42 -03:00
YAMAMOTO Takashi
c230edea29 esp32_ummap: write back spiram cache before calling Cache_Flush
This seems to fix esp32_readdata_encrypted() with spiram "buffer".

Note: I'm not sure if this is the right fix or not.
I couldn't find any documentation about Cache_Flush.
2021-03-02 08:37:50 +00:00
Nathan Hartman
75eb3e8ec2 arch/stm32f7: Fix nxstyle errors
arch/arm/src/stm32f7/stm32_lowputc.c:

    * Fix nxstyle errors.
2021-03-01 18:13:06 +00:00
Xiang Xiao
3d24288a66 arm/cxd56xx: Beautify the coding style in cxd56_gnss.c
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-03-01 10:00:13 -05:00
Xiang Xiao
9473434587 Ensure the kernel component don't call userspace API
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-03-01 09:23:09 +09:00
Masayuki Ishikawa
ef1826e133 arch: armv6-m: Apply armv7-m signal handling logic
Summary:
- This commit applies armv7-m signal handling logic

Impact:
- armv6-m signal handling

Testing:
- Tested with ostest with the following configs
- raspberrypi-pico:nsh, raspberrypi-pico:smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-26 22:23:03 -06:00
Fotis Panagiotopoulos
40fdf388bd Fixed __stack_overflow_trap declaration typo. 2021-02-26 12:08:16 -08:00
Nathan Hartman
9d48beb2c8 arch/stm32f7: Fix nxstyle errors
arch/arm/src/stm32f7/stm32_ltdc.h,
arch/arm/src/stm32f7/stm32_pm.h,
arch/arm/src/stm32f7/stm32_pmsleep.c,
arch/arm/src/stm32f7/stm32_pmstandby.c,
arch/arm/src/stm32f7/stm32_pmstop.c,
arch/arm/src/stm32f7/stm32_pwm.h:

    * Fix nxstyle errors.
2021-02-26 17:13:05 +00:00
Peter van der Perk
4842868be2 [FlexCAN] Fix TX drop #2792 and correctly set CAN timings to non-zeroed registers 2021-02-26 06:14:33 -08:00
Byron Ellacott
1105cf0669 ez80: fix several bugs in emac driver
IRQs cannot be individually disabled on the eZ80, so using
`up_disable_irq()` had no effect. This left the IRQ handler being
constantly triggered without the lower half handler running.

The macro for EMAC stats was incompatible with Clang. The simplified
form gives identical results under ZDS-II.

The MII clock speed must be set before trying to read MII registers.
It's now done before resetting the PHY using the Mode Control Register.

MII initialization waited on the auto-neogotiate restart bit being set
but PHY hardware is frequently fast enough to have cleared the bit
before the first read of it. It now instead just waits on auto-negotiate
completing. The MII poll loop now uses `up_mdelay` because it was far
too fast at 50MHz using a busy loop, giving time for a link to be
established.

Bad packets are now processed enough to release their buffers back to
the EMAC hardware.

A few typos, unused variables, and other miscellaneous issues were also
fixed.
2021-02-26 03:25:58 -06:00
Michal Lenc
04fc5e314d arch/arm/src/imxrt: updated flexcan driver to support classical and FD frames at once
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2021-02-25 22:31:04 -08:00
Abdelatif Guettouche
39016f6d68 risc-v/esp32c3: Configure clock and call board initialize at startup.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-25 22:13:26 -08:00
hotislandn
651b905b99 arch:rv64:add API up_copyfullstate for later FPU support.
Signed-off-by: hotislandn <hotislandn@hotmail.com>
2021-02-25 11:26:27 -08:00
Yuichi Nakamura
a556bbf3a4 arm/rp2040: Fix LDFLAGS for boot stage2 2021-02-25 11:25:27 -08:00
Gustavo Henrique Nihei
7fe096c65e risc-v: Fix typos reported by codespell 2021-02-25 16:25:47 +00:00
Gustavo Henrique Nihei
ed0a1b724b xtensa/esp32: Fix typos reported by codespell 2021-02-25 15:02:15 +00:00
hotislandn
30cb7d3983 arch:rv32:up_sigdeliver missing fpu contexts.
Signed-off-by: hotislandn <hotislandn@hotmail.com>
2021-02-24 23:42:18 -08:00
Masayuki Ishikawa
8085010ae8 arch: arm: Add 'select ARM_HAVE_WFE_SEV' to ARCH_CHIP_RP2040
Summary:
- This commit adds 'select ARM_HAVE_WFE_SEV' to ARCH_CHIP_RP2040
- Now NuttX spinlock uses WFE/SEV to reduce power consumption
- Also, modify a comment on rp2040

Impact:
- rp2040 only

Testing:
- Tested with raspberrypi-pico:smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-24 19:12:22 -08:00
Nathan Hartman
7c5174a53b arch/stm32f7: Fix nxstyle errors
arch/arm/src/stm32f7/stm32_config.h,
arch/arm/src/stm32f7/stm32_dma.h,
arch/arm/src/stm32f7/stm32_dma2d.h,
arch/arm/src/stm32f7/stm32_dtcm.h,
arch/arm/src/stm32f7/stm32_dumpgpio.c,
arch/arm/src/stm32f7/stm32_ethernet.h,
arch/arm/src/stm32f7/stm32_gpio.c,
arch/arm/src/stm32f7/stm32_gpio.h:

    * Fix nxstyle errors.
2021-02-24 22:39:49 +00:00
Yuichi Nakamura
01699e00e0 arm/rp2040: Raspberry Pi Pico SMP support 2021-02-25 07:20:59 +09:00
Gustavo Henrique Nihei
6edeb9ebd9 risc-v/esp32c3: Free CPU interrupt if irq_attach fails 2021-02-24 15:56:26 +00:00
Gustavo Henrique Nihei
5c24c98880 risc-v/esp32c3: Invalidate CPU interrupt number after free 2021-02-24 15:56:26 +00:00
YAMAMOTO Takashi
ee8cea1f4b esp32: xtensa_user: Implement a few more instructions
You can find them used in the ROM version of memcpy.
While it might be controversial if it's a good idea to use the ROM version
of these functions, it's nicer to support more instructions here anyway.
2021-02-24 10:34:55 +00:00
Abdelatif Guettouche
fb68a4b777 esp32c3: Add system reset.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-23 18:13:02 -08:00
Gustavo Henrique Nihei
48ff647fe9 risc-v/esp32c3: Fix erroneous references to ESP32-C3 2021-02-23 18:12:16 -08:00
David Sidrane
62321fa5db s32k1xx:Support ramfunc 2021-02-23 18:11:41 -08:00
Nathan Hartman
c90fffcc09 arch/stm32f7: Fix nxstyle errors
arch/arm/src/stm32f7/stm32_pwr.c,
arch/arm/src/stm32f7/stm32_pwr.h,
arch/arm/src/stm32f7/stm32_usbhost.h:

    * Fix nxstyle errors.
2021-02-22 18:18:58 -08:00
Gustavo Henrique Nihei
af8e71d9e9 risc-v/esp32c3: Fix inconsistent guard comment 2021-02-22 09:24:14 -08:00
Gustavo Henrique Nihei
628e2288aa risc-v/esp32c3: Add missing header guard for lowputc 2021-02-22 09:24:14 -08:00
Gustavo Henrique Nihei
ca30c1db69 risc-v/esp32c3: Build serial driver only when selected 2021-02-22 09:24:14 -08:00
Abdelatif Guettouche
491a4c1ed2 risc-v/esp32c3: Don't reserve any vectors for any special use.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-22 09:21:24 -08:00
Gustavo Henrique Nihei
291a5755cc risc-v/esp32c3: Add support for MWDT0 and MWDT1 2021-02-22 17:18:01 +00:00
Yuichi Nakamura
7b8c72ec1b boards: raspberrypi-pico: Add nshsram defconfig for SRAM build 2021-02-22 09:11:09 -08:00
Brennan Ashton
f23f2a8557 Fix context switch bug for pic32mx 2021-02-21 22:24:12 -08:00
Masayuki Ishikawa
cf72133d3c rp2040: Continue to build even if PICO_SDK_PATH is not set
Summary:
- In the previous implementation, the build system stops if
  PICO_SDK_PATH is not set.
- However, this behavior is not good for CI. Because the path
  is only used to generate a flash image.
- This commit fixes this issue

Impact:
- rp2040 only

Testing:
- Tested with and without PICO_SDK_PATH
2021-02-21 20:30:58 -08:00
Brennan Ashton
7a9e9b770f pic32mz does not have ANSELJ register on port K 2021-02-21 18:27:56 -08:00
Alexander Vasiljev
8bb50b578b arch/stm32h7: add definitions for DAC 2021-02-21 07:39:05 -08:00
Abdelatif Guettouche
067da56d0c esp32c3: Some cosmetics and style fixes.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-21 10:29:43 -03:00
Abdelatif Guettouche
10822799fb esp32c3: Add GPIO IRQ support.
The GPIO example was also extended to include testing an interrupt pin.

Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
Co-authored-by: Alan Carvalho <alan.carvalho@espressif.com>
2021-02-21 10:29:43 -03:00