chao an
02acf2d2a4
risc-v/cmake: set nostdlib to c compiler
...
To avoid build break:
ld: riscv-none-elf/lib/rv64imafdc_zicsr/lp64d/crt0.o: in function `.L0 ':
(.text+0x8): undefined reference to `__bss_start'
ld: (.text+0x10): undefined reference to `_end'
ld: (.text+0x36): undefined reference to `main'
collect2: error: ld returned 1 exit status
Signed-off-by: chao an <anchao@lixiang.com>
2024-01-18 09:53:53 +01:00
chao an
2fd95611cb
risc-v/cmake: configurable vendor ISA extensions
...
merge below commit into cmake:
1. risc-v/toolchain: configurable vendor ISA extensions
This option allows the platform to enable some vendor-customized ISA extensions,
E.g OpenHW, SiFive, T-Head.
SiFive Intelligence Extensions:
SiFive Vector Coprocessor Interface(VCIX): xsfvcp
SiFive FP32-to-int8 Ranged Clip Instructions: Xsfvfnrclipxfqf
SiFive Matrix Multiply Accumulate Instructions: Xsfvfwmaccqqq
SiFive Int8 Matrix Multiplication Instructions: XSFvqmaccqoq
Command Line:
xsfvcp0p1_xsfvfnrclipxfqf0p1_xsfvfwmaccqqq0p1_xsfvqmaccqoq0p1
2. "V" Standard Extension for Vector Operations
3. "Q" Standard Extension for Quad-Precision Floating-Point
Signed-off-by: chao an <anchao@lixiang.com>
2024-01-18 09:53:53 +01:00
xuxin19
9112b9e4c0
cmake:add zifencei extension in compile options
...
this fixes the error opcode `fence.i` by cmake compilation
Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2023-10-26 21:01:46 +08:00
xuxin19
e3003f691b
cmake:init RISC-V cmake qemu-rv build
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cmake currently does not support non-FlatBuild,
need disable ELF and LOADABLE when compiling other defconfigs
```
cmake -B build -DBOARD_CONFIG=rv-virt/smp64 -GNinja # for rv32:rv-virt/smp
cmake --build build -t menuconfig
cmake --build build
qemu-system-riscv64 -semihosting -M virt,aclint=on -cpu rv64 -smp 8 -bios none -kernel nuttx -nographic
```
Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2023-10-26 21:01:46 +08:00
