Commit Graph

48761 Commits

Author SHA1 Message Date
Huang Qi
44857ab30e driver/serial: Echo only determined by ECHO flag with termios enabled
Fix a bug that can not disable echo even if termios is enabled.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2023-03-03 09:44:30 +02:00
zhangyuan21
392eebf5e2 arch/armv7-a: fixed scu cpu tagram mask define issue
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-03-03 11:41:33 +08:00
Huang Qi
68384e9db4 drivers/serial: Echo input in driver layer
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2023-03-03 11:37:41 +08:00
raiden00pl
74ffdb0b49 boards/nrf52: update sdc configs 2023-03-03 09:41:17 +08:00
raiden00pl
eda99e35bb arch/nrf52: use the lates SoftDevice release (v2.3.0)
A list of breaking changes:
- SoftDevice libraries was renamed and libaries are now cmpatible with all platfroms with a given faimily.
- The random number generator was decoupled from the controller and must now be provided by the user.
  We use arc4random_buf NuttX API for this.
- sdc_support_ API must be called before sdc_cfg_set()
- update public API terms to Bluetooth Core Specification v5.3 (mainly change slave/master to central/peripheral)
  NuttX NRF52 configuration options properly updated.
- BLE features are supported only if the proper BLE role is selected
- sdc_hci_evt_get() and sdc_hci_data_get() have been replaced by sdc_hci_get()
2023-03-03 09:41:17 +08:00
Xiang Xiao
66c5f86018 sched: Disable stdio api by default when DEFAULT_SMALL equals y
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-03-03 00:18:03 +02:00
raiden00pl
535df527cb boards/nrf52840-dk: add sdc examples 2023-03-03 02:23:56 +08:00
raiden00pl
16a711c1e2 boards/nrf52832-dk: add sdc examples 2023-03-03 02:23:56 +08:00
yinshengkai
205ca26556 libc/streams: Implement gets/puts for all streams
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2023-03-03 00:49:04 +08:00
yinshengkai
6e35a51feb note: optimize noteram_add, copy as much content as possible at a time
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2023-03-02 22:55:50 +08:00
jturnsek
081b04f05e iMXRT MCUboot support 2023-03-02 22:40:44 +08:00
Jari Nippula
aeddec2ec5 clear i2c ints before the transfer starts
If transfer is restarted in irq handler the interrupts shall be
cleared before the start bit is set in control register. This is
to avoid ints being accidentally cleared before they are handled leading
to timeout error.
2023-03-02 22:25:56 +08:00
raiden00pl
da76aa71aa boards: initial support for nrf5340-dk 2023-03-02 22:06:14 +08:00
raiden00pl
055a21b2fe nrf5340-audio-dk/README.txt: correct board name 2023-03-02 22:06:14 +08:00
Jari Nippula
6ba906691a clear spi int before the transfer starts
In spi_irq handler the data is written into txfifo and transfer
is started before the TXDONE interrupt is cleared. If the bus/memory
access is in some cases delayed, the spi transfer may have been
finished already before the interrupt register is cleaned for the
transfer. This leads the early arrived interrupt to be just removed
and never handled, which would cause a timeout error.
This patch moves the clearing of the interrupt to the place before
the tx is started, so the interrupt is not missed in above cases.
2023-03-02 22:05:25 +08:00
Jari Nippula
ab5d6d759a arch/arm/src/stm32f7/stm32_i2c.c: Driver cleanup
Remove unnecessary heap allocation by relocating ops inside priv data
2023-03-02 21:46:44 +08:00
Huang Qi
dfc70b1ddb libc/stdio: Implement lib_get_stream
Use lib_get_stream() to fetch stdin/stdout/stderr,
since is more easy to works with other language by function call
than export native C structure memory layout.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2023-03-02 09:56:57 +01:00
chao an
b01b93cb54 sim/wamr: add example of WAMR(WebAssembly Micro Runtime)
Added compilation rules to support the construction of WebAssembly(WASM/WAMR):

1. Compile Toolchain
 1> Download WASI sdk and export the WASI_SDK_PATH path:

$ wget https://github.com/WebAssembly/wasi-sdk/releases/download/wasi-sdk-19/wasi-sdk-19.0-linux.tar.gz
$ tar xf wasi-sdk-19.0-linux.tar.gz
Put wasi-sdk-19.0 to your host WASI_SDK_PATH environment variable, like:
$ export WASI_SDK_PATH=`pwd`/wasi-sdk-19.0

 2> Download Wamr "wamrc" AOT compiler and export to the PATH:
$ mkdir wamrc
$ wget https://github.com/bytecodealliance/wasm-micro-runtime/releases/download/WAMR-1.1.2/wamrc-1.1.2-x86_64-ubuntu-20.04.tar.gz
$ tar xf wamrc-1.1.2-x86_64-ubuntu-20.04.tar.gz
$ export PATH=$PATH:$PWD

2. Configuring and running

 1> Configuring sim/wamr and compile:

nuttx$ ./tools/configure.sh  sim/wamr
nuttx$ make
...
Wamrc Generate AoT: /home/archer/code/nuttx/n5/apps/wasm/hello.aot
Wamrc Generate AoT: /home/archer/code/nuttx/n5/apps/wasm/coremark.aot
LD:  nuttx

 2> Copy the generated wasm file(Interpreter/AoT)

nuttx$ cp ../apps/wasm/hello.aot .
nuttx$ cp ../apps/wasm/hello.wasm .
nuttx$ cp ../apps/wasm/coremark.wasm .

 3> Run iwasm

nuttx$ ./nuttx
NuttShell (NSH) NuttX-10.4.0
nsh> iwasm /data/hello.wasm
Hello, World!!
nsh> iwasm /data/hello.aot
Hello, World!!
nsh> iwasm /data/coremark.wasm
2K performance run parameters for coremark.
CoreMark Size    : 666
Total ticks      : 12000
Total time (secs): 12.000000
Iterations/Sec   : 5.000000
Iterations       : 60
Compiler version : Clang 15.0.7
Compiler flags   : Using NuttX compilation options
Memory location  : Defined by the NuttX configuration
seedcrc          : 0xe9f5
[0]crclist       : 0xe714
[0]crcmatrix     : 0x1fd7
[0]crcstate      : 0x8e3a
[0]crcfinal      : 0xa14c
Correct operation validated. See README.md for run and reporting rules.
CoreMark 1.0 : 5.000000 / Clang 15.0.7 Using NuttX compilation options / Defined by the NuttX configuration

Signed-off-by: chao an <anchao@xiaomi.com>
2023-03-02 09:56:35 +01:00
Xiang Xiao
92b2f1bd3d fs: Undefine CONFIG_FS_LARGEFILE if compiler doesn't support long long
to simplify the large file check in many place

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-03-02 09:37:58 +01:00
qinwei1
d2d954f691 arm64: ARMv8-r(Cortex-R82) support( add FVP platform )
Summary:
   Adding virtual evaluate platform FVP. This FVP board configuration
will be used to emulate generic ARM64v8-R (Cotex-R82)series hardware
platform and provide support for these devices:

 - GICv3 interrupt controllers for ARMv8-r
 - PL011 UART controller(FVP)

Note:
1. ostest is PASSED at fvp ( single core and SMP)
2. the FVP tools can be download from ARM site, please check FVP
  board readme.txt

TODO: merge PL011 UART driver to common place

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-03-02 13:33:15 +08:00
Huang Qi
c4156ba4e5 lib.h: Remove forward declaration for streamlist
Since <nuttx/fs/fs.h> included already.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2023-03-02 13:32:44 +08:00
Eero Nurkkala
4bb432b0f4 Documentation: risc-v/mpfs: correct information
These changes were requested by the vendor, hence fix them
accordingly.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2023-03-02 13:32:32 +08:00
Huang Qi
5ced61ce08 drivers/serial: Include spawn.h required by CONFIG_TTY_LAUNCH
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2023-03-02 11:43:28 +08:00
Michal Lenc
93097be705 samv7: add support for PWM fault protection
This commit adds configurable fault protection to SAMv7 PWM driver.
The fault input can be used from peripherals as ADC or GPIO inputs.
Inputs from GPIO have configurable polarity (high or low). The PWM output
is automatically set to zero if fault input is active and restored
if fault input is not actived.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-03-02 11:08:25 +08:00
zhanghongyu
16ea80e53b rndis: support iob offload
Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2023-03-02 02:50:59 +08:00
wangbowen6
51c30289ae sched: add critical section in nxsched_get_stateinfo
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2023-03-02 01:12:53 +08:00
yinshengkai
67461175fe note: support note filtering at runtime
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2023-03-01 22:09:41 +08:00
Huang Qi
b99a96a7d0 stream: Exchange name of lib_rawsostream.c and lib_rawoutstream.c
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2023-03-01 10:07:36 -03:00
huxiandong
266455f01c mtd: Extend isbad and markbad func for mtd_dev_s
Signed-off-by: huxiandong <huxiandong@xiaomi.com>
2023-03-01 10:06:56 -03:00
SPRESENSE
8c7fc2c175 boards: spresense: Add LCD support on LTE board
Add a configuration to use SPI3 on LTE extension board for LCD.
2023-03-01 09:21:19 +01:00
SPRESENSE
1ce5dd948e boards: spresense: Add eMMC initialization into bringup function
Add eMMC initialization into bringup function.
2023-03-01 09:21:19 +01:00
SPRESENSE
9717f48a18 boards: spresense: Support eMMC late initialization
Support eMMC late initialization to initialize eMMC from user application.
2023-03-01 09:21:19 +01:00
SPRESENSE
171f8a731c boards: spresense: Remove duplicate definitions
Remove duplicate definitions are defined in board.h.
2023-03-01 09:21:19 +01:00
SPRESENSE
56d43a4a1d boards: spresense: Add eMMC power-on wait time
Add 10msec wait time before eMMC device is powered on.
2023-03-01 09:21:19 +01:00
SPRESENSE
96da997b23 boards: spresense: Add board function for eMMC finalization
- Un-mount the FAT filesystem for eMMC
- Un-initialize eMMC driver
- Turn off the eMMC device
2023-03-01 09:21:19 +01:00
SPRESENSE
5b3496fb7b boards: spresense: Add configuration for eMMC power control
Update Kconfig to add eMMC power pin selection.
2023-03-01 09:21:19 +01:00
SPRESENSE
b60fbefabe boards: spresense: Support using GPIO for power control
Introduce CHIP_TYPE_GPIO to allow GPIO to be used for power control.
2023-03-01 09:21:19 +01:00
SPRESENSE
4a405ca107 boards: spresense: Remove wrong build condition
Remove wrong build condition and always build cxd56_gpioif.c.
2023-03-01 09:21:19 +01:00
Brennan Ashton
05801f9fec CI: Free space on worker building container 2023-03-01 15:55:11 +08:00
SPRESENSE
a3cce487ca tools/Unix.mk: Add VERSION_ARG to argument of version.sh
Allow version arguments to be changed externally.
2023-03-01 13:32:01 +08:00
qinwei2004
fa359e355c Update arm64_head.S 2023-03-01 13:23:48 +08:00
qinwei1
518eb4076e arm64: ARMv8-r(Cortex-R82) support(mpid fix)
Summary
  Different ARM64 Core will use different Affn define, the mpidr_el1
value is not CPU number, So we need to change CPU number to mpid
and vice versa, the patch change the mpid define into platform

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-03-01 13:23:48 +08:00
qinwei1
d5c6b8a94b arm64: add 64-bit time for all arm64 platform
Summary
  For ARM64 architecture, the arch timer is 64-bit,
the CONFIG_SYSTEM_TIME64 need to be enabled just like
x86_64 and risc-v 64

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-03-01 13:23:48 +08:00
qinwei1
4cb5ff3353 arm64: ARMv8-r(Cortex-R82) support(add ARCH_SET_VMPIDR_EL2 option)
Summary

   VMPIDR_EL2 holds the value of the Virtualization Multiprocessor ID.
From architecture manual of AArch64, the behave is:
  -reading register MPIDR_EL1 in EL2, it's return real MPIDR_EL1
  -reading register MPIDR_EL1 in EL1, it's return VMPIDR_EL2
  So since NuttX for SMP is running at EL1 to read MPIDR_EL1 for
  identify CPU id, it's need to set VMPIDR_EL2 to MPIDR_EL1 for
  every CPU at boot EL2 stage.
  For some platform, the bootloader or hypervisor will do that at
  the EL2 stage, but not all.

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-03-01 13:23:48 +08:00
qinwei1
0841f4dbaa arm64: ARMv8-r(Cortex-R82) support
Summary:

  Adding armv8-r(Cortex-R82) support and modify some common code to
fit the change, the change including:

1. ARM Single Security State Support, ARMv8-R support only single
   security state, and some GIC configure need to change and fit
2. For ARMv8-R, only have EL0 ~ EL2, the code at EL3 is not necessary
   and system register for EL3 is not accessible(gcc will failed when
   access these registers)
3. add base MPU configure for the platform.

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-03-01 13:23:48 +08:00
qinwei1
4240723b78 arm64: add ARCH_EARLY_PRINT support
Summary:
  The aarch64 have EL0~El3 execute level and NS/S (security state),
the NuttX should be execute at EL1 in NS(ARmv8-A) or S(ARmv8-R)
state. but booting NuttX have different ELs and state while with
different platform, if NuttX runing at wrong ELs or state it will
be not normal anymore. So we need to print something in arm64_head.S
to debug this situation.
Enabling this option will need to implement up_earlyserialinit and
up_lowputc functions just you see in qemu, if you not sure,
keeping the option disable.

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-03-01 13:23:48 +08:00
qinwei1
e5564a9872 arm64: PSCI config support
Summory
   This Power State Coordination Interface (PSCI) defines a standard
interface for power management. the PCSI need to implement handling
firmware at EL2 or EL3 for ARM64. the PSCI maybe not applicable
for arm core without PCSI firmware interface implement.
  Add configure option for it.

Note:
1. ostest is PASSED at qemu and fvp ( single core and SMP)

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-03-01 13:23:48 +08:00
SPRESENSE
b576a26d51 arch: cxd56xx: Fix emmc pin control on initialization error
Fix emmc pin control on initialization error.
2023-03-01 12:29:23 +08:00
SPRESENSE
57ca5c0401 arch: cxd56xx: Disable SubCore to use DMA
Disable SubCore to use SPI transfer with DMA because it may be used
by MainCore.
2023-03-01 12:29:23 +08:00
SPRESENSE
134424da18 arch: cxd56xx: Fix a warning in cxd56_serial.c
Fix a warning by -Wunused-function when CONFIG_UART2_SERIAL_CONSOLE=y.
2023-03-01 12:29:23 +08:00