Gregory Nutt
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36ead78f07
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ARMv6-M/ARMv7-M: Correct a register handling error in signal delivery (Kernel build mode only). Noted by Mike Smith.
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2014-02-23 08:25:49 -06:00 |
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Gregory Nutt
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a8004f9e07
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Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. We have to revert to using the nasty PRIMASK register
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2013-04-16 18:00:59 -06:00 |
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patacongo
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3e7db57403
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Rework of kernel build signal dispatch to user-space handlers
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5778 42af7a65-404d-4744-a932-0658087f49c3
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2013-03-23 14:46:02 +00:00 |
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patacongo
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4d3d2f2112
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A few fixes related to dispatched signals in kernel mode (there are still issues)
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5777 42af7a65-404d-4744-a932-0658087f49c3
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2013-03-22 21:59:05 +00:00 |
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patacongo
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87bb6ceb5b
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Fix syscall parameter passing for the case where the number of parameters is >4
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5767 42af7a65-404d-4744-a932-0658087f49c3
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2013-03-21 00:25:17 +00:00 |
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patacongo
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990c1febf8
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Add support for nested system calls
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5752 42af7a65-404d-4744-a932-0658087f49c3
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2013-03-17 16:13:28 +00:00 |
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patacongo
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c702374d7b
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Add support for calling to and returning from signal handlers in in user-mode threads
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5750 42af7a65-404d-4744-a932-0658087f49c3
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2013-03-17 00:40:49 +00:00 |
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patacongo
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d256021c41
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More MPU-related fixes
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5746 42af7a65-404d-4744-a932-0658087f49c3
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2013-03-16 00:34:43 +00:00 |
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patacongo
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8159804f9c
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Fix some ARMv7-M syscall logic
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5736 42af7a65-404d-4744-a932-0658087f49c3
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2013-03-12 21:53:18 +00:00 |
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patacongo
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bd1488bdab
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Fix some bad syscall dispatching log. This change is not testable until these is a tested NuttX kernel build.
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5713 42af7a65-404d-4744-a932-0658087f49c3
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2013-03-06 19:56:32 +00:00 |
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patacongo
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30d1159097
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More logic to use BASEPRI to control interrupts -- still doesn't work
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5547 42af7a65-404d-4744-a932-0658087f49c3
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2013-01-22 14:37:17 +00:00 |
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patacongo
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5ab31d456e
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Add option to use BASEPRI instead of PRIMASK to disable interrupts in all ARMv7-M architectures
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5546 42af7a65-404d-4744-a932-0658087f49c3
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2013-01-22 01:25:40 +00:00 |
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patacongo
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5acf2fe3e1
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Resync new repository with old repo r5166
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5154 42af7a65-404d-4744-a932-0658087f49c3
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2012-09-17 18:35:37 +00:00 |
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patacongo
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36df84c843
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Email address change in nuttx/
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5145 42af7a65-404d-4744-a932-0658087f49c3
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2012-09-13 18:32:24 +00:00 |
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patacongo
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c7aa0b0a23
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Incoporate (more) new ARMv7-M exception handling logic contributed by Mike Smith
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4414 42af7a65-404d-4744-a932-0658087f49c3
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2012-02-22 18:44:34 +00:00 |
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patacongo
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6e2a5140fb
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Incoporate new ARMv7-M exception handling logic contributed by Mike Smith
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4413 42af7a65-404d-4744-a932-0658087f49c3
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2012-02-22 18:14:18 +00:00 |
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patacongo
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599b52fb69
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Add support for the Cortex-M4 floating pointing
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4144 42af7a65-404d-4744-a932-0658087f49c3
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2011-12-07 18:58:21 +00:00 |
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patacongo
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2dbde8d001
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Add storage space for FPU registers in context switching
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4143 42af7a65-404d-4744-a932-0658087f49c3
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2011-12-07 15:36:46 +00:00 |
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patacongo
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f93b962f28
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Name change: Change Cortex-M3 naming to ARMv7-M naming so support Cortex-M4
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3846 42af7a65-404d-4744-a932-0658087f49c3
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2011-08-05 21:57:49 +00:00 |
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