Commit Graph

378 Commits

Author SHA1 Message Date
Gregory Nutt
7e7bdd181f Cosmetic fixes to comments, README, and other trivial corrections. 2017-12-25 10:45:47 -06:00
Bob Feretich
83b382e906 arch/arm/src/stm32f7: Completes support for the STM32F72x/73x family. 2017-12-16 08:01:57 -06:00
Gregory Nutt
c52fab653d Replicate Jussi Kivilinna's change for the newly added STM32F2xx and F3xx family members. This change allows selecting voltage output scale mode and enable over-drive only when needed. 2017-11-21 06:44:19 -06:00
Jussi Kivilinna
88cf9cf133 Two changes for STM32F7.
1) The first enables building with CONFIG_ARCH_IDLE_CUSTOM enabled.
2) The second allows changing voltage output scaling setting and prevents enabling over-drive mode for low frequencies (STM32 F74xx, 75xx, 76xx, 77xx)
2017-11-21 06:42:04 -06:00
Miha Vrhovnik
8bb54368c8 Various fixes for errors ound while debugging OTG on L496
STM32, STM32 L4, and STM32 M4: USB OTGFS DMA trace output fix
STM32: Add dump buffer feature to stm32 F4 series
STM32 and STM32 L4: Fix bad USB OTGFS register address
STM32 L4:  Fix typo in USB OTGFS register usage
STM32 L4:  Add check in USB OTGFS driver to assure that SYSCFG is enabled
Nucleo-L496ZG:  Make HSE on Nucleo-L496ZG default to enable USB
2017-11-21 06:32:53 -06:00
Bob Feretich
fab5faf097 STM32F7: Completes architecture support for the STM32 F72x and F73x families. Adds support for the Nucleo-144 boards with STM32F722. 2017-11-18 07:55:50 -06:00
Bob Feretich
d7bb824c69 stm32f7: Fix typos in two RCC register definition header files 2017-11-17 07:26:05 -06:00
Bob Feretich
13b52da3fa stm32 f72xx and f73xx: Add register definition header files and clocking logic 2017-11-17 07:18:02 -06:00
Gregory Nutt
102f1ea33f Minor cleanup of some spacing. 2017-11-13 14:06:03 -06:00
Jussi Kivilinna
585b04014f Merged in jussi_kivilinna/nuttx/stm32l4_serial_pm (pull request #534)
STM32L4 serial PM interface improvements

* stm32l4_serial: pm: check rx/tx buffers for pending data in pmprepare

* stm32l4: remove adhoc PM interfaces and move serial suspend functionality behind CONFIG_PM

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2017-11-10 13:05:00 +00:00
Gregory Nutt
2a331b7f23 Fix some includes missed in the last commit. 2017-11-06 15:01:21 -06:00
Gregory Nutt
08fa834a6a arch/arm/include/stm32 and stm32f7: Remove ltdc.h and dma2d.h. Those header files in that location permitted inclusion into application space logic and, hence, facilitated and encouraged calling into the OS and violating the portable POSIX OS interface. The definitions in those header files were move the appropriate location in the counterpart, architecture specific files at arch/arm/src/stm32 and stm32f7 dma2d.h and ltdc.h.
configs/stm32f429i-disco/ltdc:  This configuration has been deleted because it violated the portable POSIX OS interface.  It used apps/examples/ltdc and include ltdc.h and dma2d.h which were also removed for the same reason.
2017-11-06 12:22:48 -06:00
Jussi Kivilinna
bcf4a5d056 Merged in jussi_kivilinna/nuttx/stm32l4_i2c_rewrite (pull request #519)
Port STM32F7 I2C driver to STM32L4

* arch/stm32l4: port STM32F7 I2C driver to STM32L4

    STM32L4 I2C driver is in work-in-progress state (plentiful of
    TODOs and #warnings) and lags many features found in more
    up-to-date STM32 I2C drivers. The peripheral on STM32F7 and
    STM32L4 are identical except for L4's 'wakeup from stop mode'
    flag and STM32F7's I2C driver is in more 'ready to use' state.

    Patch ports the STM32F7 I2C driver to STM32L4. The I2C clock
    configuration is kept the same as before (I2CCLK = PCLK1 80 Mhz)
    instead of switching to STM32F7 arch default that is I2CCLK=HSI.
    Further work would be to add configuration option for choosing
    I2C clock source instead of current hard-coded default.

* arch/arm/stm32f7: i2c: restore bus frequency after I2C reset

    Copy frequency restoration fix from STM32L4 I2C driver to STM32F7 I2C driver.

* arch/arm/stm32f7: i2c: remove unused Kconfig option

* configs/nucleo-l496zg/nsh: enable I2C4 bus with i2ctool

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2017-10-26 13:59:20 +00:00
Jussi Kivilinna
b87739d174 arch/arm/src/stm32f7/i2c: fix I2C_M_NORESTART handling 2017-10-20 08:41:42 -06:00
Juha Niskanen
d101fad026 Merged in juniskane/nuttx_stm32l4/stm32_rtc_small_patches_pr (pull request #511)
Stm32 rtc small patches

* RTC: canceling an alarm marks it as inactive

* STM32L4, STM32F4, STM32F7 RTC: fix reading alarm value that is more than 24h in future

* STM32F0 RTC: fix backup register count in stm32_rtcc.h

    All other STM32: SHIFTR_SUBFS_MASK was correct in STM32F0 only

* STM32L1: use correct EXTI line definitions

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2017-10-17 16:45:48 +00:00
Jussi Kivilinna
51ed697de1 stm32f7 BBSRAM: stm32_bbsram: avoid assert in stm32_bbsram_savepanic. If panic happens before stm32_bbsram is initialized, stm32_bbsram_savepanic caused additional assert panic. Function has null pointer check, so drop DEBUGASSERT. 2017-10-13 07:37:51 -06:00
Juha Niskanen
7c815e555c Merged in juniskane/nuttx_stm32l4/stm32l4_rtc_fixes_pr (pull request #509)
STM32L4 small fixes to RTC

* STM32L4 RTC: init mode was never exited because nested locking in rtc_synchwait() disabled backup domain access

* STM32L4 RTC: use backup register magic value instead of INITS bit

    The INITS (bit 4) of RTC_ISR register cannot be used to reliably
    detect backup domain reset. This is because we can operate our
    device without ever initializing the year field in the RTC calendar
    if our application does not care about correct date being set.

    Hardware also clears the bit when RTC date is set back to year 2000:

    nsh> date -s "Jan 01 00:00:00 2001"
    rtc_dumptime: Setting time:
    rtc_dumptime:   tm: 2001-01-01 00:00:00
    rtc_dumpregs: New time setting:
    rtc_dumpregs:       TR: 00000000
    rtc_dumpregs:       DR: 00012101
    rtc_dumpregs:       CR: 00000000
    rtc_dumpregs:      ISR: 00000037
    ...
    nsh> date -s "Jan 01 00:00:00 2000"
    rtc_dumptime: Setting time:
    rtc_dumptime:   tm: 2000-01-01 00:00:00
    rtc_dumpregs: New time setting:
    rtc_dumpregs:       TR: 00000000
    rtc_dumpregs:       DR: 0000c101
    rtc_dumpregs:       CR: 00000000
    rtc_dumpregs:      ISR: 00000027      <--- Bit 4 went missing!
    ...

    This patch allows us to do:

      stm32l4_pmstop(true);

      /* Stop mode disables HSE/HSI/PLL and wake happens with default system
       * clock. So reconfigure clocks early on Stop mode return.
       */

      stm32l4_clockconfig();

    without stm32l4_clockconfig() doing spurious and harmful backup domain
    reset in rcc_resetbkp().

* STM32L4 RTC: put back the SSR race condition workaround

    ST has confirmed that the issue has not been fixed, and that it applies
    to STM32L4 too (was not in errata sheets due to documentation bug)
    See discussion:

    https://community.st.com/thread/43710-issue-with-rtc-maximum-time-resolution

* STM32F4, STM32L4, STM32F7 RTC: add more CONFIG_RTC_NALARMS > 1 to reduce code size

* STM32L4: rename stm32l4_rtcc.c to stm32l4_rtc.c to better match STM32F7

    Cosmetic changes to comments

* STM32, STM32L4, STM32F7 RTC: stray comment and typos in chip/stm32_rtcc.h

* STM32L4 RTC: change maximum alarm time from 24h to one month

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2017-10-13 12:32:33 +00:00
Gregory Nutt
936df1bcb5 Adds new OS internal functions nxsig_sleep() and nxsig_usleep. These differ from the standard sleep() and usleep() in that (1) they don't cause cancellation points, and (2) don't set the errno variable (if applicable). All calls to sleep() and usleep() changed to calls to nxsig_sleep() and nxsig_usleep().
Squashed commit of the following:

    Change all calls to usleep() in the OS proper to calls to nxsig_usleep()

    sched/signal:  Add a new OS internal function nxsig_usleep() that is functionally equivalent to usleep() but does not cause a cancellaption point and does not modify the errno variable.

    sched/signal:  Add a new OS internal function nxsig_sleep() that is functionally equivalent to sleep() but does not cause a cancellaption point.
2017-10-06 10:15:01 -06:00
Gregory Nutt
29b5b3667f sched/semaphore: sem_timedwait() is a cancellation point and, hence, cannot be called from within the OS. Created nxsem_timedwait() that is equivalent but does not modify the errno and does not cause cancellation. All calls to sem_timedwait() change to calls to nxsem_timedwait() in the OS. 2017-10-05 07:24:54 -06:00
Gregory Nutt
9568600ab1 Squashed commit of the following:
This commit backs out most of commit b4747286b1.  That change was added because sem_wait() would sometimes cause cancellation points inappropriated.  But with these recent changes, nxsem_wait() is used instead and it is not a cancellation point.

    In the OS, all calls to sem_wait() changed to nxsem_wait().  nxsem_wait() does not return errors via errno so each place where nxsem_wait() is now called must not examine the errno variable.

    In all OS functions (not libraries), change sem_wait() to nxsem_wait().  This will prevent the OS from creating bogus cancellation points and from modifying the per-task errno variable.

    sched/semaphore:  Add the function nxsem_wait().  This is a new internal OS interface.  It is functionally equivalent to sem_wait() except that (1) it is not a cancellation point, and (2) it does not set the per-thread errno value on return.
2017-10-04 15:22:27 -06:00
Gregory Nutt
42a0796615 Squashed commit of the following:
sched/semaphore:  Add nxsem_post() which is identical to sem_post() except that it never modifies the errno variable.  Changed all references to sem_post in the OS to nxsem_post().

    sched/semaphore:  Add nxsem_destroy() which is identical to sem_destroy() except that it never modifies the errno variable.  Changed all references to sem_destroy() in the OS to nxsem_destroy().

    libc/semaphore and sched/semaphore:  Add nxsem_getprotocol() and nxsem_setprotocola which are identical to sem_getprotocol() and set_setprotocol() except that they never modifies the errno variable.  Changed all references to sem_setprotocol in the OS to nxsem_setprotocol().  sem_getprotocol() was not used in the OS
2017-10-03 15:35:24 -06:00
Gregory Nutt
83cdb0c552 Squashed commit of the following:
libc/semaphore:  Add nxsem_getvalue() which is identical to sem_getvalue() except that it never modifies the errno variable.  Changed all references to sem_getvalue in the OS to nxsem_getvalue().

    sched/semaphore:  Rename all internal private functions from sem_xyz to nxsem_xyz.  The sem_ prefix is (will be) reserved only for the application semaphore interfaces.

    libc/semaphore:  Add nxsem_init() which is identical to sem_init() except that it never modifies the errno variable.  Changed all references to sem_init in the OS to nxsem_init().

    sched/semaphore:  Rename sem_tickwait() to nxsem_tickwait() so that it is clear this is an internal OS function.

    sched/semaphoate:  Rename sem_reset() to nxsem_reset() so that it is clear this is an internal OS function.
2017-10-03 12:52:31 -06:00
Gregory Nutt
c11345ad4b Squashed commit of the following:
STM32, STM32 F7:  LTDC and DMA2D drivers are not permitted to set the errno.

    SIM LPC31xx:  Serial and console drivers are not permitted to set the errno.

    SAMv7, STM32, STM32 L4:  DAC and ADC drivers are not permitted to set the errno.
2017-09-30 11:51:37 -06:00
Gregory Nutt
13006ecca9 STM32/STM32 F7: Fix some errors found by Coverity. 2017-09-13 13:05:13 -06:00
David Sidrane
48f0209b84 stm32f7:I2C fixed typo in comment 2017-09-12 14:16:45 -10:00
Jussi Kivilinna
449a891a8e stm32f7: add new configuration option for enabling flash ART Accelerator and flash prefetcher 2017-09-04 07:56:51 -06:00
Gregory Nutt
5f67fc8f1b RTC alarms: getalarmdatetime functions are private and should be declared static. 2017-09-03 12:20:13 -06:00
Gregory Nutt
789e204141 Correct naming of fields in struct alm_rdalarm_s. Should not be the same as the corresponding fields of struct alm_setalarm_s. The whole purpose of that naming convention is to keep the field names unique. 2017-09-03 09:51:47 -06:00
Gregory Nutt
92b3c9477a Port Boris Astardzhiev RTC change for STM32L4 to STM32F7 2017-09-03 08:39:02 -06:00
Jussi Kivilinna
fe7d8c941c stm32f7: do not enable read-modify-write on DTCM. "AN 4667 - STM32F7 Series system architecture and performance" recommends to disable read-modify-write on DTCM: "If the DTCM-RAM is used as data location and the variables used are byte or/and halfword types, since there is no ECC management in this RAM on the STM32F7 Series, it is recommended to disable the read-modify-write of the DTCM-RAM in the DTCM interface (inthe DTCMCR register) to increase the performance." 2017-09-01 08:01:54 -06:00
Juha Niskanen
809569cda9 STM32L4 ADC: implement peripheral 2017-08-28 07:05:33 -06:00
Juha Niskanen
a2dc88e075 STM32, STM32L4, STM32F7 ADC: fix channel 18 sample time 2017-08-28 07:05:33 -06:00
David Sidrane
ef42c25140 stm32f7:SDMMC add dcache alignment check in dma{recv|send}setup
In the where CONFIG_SDIO_PREFLIGHT is not used and
   dcache write-buffed mode is used (not write-through)
   buffer alignment is required for DMA transfers because
   a) arch_invalidate_dcache could lose buffered writes data
   and b) arch_flush_dcache could corrupt adjacent memory if
   the buffer and the bufflen, are not on ARMV7M_DCACHE_LINESIZE
   boundaries.
2017-08-17 09:51:37 -10:00
David Sidrane
1e7ddfea8e stm32f7:SDMMC remove widebus limitation on DMA
There is no documantation for the STM32F7 that limits DMA on
   1 bit vrs 4 bit mode.
2017-08-17 09:48:46 -10:00
David Sidrane
dffab2f4dd stm32f7:DMA add dcache alignment check in stm32_dmacapable
In the case dcache write-buffed mode is used (not write-through)
   buffer alignment is required for DMA transfers because
   a) arch_invalidate_dcache could lose buffered writes data
   and b) arch_flush_dcache could corrupt adjacent memory if
   the maddr and the mend+1, the next next address are not on
   ARMV7M_DCACHE_LINESIZE boundaries.
2017-08-17 09:39:14 -10:00
David Sidrane
38cbf1f660 stm32f7:DMA correct comments and document stm32_dmacapable
Updated comment to proper refernce manual for STM32F7 not
   STM32F4.

   Added stm32_dmacapable input paramaters documentation.
2017-08-17 09:35:50 -10:00
David Sidrane
ab578bb338 stm32f7:rtc Missing semicolon 2017-08-15 16:17:55 -10:00
Gregory Nutt
e224d354b8 STM32F7: Remove unsupported configuration item the crept in when header file was cloned. 2017-08-13 12:37:59 -06:00
Gregory Nutt
f6f4856cc6 Eliminate some warnings found in build testing. 2017-08-13 12:24:48 -06:00
Gregory Nutt
873de7b480 configs/*/README.txt: Update to the new URL for obtaining the ARM toolchain. 2017-08-13 07:18:19 -06:00
Gregory Nutt
2ab8852b29 STM32F7: Some STM32F7 builds failed in build testing due to undefined STM32_SRAM1_BASE. I think that is because stm32_allocateheap.c was not including chip/stm32_memorymap.h 2017-08-13 06:50:48 -06:00
Gregory Nutt
03c26df04a STM32F7 builds broken. This is a work around to at least keep them building. 2017-08-13 06:44:04 -06:00
Titus von Boxberg
55e9c8990c stm32_rcc: code style 2017-08-01 16:25:19 +02:00
Titus von Boxberg
a4e97d5daf Added functions for DSI clock source selection 2017-08-01 16:24:48 +02:00
Gregory Nutt
05ea22e9ab STM32F7: Fix for coding standard violations that came in with cd3ca1140e -- missed a file last time 2017-07-31 18:36:38 -06:00
Gregory Nutt
5f4fdb42be STM32F7: Fix for coding standard violations that came in with cd3ca1140e 2017-07-31 18:35:37 -06:00
Titus von Boxberg
604a6dc0fa improved help text 2017-08-01 01:23:28 +02:00
Titus von Boxberg
bdee01f492 added function for reset 2017-08-01 01:23:28 +02:00
Titus von Boxberg
0947b31fbb STM32_RCC_DCKCFGR2 has nothing to do with PLLI2S; PLLI2S is not dependent on LTDC, instead on SAICLK1/2 generated from PLLI2S 2017-08-01 01:23:28 +02:00
Titus von Boxberg
9d56dbb403 comment corrected 2017-08-01 01:23:28 +02:00