ARP support is only built if the Ethernet link layer is supported.
Continue and send the ARP request only if this device uses the
Ethernet link layer protocol.
Signed-off-by: chao an <anchao@xiaomi.com>
GG25Q devices have the 4 byte read mode in bit 0 not bit 3 of the status register. This changes allows for both depending on the JEDEC DEVICE ID that is read back.
The `datalen` indicates the whole len of original packet, which will become the payload inside icmpv6 packet.
Using `datalen = (ipv4->len[0] << 8) + ipv4->len[1]` in icmp_reply is correct, because it includes IPv4 header, but when coming to IPv6, the `len` does not include the header, so we need to add it back.
Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
such as code: double value = +0x1.000000000000080000000000p-600;
printf("Hello, World!! %.7g:f64\n", value);
expected output : Hello, World!! 2.40992e-181:f64
but real output : Hello, World!! 2.40992e-B1:f64
the reason: we want printf "18", but the flag of character is 'B'
and 'B' is '0'+18,so printf 'B';
Issue:
recv return 0 means peer side has already closed the connection according to
man page's description.
0 is returned without set errno when TCP rx timeout happens with current
design.
Solution:
return result instead of ir_result when ir_result is 0, then -1 will be
returned with errno set to EAGAIN for tcp rx buffer empty case.
Signed-off-by: liangchaozhong <liangchaozhong@xiaomi.com>
/arch/arm/src/libarch.a(stm32_flash.o): in function `up_progmem_write':
/arch/arm/src/chip/stm32_flash.c:419: undefined reference to `stm32_waste'
Seems like the symbol definition + declaration were completely missing
Add the necessary configs to the default nsh config file in order to enable
support for MMCSD-SPI.
Signed-off-by: Robert-Ionut Alexa <robertalexa2000@gmail.com>
Add support to esp32-sparrow-kit for the LTR308 sensor. This patch also
enables the sensor in the default nsh config file.
Signed-off-by: Robert-Ionut Alexa <robertalexa2000@gmail.com>
ESP32-SPARROW-KIT is built upon ESP32-WROVER-KIT by adding various
peripherals. This is an initial commits that only backports the code
as it is, without further changes.
Signed-off-by: Robert-Ionut Alexa <robertalexa2000@gmail.com>
Use correct path to include mutex.h
Fixes:
chip/stm32_bbsram.c:42:10: fatal error: mutex.h: No such file or directory
42 | #include <mutex.h>
| ^~~~~~~~~
In order to turn longjmp context-switch safe, it's necessary
to disable interrupts before modifying windowbase and windowstart.
Otherwise, after a context switch, windowstart and windowbase
would be different, leading to a wrongly set windowstart bit due to
longjmp writing it based on the windowbase before the context switch.
This corrupts the registers at the next window overflow reaching
that wrongly set bit.
*Background:*
This PR is related to an issue first observed on ESP-IDF
https://github.com/espressif/esp-idf/issues/5229 and it was, then,
checked on NuttX using a test application.
*The test application:*
To check if the problem affects ESP32, ESP32-S2 and ESP32-S3 on
NuttX, it was created an application based on:
https://en.cppreference.com/w/c/program/longjmp
The application creates 16 tasks (`#define NUMBER_OF_TASKS 16`)
that implements the following daemon:
```
static int setjmp_longjmp_daemon(int argc, char *argv[])
{
for (int i = 0; i < NUMBER_OF_TASKS * 2; i++)
{
jmp_buf env;
volatile int count = 0;
if (setjmp(env) != UINT16_MAX)
{
foo(&env, ++count);
}
}
sem_post(&g_sem);
return EXIT_SUCCESS;
}
```
The main function also initializes a semaphore to avoid application
exiting before tasks return successfully:
```
sem_init(&g_sem, 0, -NUMBER_OF_TASKS);
```
Finally, the round-robin interval was lowered to 1ms to raise the
chances of the longjmp being interrupted by a context switch
(`CONFIG_RR_INTERVAL=1).
This setup was able to reproduce the problem prior to this patch
being applied.
