sergiotarxz/nuttx
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13710 Commits

Author SHA1 Message Date
raiden00pl
835b129c94 stm32g4xx: add DBGMCU definitions 2021-04-13 14:38:28 -05:00
Anthony Merlino
9c8c2b0db2 Separate CLOCK_TIMEKEEPING and SCHED_TICKLESS. 2021-04-13 11:42:31 -05:00
raiden00pl
c90a6bdf2b stm32/Kconfig: enable ADCx DMA support if DMAMUX enabled 2021-04-13 12:08:17 -03:00
raiden00pl
bf04ef9a3c stm32g4: add support for DMA (DMAMUX) 2021-04-13 12:08:17 -03:00
raiden00pl
fbb7e95ebf stm32g4xxxx_dmamux.h: rename defs to match other chips and add DMAMAP defs 2021-04-13 09:20:18 -05:00
raiden00pl
a735252d78 stm32h7,stm32g0: fix typos in DMAMUX 2021-04-13 09:20:18 -05:00
raiden00pl
62001bff3b stm32g4xx: add support for PWM 2021-04-13 09:19:52 -05:00
raiden00pl
4c741bc9a5 stm32/Kconfig: G4 chips use TIMERS_V2 2021-04-13 09:19:52 -05:00
raiden00pl
ff2ae3e894 stm32g4xx: add support for ADC 2021-04-13 09:29:09 -03:00
Alin Jerpelea
20d315abfe NuttX: Falker Atomacao Agrícola Ltda: update licenses to Apache 
Falker Atomacao Agrícola Ltda has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-13 05:28:28 -05:00
Anthony Merlino
1a5a7a1b63 stm32h7: Allow OTGHS to use internal FS PHY 2021-04-12 23:21:34 -05:00
Jukka Laitinen
3f6bb76e01 arch/arm/src/stm32f7/stm32_allocateheap.c: Fix MPU alignments 
Change the logic for allocating user heap for PROTECTED_BUILD:
- Don't rely on SRAM1_END alignment
- Make better use of MPU subregions when allocating the heap
- Don't duplicate the calculation of user heap start in kernel heap
  allocation; use the previous calculation directly

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
 2021-04-12 23:20:18 -05:00
Jukka Laitinen
ea36c2c7ea Remove MPU_RASR_S bit from stm32f7 MPU user mode intsram configration 
For some reason, setting the "shareable" bit makes the SRAM not writable

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
 2021-04-12 23:20:18 -05:00
Xiang Xiao
3f9908f7d1 Remove the unnecessary math.h inclusion 
or move from header file to source file since math.h doesn't always exist

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-12 22:58:23 -04:00
Anthony Merlino
2b46a0fdde stm32h7: Adds guards around stm32_iocompensation. 2021-04-12 15:08:52 -07:00
Anthony Merlino
a45b8cc17c stm32h7: Add support for IO compensation. 2021-04-12 15:08:52 -07:00
jturnsek
bbe875876d Modified FlexSPI driver 2021-04-12 17:22:14 -03:00
jturnsek
7453e76d98 FlexSPI NOR driver 2021-04-12 11:35:44 -03:00
raiden00pl
cf645fc9ba arch/arm/src/stm32/stm32_foc.c: add modifications to support STM32F1 
- generalize DBGMCU for PWM timer
- use ADC common data only if coupled ADC present
- rename some ADC definitions that collide with stm32_adc.h
 2021-04-11 03:52:21 -05:00
raiden00pl
021a89569d arch/arm/src/stm32: introduce DBGMCU IP core versions 2021-04-11 03:52:21 -05:00
raiden00pl
3caf26fe3e arch/arm/src/stm32/stm32_adc.c: support adc_inj_startconv also for STM32F1 2021-04-11 03:52:21 -05:00
Anthony Merlino
2aa2b7669f stm32f7 tickless: Fix handling of overflow for different width timers. 2021-04-10 23:38:16 -05:00
Anthony Merlino
f979dd72c1 stm32/stm32f7 tickless: Fix clearing and checking of interrupts. 2021-04-10 23:38:16 -05:00
Anthony Merlino
dd00c6427e stm32 tickless: Fixes printf warnings 2021-04-10 23:38:16 -05:00
Xiang Xiao
3f67c67aaf arch: Fix the stack boundary calculation and check 
All supported arch uses a push-down stack:
The stack grows toward lower addresses in memory. The stack pointer
register points to the lowest, valid working address (the "top" of
the stack). Items on the stack are referenced as positive(include zero)
word offsets from sp.
Which means that for stack in the [begin, begin + size):
1.The initial SP point to begin + size
2.push equals sub and then store
3.pop equals load and then add

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-10 08:39:54 -07:00
Alin Jerpelea
7424683d29 arch: lpc17xx_40xx: Mixed Case Identifier fix 
Fix for Mixed Case Identifier reported by nxstyle.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-10 06:46:32 -05:00
Alin Jerpelea
6f5537eae2 arch: lpc2378: Fix for Mixed Case Identifier errors 
Fix for Mixed Case Identifier errors reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-10 06:46:32 -05:00
Alin Jerpelea
eac1d28aae NuttX: Janne Rosberg: update licenses to Apache 
Janne Rosberg has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Ivan Ucherdzhiev has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-10 06:42:19 -05:00
Alin Jerpelea
a2813b142f NuttX: Jose Pablo Carballo: update licenses to Apache 
Jose Pablo Carballo has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-10 06:42:19 -05:00
Alin Jerpelea
231b8518b7 NuttX: Ken Pettit: update licenses to Apache 
Ken Pettit has submitted the ICLA and we can migrate the licenses
 to Apache.

Sebastien Lorquet has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-10 06:42:19 -05:00
Anthony Merlino
d37275f348 stm32f7: Freeze tickless timer during debug halt. 2021-04-08 23:38:00 -05:00
Alin Jerpelea
e1d8b62209 arch: lpc43xx: spifilib_fam_standard_cmd.c: fix nxstyle errors 
fix errors reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-08 22:49:09 -05:00
Alin Jerpelea
42d17dcaf4 arch: lpc43xx: Mixed Case Identifier fix 
Fix for Mixed Case Identifier reported by nxstyle tool.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-08 22:48:46 -05:00
Alin Jerpelea
602d384325 arch: tms570: fix Mixed Case Identifier 
Fix Mixed Case Identifier reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-08 22:48:46 -05:00
Alin Jerpelea
37b314f29f LICENSE: add 3rd party license for Texas Instruments Incorporated 
Add 3rd party licenses for Texas Instruments Incorporated to the LICENSE file.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-08 22:48:46 -05:00
Alin Jerpelea
12aebdf1a6 LICENSE: add 3rd party license for Infineon Technologies AG 
Add 3rd party licenses for Infineon Technologies AG to the LICENSE file.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-08 22:48:46 -05:00
Alin Jerpelea
8dcd16d5a6 arch: arm: nxstyle fixes 
Fixes for nxstyle warnigs

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-08 22:48:46 -05:00
Alin Jerpelea
d2e7ea05c6 NuttX: typo fix 
Yype fix for Public Functions reported by nxstyle

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-08 22:48:46 -05:00
Gregory Nutt
a9e2195e65 Remove unused 'running' field from freerun lower half drivers. 
That field is never used and, in most cases, is never initialized correctly.

This should have no impact to anything with the possible exception of free-running drivers.

Verified using CI builds only.
 2021-04-07 20:35:50 -03:00
Alin Jerpelea
abdc60e72f arch: samXX: Gregory Nutt: update licenses to Apache 
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-07 06:43:20 -05:00
Alin Jerpelea
9be2db897d arch: sam: move references from License header 
for compliance references should be moved after the license header

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-07 06:43:20 -05:00
Alin Jerpelea
74cde4f9bf arch: armv7-r: Gregory Nutt: update licenses to Apache 
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-07 06:43:20 -05:00
Alin Jerpelea
68cd957c62 arch: armv7-r: move references from License header 
for compliance references should be moved after the license header

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-07 06:43:20 -05:00
Alin Jerpelea
ce08e0ca6c arch: armv7-a: move references from License header 
for compliance references should be moved after the license header

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-07 06:43:20 -05:00
Xiang Xiao
bfbe705e3f arch/arm: Fix nxstyle warning 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-07 16:18:27 +09:00
Xiang Xiao
eeb8931c04 arch/arm: align arm vector related code with armv7-a 
commit 3c30c8b90b1dc48e4b9e0c18aaeb3989fb168ae9
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date:   Tue Apr 6 15:47:27 2021 +0800

    arch/arm: Remove g_irqtmp, g_undeftmp and g_aborttmp

    to avoid multiple CPU access them concurrently in SMP case

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-07 16:18:27 +09:00
Xiang Xiao
0779f34390 arch/arm: Add PSR_ prefix to the mode state like armv7-a 
no real function change

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-07 16:18:27 +09:00
Anthony Merlino
01fabe6c67 stm32h7: Actually use the AXI SRAM as the main heap as the documentation describes. 
The comments at the top of the file say this:
```
This will be automatically registered
 * - AXI SRAM is a 512kb memory area. This will be automatically registered
 *      with the system heap in up_allocate_heap, all the other memory
 *      regions will be registered in arm_addregion().
```

but the implementation was using SRAM123 instead. Furthermore, arm_addregion then re-adds SRAM123 again.
 2021-04-06 22:47:20 -05:00
Anthony Merlino
d69cd4ba03 stm32h7: Adds stm32_dbgmcu.h to match stm32f7 port. 2021-04-06 22:44:07 -05:00
Anthony Merlino
3a10f88bdf stm32h7: Fixes bug in stm32_sdmmc.c where DCACHE guards were blocking a needed variable. 2021-04-06 22:43:27 -05:00