Commit Graph

20276 Commits

Author SHA1 Message Date
ligd
7e3e99c940 sim: fix vfork report error
user_main: vfork() test
=================================================================
==3754757==ERROR: AddressSanitizer: stack-buffer-underflow on address 0xae9126f0 at pc 0x56845661 bp 0xae912570 sp 0xae912560
READ of size 1 at 0xae9126f0 thread T0
    #0 0x56845660 in memcpy string/lib_memcpy.c:44
    #1 0x56b70f61 in up_vfork sim/sim_vfork.c:133
    #2 0x567c0b85 in vfork (/home/ligd/platform/sim/nuttx/nuttx+0x26bb85)

0xae9126f0 is located 73456 bytes inside of 73728-byte region [0xae900800,0xae912800)
allocated by thread T0 here:
    #0 0xf7ab1c2f in __interceptor_posix_memalign ../../../../../src/libsanitizer/asan/asan_malloc_linux.cpp:226

SUMMARY: AddressSanitizer: stack-buffer-underflow string/lib_memcpy.c:44 in memcpy

Signed-off-by: ligd <liguiding1@xiaomi.com>
2023-02-12 02:37:25 +08:00
Fotis Panagiotopoulos
1b372a55cc stm32_sdio: Fix in SDIO clocking configuration. 2023-02-11 23:29:11 +08:00
Michal Lenc
00e87962fd imxrt: add option to select PWM trigger source value from configuration
Current implementation supports the trigger generation only from timer
capture on period value. This is sufficient for PWM synchronization but
may not be enough for other purposes as ADC triggering for example.

This change adds an option to generate the trigger based on a duty
cycle value.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-02-11 20:07:28 +08:00
chenwen@espressif.com
cfc9029c5d risc-v/esp32c6: Add ESP32-C6 basic support
1. Bring up OS kernel.
  2. Add interrupt support.
  3. Add system timer support.
  4. Add the ESP32-C6 devkit board.
  5. Add basic UART support for console.
  6. Add clock configuration.
  7. Add board reset support.
2023-02-10 17:38:41 -03:00
Masayuki Ishikawa
777c6c4aad arch: imxrt: Fix imxrt for CONFIG_BUILD_PROTECTED=y
Summary:
- Fix imxrt_allocateheap.c for CONFIG_BUILD_PROTECTED=y
- Call mpu_reset() in imxrt_mpuinit.c

Impact:
- CONFIG_BUILD_PROTECTED=y only

Testing:
- Tested with imxrt1060-evk:knsh (will be updated later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2023-02-09 23:30:50 -08:00
ligd
1cc6e4b1fa sim: add uart dma mode & use work instead of loop.
Signed-off-by: ligd <liguiding1@xiaomi.com>
2023-02-10 13:54:42 +08:00
Janne Rosberg
739688f6c6 sama5/twi: add support for flexcom twi 2023-02-10 10:56:56 +08:00
Michal Lenc
725dfd5db9 samv7: fix compilation error when only DAC1 is configured
The function call dac_txdone(&g_dac1dev) was not contained in ifdef
section. This was cousing compilation error if only DAC1 was configured
as the structure g_dac1dev is defined only if DAC0 is used.

This commit fixes the error and ensures the function is called only if
corresponding DAC is configured.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-02-10 02:33:30 +08:00
TimJTi
becaf3bf9d Correct SAMA5_USBA_DRP to be SAMA5_USB_DRP 2023-02-10 01:01:03 +08:00
TimJTi
b3365858ee Fix sam_udphs to allow RNDIS to work
Update sam_udphs.c
2023-02-10 00:55:59 +08:00
Peter Bee
2ebccd82b6 drivers/video: add timestamp support
Add support for timestamp and change in related drivers

Signed-off-by: Peter Bee <bijunda1@xiaomi.com>
2023-02-09 23:27:15 +08:00
chao an
74ce3b81d3 build/Kconfig: add BINDIR/APPSBINDIR to support out of tree build
First decoupling changes related to CMAKE

BINDIR/APPSBINDIR:
Output path of Kconfig which dynamically generated by NuttX Kernel/Apps
This option is consistent with the TOPDIR/APPSDIR by default, and will
be changed when out-of-tree compilation is supported

Signed-off-by: chao an <anchao@xiaomi.com>
2023-02-09 20:13:04 +08:00
chao an
e942a7c55e build/Kconfig: fix warnings detected by kconfiglib
Signed-off-by: chao an <anchao@xiaomi.com>
2023-02-09 20:07:46 +08:00
chao an
3a0fdb019d nuttx: replace all ARRAY_SIZE()/ARRAYSIZE() to nitems()
Signed-off-by: chao an <anchao@xiaomi.com>
2023-02-09 20:05:44 +08:00
ligd
9b35a2e1a1 sim: fix compile warning
sim/sim_doirq.c: In function 'sim_doirq':
Error: sim/sim_doirq.c:79:10: error: function may return address of local variable [-Werror=return-local-addr]
   79 |   return regs;
      |          ^~~~
sim/sim_doirq.c:44:14: note: declared here
   44 |   xcpt_reg_t tmp[XCPTCONTEXT_REGS];
      |              ^~~

Signed-off-by: ligd <liguiding1@xiaomi.com>
2023-02-09 14:22:38 +08:00
ligd
16367aa084 sim: correct save irq flags error when use sim 64bits
Signed-off-by: ligd <liguiding1@xiaomi.com>
2023-02-09 14:22:38 +08:00
ligd
8aecad287c sim: set loop task duration to 10ms
Signed-off-by: ligd <liguiding1@xiaomi.com>
2023-02-09 14:19:09 +08:00
ligd
f102837fe1 sim: realize sim timer tickless
Signed-off-by: ligd <liguiding1@xiaomi.com>
2023-02-09 14:19:09 +08:00
Zhihong Chen
d082af34f7 add hpmicro chip: hpm6750
Signed-off-by: Zhihong Chen <zhihong.chen@hpmicro.com>
2023-02-09 14:17:49 +08:00
TimJTi
4aada75249 Changes to allow board-specific DRP/OTG support
Update sam_udphs.c
2023-02-09 03:42:55 +08:00
Lucas Saavedra Vaz
1fb6dcec3b arch/xtensa/esp32s2: Fix function header 2023-02-09 02:39:54 +08:00
Lucas Saavedra Vaz
b29198a62a arch/xtensa/esp32s3: Add support for touch pad interrupts 2023-02-09 02:39:54 +08:00
Ville Juven
9ac3e841da group_addrenv: Fix call to group_addrenv for targets that don't need it 2023-02-09 00:14:52 +08:00
Nathan Hartman
375cb09ff0 arch/pic32mz: Serial support for termios
Previously, it was impossible to build for PIC32MZ architecture with
CONFIG_SERIAL_TERMIOS because it introduced compiler errors in the
lower half driver.

Fixing the compiler errors and adding an implementation of the
TIOCSERGSTRUCT, TCGETS, and TCSETS ioctl calls.

* arch/mips/src/pic32mz/pic32mz_serial.c
  (): Include nuttx/fs/ioctl.h, needed for the TIOCSERGSTRUCT, TCGETS,
   and TCSETS defines.
  (up_ioctl): Fix compile breakage. Implement TIOCSERGSTRUCT. Make
   TCGETS return data bits, parity, and stop bits. Make TCSETS apply
   changes to data bits, parity, and stop bits.
2023-02-08 23:55:37 +08:00
Nathan Hartman
8b2c8c73e8 arch/tiva: Serial TIOCxBRK BSD-compatible BREAK support
In the lower half UART driver for Tiva architecture (TM4C12x), adding
the TIOCxBRK ioctl calls, which allow an application to transmit a BSD
compatible line BREAK. TIOCSBRK starts the BREAK and TIOCCBRK ends it.

This architecture supports BSD-style BREAK in hardware. We write to
the BRK bit (bit 0) of the UART Line Control register (UARTLCRH) to
start the BREAK, which begins after the UART finishes shifting out the
current character in progress, if any, including its stop bit(s), and
continues indefinitely until we write to the BRK bit again to stop the
BREAK.

* arch/arm/src/tiva/Kconfig
  (config TIVA_UART_BREAKS): New. Appears as CONFIG_TIVA_UART_BREAKS
   in code.

* arch/arm/src/tiva/common/tiva_serial.c
  (struct up_dev_s): Add new field 'brk' to indicate line break in
   progress when built with CONFIG_TIVA_UART_BREAKS.
  (up_ioctl): Add cases for TIOCSBRK to turn BSD-compatible break on
   unconditionally and TIOCCBRK to turn break off unconditionally.
  (up_txint): Block enabling TX interrupt if line break in progress.
   This is similar to the STM32F7 implementation.
2023-02-08 23:55:28 +08:00
ligd
24cdcd9a6e sim: fix kasan report memalign crash when alignment is 1
(0)Allocating 3 bytes aligned to 0x00000001
=================================================================
==1461685==ERROR: AddressSanitizer: invalid alignment requested in posix_memalign: 1, alignment must be a power of two and a multiple of sizeof(void*) == 4 (thread T0)
    #0 0xf7ab1c2f in __interceptor_posix_memalign ../../../../../src/libsanitizer/asan/asan_malloc_linux.cpp:226

Signed-off-by: ligd <liguiding1@xiaomi.com>
2023-02-08 20:37:43 +08:00
ligd
8d0094f6c9 sim: fix color running stack crash when use -Os
Signed-off-by: ligd <liguiding1@xiaomi.com>
2023-02-08 20:37:43 +08:00
qiaohaijiao1
b6472b8b15 sim/sim_alsa: add audio offload capture support.
use host liblame as encoder.

Signed-off-by: qiaohaijiao1 <qiaohaijiao1@xiaomi.com>
2023-02-08 13:55:17 +08:00
Alan Carvalho de Assis
63a847ebca esp32s3-devkit: Add support LED PWM initialization 2023-02-08 11:02:19 +08:00
Alan Carvalho de Assis
453d9688c7 esp32s3: Add support to PWM using LEDC 2023-02-08 11:02:19 +08:00
Alan Carvalho de Assis
94970f32d7 esp32s2-saola-1: Add initialization to LEDC PWM 2023-02-08 10:56:32 +08:00
Alan Carvalho de Assis
39729bb635 esp32s2: Add support to LEDC PWM 2023-02-08 10:56:32 +08:00
Lucas Saavedra Vaz
d7b66adbeb arch/xtensa/esp32s3: Add support for RTC IRQs 2023-02-08 10:56:15 +08:00
Lucas Saavedra Vaz
14d95eb131 arch/risc-v/esp32c3: Add RTC interrupt support 2023-02-08 10:42:19 +08:00
Nathan Hartman
5d2e1d40dc arch/tiva: Fix inability to control serial CTS/RTS via termios
* arch/arm/src/tiva/common/tiva_serial.c:
  (up_ioctl): PR #8406 (commit 1edec0aaa1) added support for
   configuring the serial port's CTS/RTS flow control at runtime using
   termios when built with CONFIG_SERIAL_TERMIOS and either or both of
   CONFIG_SERIAL_OFLOWCONTROL and CONFIG_SERIAL_IFLOWCONTROL. However,
   a runtime sanity check left over from before prevented this from
   working: When processing ioctl TCSETS, we would return -EINVAL if
   one or both of CCTS_OFLOW and CRTS_IFLOW were requested, which was
   not deserved if the requested features were in fact supported.
   Fixing the sanity check so it depends on features actually
   configured.
2023-02-08 10:31:11 +08:00
Nathan Hartman
1b3cac19a0 serial: Fix typo in comments (s/besued/because/) 2023-02-08 10:05:27 +08:00
Ville Juven
f4b82b6405 sched/addrenv: Remove up_addrenv_restore
The function is not relevant any longer, remove it. Also remove
save_addrenv_t, the parameter taken by up_addrenv_restore.

Implement addrenv_select() / addrenv_restore() to handle the temporary
instantiation of address environments, e.g. when a process is being
created.
2023-02-08 02:51:23 +08:00
Ville Juven
09e7987121 sched/addrenv: Fix system crash when process group has been deleted
There is currently a big problem in the address environment handling which
is that the address environment is released too soon when the process is
exiting. The current MMU mappings will always be the exiting process's, which means
the system needs them AT LEAST until the next context switch happens. If
the next thread is a kernel thread, the address environment is needed for
longer.

Kernel threads "lend" the address environment of the previous user process.
This is beneficial in two ways:
- The kernel processes do not need an allocated address environment
- When a context switch happens from user -> kernel or kernel -> kernel,
  the TLB does not need to be flushed. This must be done only when
  changing to a different user address environment.

Another issue is when a new process is created; the address environment
of the new process must be temporarily instantiated by up_addrenv_select().
However, the system scheduler does not know that the process has a different
address environment to its own and when / if a context restore happens, the
wrong MMU page directory is restored and the process will either crash or
do something horribly wrong.

The following changes are needed to fix the issues:
- Add mm_curr which is the current address environment of the process
- Add a reference counter to safeguard the address environment
- Whenever an address environment is mapped to MMU, its reference counter
  is incremented
- Whenever and address environment is unmapped from MMU, its reference
  counter is decremented, and tested. If no more references -> drop the
  address environment and release the memory as well
- To limit the context switch delay, the address environment is freed in
  a separate low priority clean-up thread (LPWORK)
- When a process temporarily instantiates another process's address
  environment, the scheduler will now know of this and will restore the
  correct mappings to MMU

Why is this not causing more noticeable issues ? The problem only happens
under the aforementioned special conditions, and if a context switch or
IRQ occurs during this time.
2023-02-08 02:51:23 +08:00
Ville Juven
5713d85df0 group/group_addrenv: Move address environment from group -> tcb
Detach the address environment handling from the group structure to the
tcb. This is preparation to fix rare cases where the system (MMU) is left
without a valid page directory, e.g. when a process exits.
2023-02-08 02:51:23 +08:00
Lucas Saavedra Vaz
21d9163aae arch/xtensa/esp32s2: Add support for touch pad interrupts 2023-02-07 12:19:41 +08:00
Lucas Saavedra Vaz
247aad82f2 arch/xtensa/esp32s2: Fix touch function typo 2023-02-07 12:19:41 +08:00
Nathan Hartman
5f9cb6faf4 drivers/serial: Fix docstrings on UART interrupt handlers 2023-02-07 04:41:36 +08:00
chao an
1b245664ad arm/rp2040: fix compile warning on boot2 build
ld: warning: boards/arm/rp2040/raspberrypi-pico-w/scripts/raspberrypi-pico-flash.ld contains output sections; did you forget -T?
Signed-off-by: chao an <anchao@xiaomi.com>
2023-02-07 04:40:38 +08:00
chao an
5ac638944b arm/backtrace: fix compile warning
common/arm_backtrace_unwind.c: In function 'up_backtrace':
common/arm_backtrace_unwind.c:626:27:
warning: assignment to 'long unsigned int' from 'uint8_t (*)[]'\
{aka 'unsigned char (*)[]'} makes integer from pointer without a cast [-Wint-conversion]

  626 |           frame.stack_top = &g_intstacktop;
      |
2023-02-07 04:40:38 +08:00
Lucas Saavedra Vaz
1e3af48fff arch/xtensa/esp32s2: Add support for RTC IRQs 2023-02-04 18:28:10 -03:00
wangbowen6
a11cb59af6 tc32/Make.defs: fix build break after merge unblock/block_task
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2023-02-04 18:25:58 -03:00
wangbowen6
f925e17f18 tlsr82/backtrace: tc32 backtrace bug fix
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
2023-02-04 18:25:58 -03:00
chao an
edfae1fe21 sim/hcisocket: correct teardown device index
Parameter of HCIDEVDOWN should be the corresponding device id, not 0

Signed-off-by: chao an <anchao@xiaomi.com>
2023-02-03 23:22:54 +08:00
chao an
7625126c91 Remove the remain MIN/MAX like macro
Signed-off-by: chao an <anchao@xiaomi.com>
2023-02-03 23:22:41 +08:00
Xiang Xiao
09841300b0 Remove the remain MIN/MAX like macro
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-02-03 20:42:57 +08:00