Commit Graph

13514 Commits

Author SHA1 Message Date
Alin Jerpelea
85bcf1bd4c arch: Author Alan Carvalho de Assis: update licenses to Apache
Alan Carvalho de Assis has submitted the ICL and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Alin Jerpelea
37f91b023c arch: Author David Sidrane: update licenses to Apache
David Sidrane has submitted the ICL and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Alin Jerpelea
8dd660ecd4 nuttx: Author David S. Alessio: update licenses to Apache
David S. Alessio has submitted the ICL and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-22 19:28:38 -07:00
Nathan Hartman
4653dc14d3 Fix typos (and nxstyle errors)
ReleaseNotes,
arch/arm/src/cxd56xx/cxd56_dmac_common.h,
arch/arm/src/efm32/efm32_dma.h,
arch/arm/src/lpc54xx/lpc54_lcd.c,
arch/arm/src/rp2040/rp2040_dmac.h,
arch/arm/src/stm32/stm32_dma.h,
arch/arm/src/stm32f0l0g0/stm32_dma.h,
arch/arm/src/stm32f7/stm32_dma.h,
arch/arm/src/stm32h7/stm32_dma.h,
arch/arm/src/stm32l4/stm32l4_dma.h,
arch/renesas/src/rx65n/rx65n_dtc.h,
fs/spiffs/src/spiffs_vfs.c,
net/route/cacheroute.h,
net/route/net_cacheroute.c,
net/route/net_foreach_fileroute.c,
net/route/net_foreach_ramroute.c,
net/route/net_foreach_romroute.c, and
net/route/route.h:

    * Fix the following typos:
      - remove spurious "are"
      - "tot he" -> "to the"

arch/arm/src/stm32f0l0g0/stm32_dma.h and
arch/arm/src/stm32l4/stm32l4_dma.h:

    * Fix nxstyle errors.
2021-03-21 21:51:14 +01:00
Michael Jung
d397e90b9d stm32l5: Enable SPI support and license clearing
Since the original stm32l4 version of this code already has an ASF
license header do that for stm32l5, too.

Apply latest changes to stm32l4_spi.c to stm32l5_spi.c as well.

Update stm32l5/Kconfig to allow selection of SPI1/2/3.

Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-19 23:02:37 -07:00
Nathan Hartman
4de28efbcb arch/stm32h7: Fix nxstyle errors
arch/arm/src/stm32h7/hardware/stm32_bdma.h:

    * Fix nxstyle errors.
2021-03-19 22:48:35 -07:00
Michael Jung
a1d0360e5e stm32l5_lse: Drive reduction after start-up
The LSE crystal oscillator driving strength can only be decreased to the
lower drive capability (LSEDRV = 00b) once the LSE is running, but not
to any other drive capability.  Instead of letting the user select a
value between 0 and 3 and then failing the build if the selected value
was not 0, make it a boolean option.

Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-18 19:59:41 -07:00
Michael Jung
a0ca686490 stm32l5: Rename up_waste to stm32l5_waste
To comply to NuttX naming conventions.

Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-18 19:59:41 -07:00
Michael Jung
2dbfa54150 stm32l5: Optional LSE xtal drive strength ramp-up
Ported from stm32f7/h7: If configured this way, ramp-up the LSE crystal
oscillator driving strength until the LSE starts up.

Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-18 19:59:41 -07:00
Nathan Hartman
cbb8a542e5 arch/stm32f0l0g0: Fix nxstyle errors
arch/arm/include/stm32f0l0g0/chip.h:
arch/arm/include/stm32f0l0g0/irq.h:
arch/arm/include/stm32f0l0g0/stm32f0_irq.h:
arch/arm/include/stm32f0l0g0/stm32g0_irq.h:

    * Fix nxstyle errors.
2021-03-18 22:55:51 +01:00
Nathan Hartman
5b813f0c14 arch/stm32l4: Fix nxstyle errors
arch/arm/include/stm32l4/stm32l4x3xx_irq.h:
arch/arm/include/stm32l4/stm32l4xrxx_irq.h:

    * Fix nxstyle errors.
2021-03-17 21:49:30 +01:00
Xiang Xiao
335ba21657 arch/arm: Fix syscall number out of swi range in thumb mode
The immediate number is 8bits in thumb mode:
+---------------------+---------------+
|15 14 13 12 11 10 9 8|7 6 5 4 3 2 1 0|
+---------------------+---------------+
| 1  1  0  1  1  1 1 1|      imm8     |
+---------------------+---------------+

The immediate number is 24bits in arm mode:
+-----------+-------------------------------------------------------------------------+
|31 30 29 28|27 26 25 24|23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0|
+-----------+-----------+-------------------------------------------------------------+
|   cond    | 1  1  1  1|                                imm24                        |
+-----------+-----------+-------------------------------------------------------------+

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I62503cdc377fcee81864e88e981d389bce2e1b45
2021-03-17 14:52:58 -03:00
Jiuzhu Dong
e96c8b9283 fs: allocate file/socket dynamically
Change-Id: I8aea63eaf0275f47f21fc8d5482b51ffecd5c906
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-03-17 06:46:42 -07:00
SPRESENSE
2f29521dd1 cxd56_cpu1signal: Fix an issue that gnss does not work
Because a thread of gnss receiver is created by pthread in the
AppBringUp task, the thread would be killed when AppBringUp
task exits.
Change to use kthread_create instead of pthread_create to prevent
this issue.
2021-03-17 06:36:33 -07:00
SPRESENSE
f7047d8ea3 cxd56_gnss: Add missing include header for cxd56_gnss.c
cxd56_gnss.c uses file descriptor operation from next change.
 0536953 Kernel module should prefer functions with nx/kmm prefix

But this change need to add fcntl.h in include header.
So, add missing header.
2021-03-17 03:11:54 -07:00
YAMAMOTO Takashi
9bd10898d2 arch/arm/src/lc823450: Make LC823450_IPL2 select BCH 2021-03-17 01:25:16 -07:00
Peter van der Perk
4dd457854d [FlexCAN] Correct reset state for CTRL1 register 2021-03-16 19:50:58 -07:00
Nathan Hartman
f165270a80 arch/stm32l4: Fix nxstyle errors
arch/arm/include/stm32l4/chip.h:
arch/arm/include/stm32l4/irq.h:
arch/arm/include/stm32l4/stm32l4x5xx_irq.h:
arch/arm/include/stm32l4/stm32l4x6xx_irq.h:

    * Fix nxstyle errors.
2021-03-16 19:38:30 -07:00
Michael Jung
b3ab373f3a stm32l5: Fix findings with latest nxstyle
Fix some incorrect relative file paths in ASF headers found with the
latest version of nxstyle.

Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-16 12:04:00 -07:00
Michael Jung
fb14125320 stm32l5: Coding style fixes
Put blanks around the '+' in register address definitions.

Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-16 12:04:00 -07:00
Michael Jung
3581289661 stm32l5: Put a timeout on waiting for LSE
Do not run into an infinite loop if the LSE does not start up.

Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-16 12:04:00 -07:00
Michael Jung
c031e4d2ee stm32l562xx_pinmap.h: Coding style fix
Remove spaces around binary-or operators in GPIO defines everywhere to
get a consistent coding style.

Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-16 12:04:00 -07:00
Michael Jung
8e14cb6065 stm32l5: Remove drive strengths from GPIO defines
As proposed by David Sidrane.  Required drive strength is board specific
and should be defined in the respective board.h file.

Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-16 12:04:00 -07:00
Michael Jung
78a69a89d8 stm32l5: Remove unused CACHE_LINESIZE defines
Cortex-M33 does neither have an I- nor a D-Cache.  Both defines are not
used across the stm32l5 architecture code.  Thus, just remove them.

_Originally posted by @acassis in https://github.com/apache/incubator-nuttx/pull/2974#discussion_r588224862_

Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-16 12:04:00 -07:00
Michael Jung
33892dcc54 armv8-m/arm_svcall.c: Fix compiler warning
regs[REG_R0] is uint32_t type, but '%d' expects int type.

Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-16 12:04:00 -07:00
Michael Jung
f3a5675cc4 stm32l5: Architecture Support for STM32L5
Architecture support for STMicroelectronics STM32L552xx and STM32L562xx
MCUs.  This is based on corresponding code for STM32L4, but has been
considerably adjusted.  Tested with Nucleo-L552ZE-Q and STM32L562E-DK
boards with simple NSH configurations.

Signed-off-by: Michael Jung <mijung@gmx.net>
2021-03-16 12:04:00 -07:00
Nathan Hartman
13816de7ac arch/stm32f7: Fix nxstyle errors
arch/arm/include/stm32f7/chip.h:
arch/arm/include/stm32f7/irq.h:
arch/arm/include/stm32f7/stm32f72xx73xx_irq.h:
arch/arm/include/stm32f7/stm32f74xx75xx_irq.h:
arch/arm/include/stm32f7/stm32f76xx77xx_irq.h:

    * Fix nxstyle errors.
2021-03-15 17:01:31 +01:00
Masayuki Ishikawa
73786e71ff arch: sam34: Author Masayuki Ishikawa: Update license to Apache
Signed-off-by: Masayuki Ishikawa <asayuki.Ishikawa@jp.sony.com>
2021-03-14 22:23:05 -07:00
Yuichi Nakamura
40fe666d3f arm/rp2040: Fix SPI halfword DMA transfer 2021-03-14 22:21:22 -07:00
Alin Jerpelea
f7c11c92c3 arch: Makefile: Alan Carvalho de Assis: update licenses to Apache
Alan Carvalho de Assis has submitted the SGA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-13 05:56:43 -08:00
Alin Jerpelea
bd94263a33 arch: Makefile: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-13 05:56:43 -08:00
David Sidrane
0c57351f78 mmcsd:Stuck in 1-bit mode, Removed CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
mmcsd:Remove CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
   stm32h7:sdmmc remove CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
   stm32f7:sdmmc remove CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
   stm32f7:sdmmc WRITE COMPLETE prevent false triggers
   stm32h7:sdmmc WRITE COMPLETE prevent false triggers

   While testing PR #2989 on the H7 I noticed that the cards
   were staying in 1-bit mode. The root cause was that the
   scr read path was using DMA without an invlidate.

   This was caused by CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT,
   but the sdmmc driver, did not use the delayed invalidate
   nor would it work on 8 bytes.

   The driver fully supported dcache mgt on runt buffers, but
   the #ifdef CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT blocked it.

   Reviewing the PR that added CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT
   it may have been valid at the time. But after the dcache operations
   we fixed. It is not necessary and offers no benefit.
2021-03-12 16:42:16 -03:00
Nathan Hartman
6061981e37 arch/stm32h7: Fix nxstyle errors
arch/arm/include/stm32h7/irq.h:
arch/arm/include/stm32h7/stm32h7x7xx_irq.h:

    * Fix nxstyle errors.
2021-03-12 16:58:51 +00:00
Masayuki Ishikawa
9aaa4068c1 arch: imx6: Fix an error message in imx_enet.c
Summary:
- This commit fixes an error message in imx_enet.c

Impact:
- None

Testing:
- Build only

Suggested-by: David Sidrane <David.Sidrane@NscDg.com>
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-03-12 11:30:08 +08:00
Yuichi Nakamura
174a4c1b68 arm/rp2040: Add RP2040 GPIO interrupt functions 2021-03-11 19:31:17 -03:00
Nathan Hartman
9fd0df3931 arch/stm32: Fix nxstyle errors
arch/arm/include/stm32/stm32f10xxx_irq.h:
arch/arm/include/stm32/stm32f20xxx_irq.h:
arch/arm/include/stm32/stm32f30xxx_irq.h:
arch/arm/include/stm32/stm32f33xxx_irq.h:
arch/arm/include/stm32/stm32f37xxx_irq.h:
arch/arm/include/stm32/stm32l15xxx_irq.h:

    * Fix nxstyle errors.
2021-03-11 21:39:27 +00:00
Masayuki Ishikawa
ad094552f8 arch: cxd56xx: Add CONFIG_ARCH_LEDS_CPU_ACTIVITY to cxd56_idle.c and cxd56_irq.c
Summary:
- This commit adds CPU activity LED feature to cxd56_idle.c and cx56_irq.c
- An LED for the current CPU will turn off before calling WFI
- An LED for the current CPU will turn on when an interrupt happens

Impact:
- CONFIG_ARCH_LEDS_CPU_ACTIVITY=y only

Testing:
- defconfigs will be commited later.

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-03-11 15:30:38 +01:00
Masayuki Ishikawa
2c753be0df Revert "arch: cxd56xx: Fix cxd56_usbdev.c for SMP"
Summary:
- The original commit was added to avoid hardfault but the
  root cause was the stack corruption which has been fixed by
  the previous commit. So let me revert the original commit.

Impact:
- SMP only

Testing:
- spresense:rndis_smp with nxplayer + telnet

This reverts commit 197187d826.

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-03-10 14:14:52 +08:00
Gustavo Henrique Nihei
330eff36d7 sourcefiles: Fix relative path in file header 2021-03-09 23:18:28 +08:00
Gustavo Henrique Nihei
47cb41c92f makefiles: Fix relative path in file header 2021-03-09 23:18:28 +08:00
Yuichi Nakamura
938b1daf02 arm/rp2040: RP2040 SPI DMA transfer support 2021-03-08 17:37:48 -03:00
Yuichi Nakamura
b69df289bd arm/rp2040: Add RP2040 DMAC functions 2021-03-08 17:37:48 -03:00
Anthony Merlino
892b6393e3 stm32h7x7xx: Setup UART1 and UART6 clocks as part of APB2 bringup if enabled. 2021-03-08 01:51:54 -08:00
Anthony Merlino
3705202b85 Fix missing IO_CONFIG setting for STM32H747XI 2021-03-08 01:51:54 -08:00
Yuichi Nakamura
2d7aabf13b arm/rp2040: Add RP2040 SPI device support 2021-03-08 17:06:07 +09:00
Yuichi Nakamura
a8d269df98 arm/rp2040: Add rp2040_gpio_init/put/get/setdir() 2021-03-08 17:06:07 +09:00
Anthony Merlino
40217e644f stm32h7: Allow custom clock configuration to use stdclockconfig 2021-03-07 23:40:29 -08:00
Masayuki Ishikawa
197187d826 arch: cxd56xx: Fix cxd56_usbdev.c for SMP
Summary:
- This commit fixes hardfault when running nxplayer with rndis_smp

Impact:
- SMP only

Testing:
- Tested with rndis_smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-03-07 19:51:12 -08:00
Anthony Merlino
67b9f5f9e3 Fix nxstyle issues.
# Conflicts:
#	arch/arm/src/armv7-m/dwt.h
2021-03-07 02:35:56 -08:00
Anthony Merlino
afd6ad4ff5 arch/armv7-m: Adds dwt helper functions for controlling watchpoints in code.
In scenarios where there is suspicion that someone might be touching your data when you don't expect, you can setup a watchpoint, and then guard accesses that you know are valid. If the debugger halts due to the watchpoint, you'll see where the unexpected access is coming from.
2021-03-07 02:35:56 -08:00