Not canceling the I2C timeout watch dog immediately after finishing
all I2C transactions in interrupt context can lead to a race condition
due to nxsem_wait(&priv->wait) in lpc17_40_i2c_start() not resuming
execution fast enough (this can be easily triggered if another task /
thread is using a lot of cpu time).
Falling to cancel the watchdog up to time will cause the priv->wait
semaphore to be incremented twice (first by lpc17_40_i2c_stop() then
by lpc17_40_i2c_timeout()), so all I2C transactions after that will
return immediately and priv->msgs will hold pointers to memory it
doesn't own anymore.
Canceling the priv->timeout watch dog in lpc17_40_i2c_stop() prevents
this as it is executed from the I2C interrupt handler.
arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.c: Fix timeout calculation
For each byte received / transmitted, an acknowledge bit is also
transmitted / received, requiring effectively 9 bits for each byte.
The SD boot loader was not satisfactory because 1) the SD slot is on an optional board and, hence, cannot be part of a fundamental solution. And 2) it is too big.
The only storage on borard is the Winbond W25 SPI-bsed FLASH. This commit adds support for a bootload to 1) read code in HEX format from a serial port and write it to the W25 FLASH, or 2) read code in binary form from the W25 FLASH into SRAM and execute the loaded program.
boards/z80/ez80/z20x/configs: Added w25boot configuration
boards/z80/ez80/z20x/src: Add bootloader logic, w25_main.c. Add logic to manage shared SRAM memory map so that the loaded program does not clobber the bootloader memory. Add logic to recover the bootloader memory into the heap after the loaded program as started.
boards/z80/ez80/z20x/scripts: Rework scripts and configuration to support a bootloader and program build. The boolloader cannot use all of SRAM; the program must not clobber the SRAM region used by the bootloader.
* imxrt: GPIO make tables const
* imxrt: Call out to board to set up FlexRAM
* imxrt: Add Knob for adding the ROM bootloaders 40Kib of RAM to heap
* imxrt: imxrt1060-evk:Add the ability to run from OCRAM
* arch/arm/src/imxrt/imxrt_usbdev.c: Add USB Device support for i.MX RT (USB OTG1)
Based on the LPC43xx USB Device driver.
* imxrt:usbotg Nxstyle fixes
Co-authored-by: thomasactia <61285689+thomasactia@users.noreply.github.com>
board/z80/ez80/*/scripts/Make.defs: Fix optimization definition use in assembly flags. It was using the compiler optimization settings instead of the assembler optimization settings. Hence, enabling optimization would could cause assembler command line errors.
arch/z80/src/ez80/Toolchain.defs: Back out some work arounds. Now compiler optimization flags can again set set without assembler command line errors.
boards/z80/ez80/z20x/README.txt: Trivial update to size/optimization discussion.
The eZ80F92 interrupt controller is very different from the eZ80F91. The eZ80F91 has:
1. Four byte interrupt vectors
2. The vector base address register is 16-bit so the vector table can lie in RAM
Whereas the eZ80F92 has:
1. Two byte interrupt vectors
2. An 8-bit vector base address
This means that the vectors must lie in the first 16-bits of FLASH and there must be a "trampoline" to get to interrupt handlers outside of the first 64-Kb of FLASH.
arch/z80/src/ez80/Toolchain.defs: Correct some CFLAGS when optimization suppressed.
arch/z80/src/ez80/Kconfig arch/z80/src/ez80/ez80_emac.c: Remove configuration option for selecting EMAC RAM address. This is duplicated and possibly conflicting. The correct address for the RAM is provided in the linker command file. The RAM should be configured once and using this single definitions.
arch/z80/src/ez80/ez80_startup.asm and arch/z80/src/ez80/ez80f9*_init.asm. Move RAM and FLAH intialization out of MCU-specific logic to common start-up logic. We cannot call any functions until SRAM is initialized and the stack is properly initialized because the return address is stored on the stack. Use internal SRAM for the IDLE stack to avoid the chicken'n'egg problem.
boards/z80/ez80/z20x/configs/sdboot/sdboot.zdsproj: Discuss build environments.
These makefiles set the the ZiLOG runtime libraries for the eZ80 parts. The setup was, however, conditioned on CONFIG_ARCH_EZ80_EZ80F91 and, so, was not working for the eZ80F92 part (CONFIG_ARCH_EZ80_EZ80F92).
With this change, the z20x board FINALLY builds and links correctly with no errors.
Don't use MCU selection from compiler. It appears that we must compile ez80f92 code as ez80f91 so the comiler MCU selection is incorrect. Instead, use the selected CPU part from the configuration.
arch/z80/src/ez80/Toolchain.defs: Update some CFLAGS to match CFLAGS from ZDS-II IDE. Apparently, we must say that the CPU is an eZ80F91 event when compiler for eZ80F92.
boards/z80/ez80/z20x: Update linker scripts.
* tools/zds/zds_Config.mk: Move boards/z80/ez80/scripts/eZ80_Config.mk to tools/zds/zds_Config.mk where it can be shared by other ZDS-II platforms.
* boards/z16/z16f: Duplicate changes for new ZDS-II support from ez80
* boards/z80/z8: Duplicate changes for new ZDS-II support from ez80
* arch/z16/src/z16f/Toolchain.defs: Create required Toolchain.defs file for Z16f
There are cases that USE_SERIALDRIVER is defined but USE_EARLYSERIALINIT not defined in some configs. So use ifdef USE_EARLYSERIALINIT to include up_earlyserialinit anyway.
An error was introduced from:
commit f982ee43db
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date: Tue Feb 18 09:55:04 2020 +0800
drivers/serial: Remove the lowconsole driver
Replace with the syslog console driver which has more capability than lowconsole
arch/z80/arc/ez80/Toolchain.sh: Move more common toolchain definitions from Make.defs.
boards/z80/ez80/scripts/eZ80_Config.mk: Move common defines that override tools/Config.mk to this new file.
This does not solve the ez80 build problem yet but does assure that when the solution is in place, it will automatically apply to all present and future ez80 configurations.
