Dave Marples
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d0cda60442
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In the current implementation we only use very high priority interrupts (levels 0, 0x10 and 0x20 in CORTEX-M speak) but that means there are loads of lower priority ones that are effectively unused. I have *not* changed the semantics of these levels but have 'shifted' them to be based around the midpoint of the available interrupts (0x80) rather than at the top end....that allows for interrupts to be defined above (or, indeed, below) them as needed by the application. This should have no functional effect on existing code but adds in a clean capability to define higher priority interrupts.
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2018-12-03 17:41:59 -06:00 |
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Gregory Nutt
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cb374e6e62
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arch/: Clean up some naming and spacing.
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2018-06-20 15:38:06 -06:00 |
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Gregory Nutt
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d0ec395c42
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Correct some spacing and some unused definition in some irq.h header files.
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2017-04-20 12:39:21 -06:00 |
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Gregory Nutt
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1cdc746726
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Rename CONFIG_DEBUG to CONFIG_DEBUG_FEATURES
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2016-06-11 14:14:08 -06:00 |
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Gregory Nutt
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83bc1c97c3
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Rename irqsave() and irqrestore() to up_irq_save() and up_irq_restore()
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2016-02-14 16:11:25 -06:00 |
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Gregory Nutt
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8f1b9886a9
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Backport the new LPC17xx I2C driver to the LPC11xx in order to get the I2C_TRANSFER method
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2016-01-30 12:17:01 -06:00 |
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Gregory Nutt
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f4115ab45c
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Correct LPC11xx priority definitions + fix some typos in comments
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2016-01-25 07:36:26 -06:00 |
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Gregory Nutt
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36726b1bc4
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Standardize the width of all comment boxes in header files
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2015-10-02 17:42:29 -06:00 |
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Gregory Nutt
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9140a0fcc4
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Initial support for the NXP LPC11 family and the LPC1115 MCU in particular. Contributed by Alan Carvalho de Assis.
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2015-05-22 14:14:09 -06:00 |
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