Currently configuring the uart3/4 as the serial console
doesn't work. Apply proper changes in mpfs_config.h that
enables the following configuration options:
- CONFIG_UART3_SERIAL_CONSOLE
- CONFIG_UART4_SERIAL_CONSOLE
Also, fix a typo in mpfs_lowputc.c that gives a compile
error if defined.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
When enable DEBUG_TCBINFO config, a global struct will
provide, then debuggers can aware nuttx task infomation.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
This commit adds microcontroller support for Analog Front End driver to
samv7 MCUs. Only software trigger via IOCTL is currently supported,
averaging can be set by configuration option CONFIG_SAMV7_AFECn_RES.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
cppcheck reports the following:
arch/risc-v/src/mpfs/mpfs_emmcsd.c:2375:22: error: Uninitialized variable: waitbits [uninitvar]
while (!(status & (waitbits | MPFS_EMMCSD_SRS12_EINT))
The finding is positive and this patch initializes it to
zero properly.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
Strongly-Ordered requires aligned access unless
caching is enabled.
Normal memory
Accesses to normal memory region are idempotent...
- unaligned accesses can be supported
With CONFIG_ARMV7M_DCACHE the cache maintenance operation
are not present. Or if CONFIG_ARMV7M_DCACHE_WRITETHROUGH
is on then buffering operations are no-ops.
This change enables MPU_RASR_C and MPU_RASR_B if
CONFIG_ARMV7M_DCACHE is only set.
if CONFIG_ARMV7M_DCACHE_WRITETHROUGH is set then only
MPU_RASR_C is enabled.
N.B When caching is disalbed unaligned access may cause hard faults
so add -mno-unaligned-access
It is always safe to enable Buffering in FLASH to achive unaligned
access leniency, as it is not written to.
1. Wi-Fi and BLE use common PHY functions.
2. Fix Wi-Fi & BLE coexist adapter error.
3. Update esp-wireless-drivers-3rdparty, provide coexist protection for connection.
1. Fix the issue that Wi-Fi can't connect to some special routers occasionally.
2. Support Wi-Fi 12/13 channel active scanning by default.
3. Update Wi-Fi driver code to fix issue of failure to send pkt.
4. Replace software random with hardware random
5. Fix Wi-Fi mode start error
E51 may configure the L1 and L2 caches. Once configured,
no reconfiguration is possible after hardware reset is
issued.
L2 is 16-way set associative with write-back policy. The
size 2 MB, from which 1 MB is utilized with the values
provided here. That's a total of 8 ways. The rest of the
L2 is left out for the bootloader usage.
mpfs_enable_cache() first checks the bootloader usage
doesn't overlap with the cache itself, thus providing a
set of functional values.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
the SDIO clock is not enabled when the bus goes to the idle state, that, in turn, breaks
IRQ delivering mechanism over DAT[1]/IRQ SDIO line to the host.
This reverts commit d9a5b92c1a306a70df52d50a02a80dc8ef20bf0d.
Revert "arch/arm: Remove -march and -mtune"
This reverts commit b8e99cf12f3a287311a2d341f285c71a5da3e4d4.
Bluetooth is not enabled. When Bluetooth is enbaled then it defaults to
64KB. This will not wast those 64KB of memory when Bluetooth is not enabled.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
This commit adds new files that support functionality of QSPI driver in
SPI Master Mode. This functionality is included in new files sam_qspi_spi.x
to avoid too much mess in the source code. QSPI in SPI mode can be turn
on by config option SAMV7_QSPI_SPI_MODE.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
