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2969 Commits

Author SHA1 Message Date
Gregory Nutt
d0923ee830 SAMA5 UDPHS: Major changes to DMA interrupt and request handling to better handle DMA 2013-09-05 14:33:27 -06:00
Gregory Nutt
4377b4f5e8 SAMA5 UDPHS: Fix DMA channel vs. matching endpoint 2013-09-04 15:08:19 -06:00
Gregory Nutt
8c64ca58b2 SAMA5 UDPHS: More USB fixes mostly related to byte counts, endpoint configuration, and dma configuration 2013-09-04 13:36:52 -06:00
Gregory Nutt
a478b680a3 SAMA5 UDPHS: More zero length packet fixes; revamped request queue structures 2013-09-04 09:48:08 -06:00
Gregory Nutt
a9a8801472 SAMA5 UDPHS: Fixes related to null packet and SETUP OUT data handling 2013-09-03 19:13:34 -06:00
Gregory Nutt
d294826cfd SAMA5 UDPHS: Small change to zero length packet handling 2013-09-03 16:24:11 -06:00
Gregory Nutt
10da3662e4 SAMA5 UDPHS: Fix some issues with TX interrupt handling 2013-09-03 14:53:10 -06:00
Gregory Nutt
43a62c63d9 SAMA5 UDPHS: A little debugging progress. Not all transfers are working yet 2013-09-03 13:09:50 -06:00
Gregory Nutt
84439348df SAMA5 UDPHS: Changes from initial debug session. Still a long way to go 2013-09-02 16:59:07 -06:00
Gregory Nutt
37579db920 SAMA5 UDPHS: Fixes related to soft connect pullup and DMA buffer allocation 2013-09-02 14:55:33 -06:00
Gregory Nutt
c162cca9e8 SAMA5 UDPHS: Some very early debug corrections. Not yet working. 2013-09-02 12:26:15 -06:00
Gregory Nutt
742e89783b SAMA5 UDPHS: Add logic to handle deferred address setting; add logic to handle EP0 SETUP OUT data 2013-09-02 10:08:18 -06:00
Gregory Nutt
393b44f059 STM32 Timer Register Bit Definitions: Some CCER bit settings changed per SourceForge bug #18 submitted by CCCTSAO 2013-09-02 08:01:09 -06:00
Gregory Nutt
387795ecdf SAMA5 UDPHS: Clean up some write request handling 2013-09-01 16:56:22 -06:00
Gregory Nutt
66b5ed14d5 SAMA5 UDPHS: Resolve a few of easier REVISIT pre-processor warnings 2013-09-01 15:36:17 -06:00
Gregory Nutt
8587026c18 SAMA5 UPPHS: Fix a small mountain of compilation errors. Still things to REVISIT so it is not ready for test 2013-09-01 11:31:12 -06:00
Gregory Nutt
5c950889cf SAMA5 UDPHS: Support USPHS clock configuration 2013-09-01 11:29:51 -06:00
Gregory Nutt
f4c1568c17 SAMA UDPHS: Add pull-up and stall logic. Added to build system but does not yet build 2013-08-31 17:37:51 -06:00
Gregory Nutt
75c9ba5fbb Remove empty README.txt files 2013-08-31 13:17:04 -06:00
Gregory Nutt
9d2f55ca97 SAMA5 UDPHS: Add endpoint configuration and read DMA logic 2013-08-31 12:20:00 -06:00
Gregory Nutt
8df66532ce SAMA5 UDPHS: Bring in UDPHS endpoint interrupt handling logic 2013-08-31 10:43:58 -06:00
Gregory Nutt
4a9748dfdf SAMA5 UDPHS: Write DMA logic added. Still incomplete 2013-08-30 15:41:06 -06:00
Gregory Nutt
6548308982 SAMA5: Updated UDPHS driver. Still incomplete 2013-08-30 14:51:41 -06:00
Gregory Nutt
024da6049d SAMA5 UDPHS interrupt decoding logic 2013-08-29 18:11:34 -06:00
Gregory Nutt
8c92beb70e SAMA5 UDPHS interrupt decoding logic 2013-08-29 17:34:05 -06:00
Gregory Nutt
3b1323a74b SAMA5: Initial framework for a UDPHS USB device side driver 2013-08-29 16:29:27 -06:00
Gregory Nutt
be88385911 SAMA5: Add high-speed USB register definition header file 2013-08-28 17:50:05 -06:00
Gregory Nutt
e862d5d197 SAMA5 EHCI: Implemented (but did not test) interrupt endpoint logic 2013-08-28 13:07:35 -06:00
Gregory Nutt
1ab10a20bd SAMA5 EHCI: Correct and extend pool allocation logic; Fix data toggle values 2013-08-28 10:03:48 -06:00
Gregory Nutt
beb58c2520 SAMA5: Fixes a bug in the way that the heap regions were being allocated 2013-08-27 16:43:19 -06:00
Gregory Nutt
a3af5b3aaf SAMA5 OHCI+EHCI: Using cp15_clean instead of cp15_coherent; EHCI: Need to set alt pointer in order to handle short transfers. 2013-08-27 13:07:21 -06:00
Gregory Nutt
bc46b447dc Fix all occurrences of "the the" in documentation and comments 2013-08-27 09:40:19 -06:00
Gregory Nutt
c5802dd5a0 Add hooks to select Cortex-A8 2013-08-27 08:46:37 -06:00
Gregory Nutt
18126a5fd4 SAMA4 EHCI: Correct some backward conditional compilation; fix some warnings 2013-08-26 17:03:52 -06:00
Gregory Nutt
12beaf4b1a Add a new method to the USB host driver interface: getdevinfo. This method will return information about the currently connected device. At present, it only returns the device speed. The speed is needed by the enumeration logic in order to set a credible initial EP0 max packet size 2013-08-26 15:46:16 -06:00
Gregory Nutt
8130f5bd64 SAMA5 EHCI: Status phase is the opposite direction as the data phase 2013-08-26 14:28:13 -06:00
Gregory Nutt
40525cedcd SAMA5 EHCI: Taking direction from wrong bit in SETUP request; need to flush data buffer before starting SETUP request 2013-08-26 11:05:23 -06:00
Gregory Nutt
03ad60426d #17 Fix if CONFIG_SDIO_BLOCKSETUP defined, OS will crash. From CCTSAO 2013-08-26 08:54:46 -06:00
Gregory Nutt
b3df0c1037 SAMA5 EHCI: Data toggle and status phase fixes 2013-08-25 14:45:08 -06:00
Gregory Nutt
bea6894bd7 EHCI reset bit was not being set correctly 2013-08-25 10:46:41 -06:00
Gregory Nutt
f1a20f49ff SAMA5 OHCI: Fix semaphore handling bug. OHCI is now function by itself again after changes to integrate with EHCI 2013-08-25 08:57:35 -06:00
Gregory Nutt
042abb0856 SAMA5 OHCI: Fix backward conditional compilation. Clean-up OHCI/EHCI debug output 2013-08-25 08:30:21 -06:00
Gregory Nutt
0582148cfd SAMA5D3x-EK: Fix some backward conditional compilation 2013-08-24 14:06:47 -06:00
Gregory Nutt
5f78f6998f SAMA5: OHCI various bugfixes for interrupt handling 2013-08-24 13:03:15 -06:00
Gregory Nutt
cd84d1bec4 SAMA5: EHCI now handles low- and full-speed connections by giving them to OHCI; OHCI now uses the work queue to defer interrupt processing; If both OHCI and EHCI are enabled, EHCI is the master of the UHPHS interrupt 2013-08-24 11:34:24 -06:00
Gregory Nutt
9d0f504340 SAMA5 EHCI: Added logic to detect port speed. Handling is insufficient 2013-08-24 07:36:05 -06:00
Gregory Nutt
2d5313a931 Fix #endif with missing #if condition. Reported by Andrew Bradford 2013-08-23 16:40:30 -06:00
Gregory Nutt
7c5f8c86ce SAMA5/ECHI: Debug register access, add logic to determine transfer size, fix setting of control bit in token 2013-08-23 16:23:15 -06:00
Gregory Nutt
db1b3c421b SourceForge bug #16 Fix IO pin map. Add CONFIG_SERIAL_TERMIOS support. From CCTSAO 2013-08-23 11:48:53 -06:00
Gregory Nutt
bdc7d0523d SAMA5 EHCI: cosmetic changes 2013-08-23 11:26:17 -06:00
Gregory Nutt
9a109ba4ba SAMA5: Add support for sharing ports when both OHCI and EHCI are enabled 2013-08-23 10:58:30 -06:00
Gregory Nutt
2b3fd9e9c3 SAMA5 EHCI: Fix some list traversal bugs 2013-08-22 19:32:24 -06:00
Gregory Nutt
eef0f392ec SAMA5 EHCI: Initial debug changes 2013-08-22 17:25:00 -06:00
Gregory Nutt
f356586fd3 SAMA5 EHCI: No complete for bulk and control endpoints 2013-08-22 13:36:16 -06:00
Gregory Nutt
577b19920e SAMA5 EHCI: Add data transfer logic for asynchronous endpoints 2013-08-22 10:27:46 -06:00
Gregory Nutt
c1c5e195ce SAMA5 EHCI: Add IOC error handling 2013-08-22 09:23:01 -06:00
Gregory Nutt
7e9832f955 SAMA5 EHCI: transfer termination logic. Incomplete 2013-08-21 17:08:12 -06:00
Gregory Nutt
a5eb830544 SAMA5 EHCI: Hardware initialization logic 2013-08-21 13:45:54 -06:00
Gregory Nutt
b1864a995e Move all SAMA5 EHCI interrupt handling to the worker thread 2013-08-21 11:07:42 -06:00
Gregory Nutt
85aa2c1a8d SAMA5 EHCI: At list-oriented cache operations 2013-08-20 18:06:04 -06:00
Gregory Nutt
0f2ce573e4 Add SAMA5 EHCI list traversal logic 2013-08-20 17:01:30 -06:00
Gregory Nutt
320a2e2a0a Beginning of support for SAMA5 EHCI. Not much there yet 2013-08-20 15:46:36 -06:00
Gregory Nutt
e3a76b2e64 Add kernel/user memalign functions. Not fully integrated 2013-08-20 13:04:49 -06:00
Gregory Nutt
b04ea3efa6 SAMA5 OHCI+EHCI mostly cosmetic changes 2013-08-19 15:03:14 -06:00
Gregory Nutt
19d7c90d4e USB host: Add device address management support in preparation for USB hub support 2013-08-18 14:31:57 -06:00
Gregory Nutt
0524688c71 Add few more EHCI definitions 2013-08-18 13:01:13 -06:00
Gregory Nutt
dc07d65e14 STM32 F1 I2C: Fix a typo that crept in with some recent changes. From Yiran Liao 2013-08-18 07:45:14 -06:00
Gregory Nutt
e2f68ac85f Add EHCI header file (not quite complete) 2013-08-17 14:19:18 -06:00
Gregory Nutt
11086f34d0 SAMA5 OHCI: Driver is now basically functional 2013-08-16 13:13:21 -06:00
Gregory Nutt
1fb80e0917 SAMA5 OHCI: Re-organize some endpoint list data structures.. Strange things happen when semaphores lie in DMA memory which is occasionally invalidated 2013-08-16 11:36:51 -06:00
Gregory Nutt
10daf06976 STM32 SPI: nbits interface extended to handle LSB- or MSB-first operation. From Teemu Pirinen 2013-08-16 11:35:22 -06:00
Gregory Nutt
ca739ce76d SAMA5 OHCI: Don't prealloc RH port TDs and EDs. Allocate from a free list like other cases 2013-08-15 17:15:08 -06:00
Gregory Nutt
7f733b0472 SAMA5 OHCI: Fix errors in cache handling; Don't add ED to control list until port is connected 2013-08-15 15:28:27 -06:00
Gregory Nutt
0098c9ec5f SAMA5: ports should not be reset state (seems to make no difference) 2013-08-14 17:33:31 -06:00
Gregory Nutt
fe73fe2e23 SAMA5: Alternatie clock configuration that yields a perfect 48MHz full speed USB clock and a CPU clock of 384MHz 2013-08-14 15:16:04 -06:00
Gregory Nutt
79d5239023 SAMA5 OHCI: Use physical address and flush and/or invalidate data caches as necessary 2013-08-14 12:23:06 -06:00
Gregory Nutt
16ac25fd09 Clean up some LP17xx and STM32 USB host configuration compilation errors due to the massive changes to the USB host interfaces needed to support the SAMA5 2013-08-13 17:43:19 -06:00
Gregory Nutt
3f4b90cc3b SAMA5: Major restructuring of the the OHCI driver drivers to better handle the multiple root hub ports and concureent transfers on each port. 2013-08-13 16:48:14 -06:00
Gregory Nutt
1700d06d89 Separate wait() and enumerate() methods from struct usbhost_driver_s and move to new interface, struct usbhost_connection_s. This is part of the necessary restructuring of the USB host interface to support multiple root hub ports. 2013-08-13 15:03:46 -06:00
Gregory Nutt
a65ac5bc72 Back out most of the changes of 3b04d08043742b9e65cf38d45988b35bff91daed 2013-08-13 14:12:27 -06:00
Gregory Nutt
b575450a04 Separate SAMA5 OHCI interrupt handling into separate functions 2013-08-13 13:34:35 -06:00
Gregory Nutt
ad258cb3b7 SAMA5 OHCI: Fix some erors in the loop that waits for device connection changes 2013-08-13 09:44:16 -06:00
Gregory Nutt
9220a748bd Fix re-entry problem in SAMA5 up_putc 2013-08-13 09:42:40 -06:00
Gregory Nutt
1ec49f08b4 STM32 F3 fixes from John Wharington 2013-08-13 07:48:18 -06:00
Gregory Nutt
120a3604c9 More changes to USB host interface to support multiple downstream ports 2013-08-12 16:29:33 -06:00
Gregory Nutt
e09bd50fdd First of several changes needed to support multiple USB host root hubs 2013-08-12 14:44:06 -06:00
Gregory Nutt
0da218483d SAMA5: Add logic to control VBUS power for OHCI 2013-08-12 11:59:10 -06:00
Gregory Nutt
ed49812d2c Add untested OHCI driver for the SAMA5; structure naming and header files for USB host initialization prototypes 2013-08-11 17:11:32 -06:00
Gregory Nutt
dd3c682443 SAMA5: Some improvements to the HSCMI card removal/insertion logic 2013-08-11 11:13:11 -06:00
Gregory Nutt
d6264c2c1f Add CAN configuration to STM32 config menu 2013-08-10 19:37:35 -06:00
Gregory Nutt
054468d151 STM32: Fix STM32 serial init for non-reordered serial ports. From Lorenz Meier 2013-08-10 19:33:16 -06:00
Gregory Nutt
544185c683 Added option to disable STM32 serial port re-ordering 2013-08-10 19:29:44 -06:00
Gregory Nutt
da4cebf572 SAMA5: Fix HSMCI race condition. Now memory card interface is functional with DMA 2013-08-10 18:01:23 -06:00
Gregory Nutt
968b2553cd Rearrange configuration settings so that ARCH_HAVE_SDIO is moved to higher, sharable level 2013-08-10 09:06:53 -06:00
Gregory Nutt
c5e66ae051 Extend the virtual-to-physical address conversion logic to handle NFS SRM, UDPH SRAM, and external SRAM and PSRAM. 2013-08-09 17:55:27 -06:00
Gregory Nutt
efabe4aaff SAMA5: Centralize logic for conversion between physical and virtual addresses 2013-08-09 17:25:53 -06:00
Gregory Nutt
619cd66f33 Fix some cache-related issues with the SAMA5 DMA driver 2013-08-09 15:25:13 -06:00
Gregory Nutt
628f50ba61 SAM3,4,A5 DMA fixes; SAMA5 SPI driver now supports DMA transfers 2013-08-09 13:12:16 -06:00
Gregory Nutt
417636e1de SAMA5: Use RDR/TDR registers for DMA, not FIFO registers; change DMA bit settings to match Atmel example. Still no DMA 2013-08-08 15:51:16 -06:00
Gregory Nutt
83cbd61c8c SAMA5 DMA: Need to flush caches; DMA channel depends upon direction of DMA; the maximum transfer size in bytes depends on the number of bytes per transfer 2013-08-08 13:15:52 -06:00