Commit Graph

198 Commits

Author SHA1 Message Date
dongjiuzhu1
8ad88a3fc5 qemu/arm64: implement up_textheap_align and support sotest
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2023-10-30 18:20:22 +08:00
dongjiuzhu1
da95b35175 arch/arm64: Add declaration for arm64_mmu_set_memregion
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2023-10-30 18:20:22 +08:00
dongjiuzhu1
489bd15271 arch/arm64: support relocate for aarch64
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2023-10-30 18:20:22 +08:00
SPRESENSE
f3fabc5d32 Revert "make/archive: Use the full path name when matching or storing names in the archive"
This reverts commit 563125fde3.
2023-10-27 22:26:18 +08:00
simbit18
37729540c0 Fix Kconfig style
Remove spaces from Kconfig
Add comments
2023-10-26 01:53:58 +08:00
Masayuki Ishikawa
a98650f609 arch: arm64: Remove unnecessary code in arm64_cpu_idle.S
Summary:
- I noticed that irq is enabled explicitly in arm64_cpu_idle.S
- The code is unnecessary since tasks, including the idle task,
  are created with irq enabled in up_initial_state()

Impact:
- Should be none

Testing:
- qemu-armv8a:netnsh_smp_hv with qemu-7.2.4

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2023-10-18 17:06:29 +08:00
zhangyuan21
48ca996ad7 arch: arm64 support smp function call
Add up_send_smp_call function to support smp function call.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-10-18 09:57:50 +08:00
zhangyuan21
21d9066c95 arm64: support up_coherent_dcache function
Before code is executed after being loaded into memory,
it is necessary to ensure the consistency of I and D cache.
The up_coherent_dcache function will flush the dache and
invalidate the icache to ensure cache consistency.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-10-16 16:08:23 +08:00
zhangyuan21
ca46cbb0bd arm64: target cpuid calculation error in arm64_gic_raise_sgi function
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-10-16 16:08:04 +08:00
TaiJuWu
1989749850 cpu_pause.c: fix typo
Signed-off-by: TaiJuWu <tjwu1217@gmail.com>
2023-10-14 00:26:31 -04:00
zhangyuan21
abfeafa876 arm64: XN should only be set when the attribute MT_EXECUTE_NEVER is set
Only when SCTLR_ELn.WXN is set to 1, regions that are writable at ELn
are treated as non-executable. Therefore, when SCTLR_ELn.WXN is set to
0, regions that are writable at ELn can be executed, so the writable
attribute cannot be used to restrict the executable attribute.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-10-13 22:48:13 +08:00
hujun5
cef8c598c7 arm64: Add support for FIQ interrupts
To compile arm64 NuttX, use the following command:
 ./tools/configure.sh -l qemu-armv8a:nsh_fiq
To run,use the following command
 qemu-system-aarch64 -cpu cortex-a53 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-10-12 16:56:24 -04:00
hujun5
061be5f18e refine: move BIT Macro to nuttx/bits.h
The BIT macro is widely used in NuttX,
and to achieve a unified strategy,
we have placed the implementation of the BIT macro
in bits.h to simplify code implementation.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-10-12 14:52:56 +08:00
Lee Lup Yuen
6cad7e9582 arm, arm64, xtensa, libxx: Change sed -r to sed -E to support macOS
When we build NuttX on macOS, it shows many `sed` messages (and the build still completes successfully):

```text
$ tools/configure.sh pinephone:nsh
$ make
sed: illegal option -- r
```

This is due to the Makefiles executing `sed -r` which is not a valid option on macOS.

This PR proposes to change `sed -r` to `sed -E` because:

- `sed -E` on macOS is equivalent to `sed -r` on Linux

- `sed -E` and `sed -r` are aliases according to the GNU `sed` Manual

- `sed -E` is already used in nuttx_add_romfs.cmake, nuttx_add_symtab.cmake and process_config.sh
2023-10-10 11:36:32 +03:00
Xiang Xiao
dfa0283d83 spinlock: Rename spin_islocked to spin_is_locked
align with Linux naming style

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-10-06 20:03:19 -04:00
TaiJu Wu
ffba0d15a5 Feature: implement ticket spinlock
test config: ./tools/configure.sh -l qemu-armv8a:nsh_smp

Pass ostest

No matter big-endian or little-endian, ticket spinlock only check the
next and the owner is equal or not.

If they are equal, it means there is a task hold the lock or lock is
free.

Signed-off-by: TaiJu Wu <tjwu1217@gmail.com>

Co-authored-by: Xiang Xiao <xiaoxiang781216@gmail.com>
2023-10-07 01:38:37 +08:00
wanggang26
7f5e6bd383 hostfs: mask bit fields of not support
Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
2023-09-23 05:28:57 +09:00
raiden00pl
0e01836f09 serial: add an option that selects uart rpmsg as console 2023-09-22 19:46:26 +08:00
raiden00pl
3e79d21100 arch/arm: fix undefined reference to arm_serialinit when RTT console used 2023-09-21 20:30:27 +08:00
zhangyuan21
f47991e34d arch/arm64: select ARCH_HAVE_IRQTRIGGER for all arm64 chip
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-09-20 20:52:03 +08:00
Shanmin Zhang
e8550a02b9 arm64: support reboot / poweroff for qemu virt arm64
Signed-off-by: Shanmin Zhang <zhangshanmin@xiaomi.com>
2023-09-20 00:40:44 +08:00
liaoao
3a08c0a1e6 qemu:fdt:add device tree support for goldfish arm/arm64
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-09-19 11:34:26 +08:00
qinwei1
cb3e6667e3 arm64: add PSCI support for qemu platform
Summary
   Add ARM PCSI (Power State Coordination Interface) Support
for qemu. With the interface, Poweroff/PowerReset can be support

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-09-19 11:34:26 +08:00
zhangyuan21
1e55ca43ef arm64: set cpuid according to mpidr
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-09-19 11:34:26 +08:00
qinwei1
8eea6d2e2a arm64: GoldFish add miss arm64_netinitialize
Summary
    add miss arm64_netinitialize function for goldfish
platform

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-09-19 11:34:26 +08:00
qinwei1
c7e70b6967 arm64: GoldFish Platform support
Summary:
   Adding virtual evaluate platform GoldFish. Which is based on
Android Goldfish Emulator, it's a ARM virt board but Android enhance
it with more featue
   The patch set goldfish as a chip

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-09-19 11:34:26 +08:00
chao an
ce6330bf29 arch/arm64: sync with mainline change
Signed-off-by: chao an <anchao@xiaomi.com>
2023-09-19 09:38:52 +08:00
qinwei1
a42448feb4 arch/arm64: fix link RWX warning for NuttX arm64
Summary
  when using new gcc verion like:
  GNU ld (Arm GNU Toolchain 12.2.Rel1 (Build arm-12.24)) 2.39.0.20221210)

  we will get link warning like:

  aarch64-none-elf-ld: warning: XXX/nuttx has a LOAD segment with RWX permissions

  The patch fix the warning through add link option --no-warn-rwx-segments

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-09-19 09:38:52 +08:00
qinwei1
cbf76e96c7 arm64: add mcpu option for all Cortex CPU
Summary
   add mcpu option for all Cortex CPU, from Spec of gcc

https://gcc.gnu.org/onlinedocs/gcc-12.3.0/gcc/AArch64-Options.html

testing with ostest for every option

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-09-19 09:36:29 +08:00
qinwei1
335c83e3c0 arm64: sync make file rules from arch/arm
Summary:
  sync makefile build rules from arch/arm to fix some compile
issue

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-09-19 09:32:53 +08:00
chao an
5026a96cfa nxstyle: cleanup UTF-8 Unicode to ASCII
Signed-off-by: chao an <anchao@xiaomi.com>
2023-09-18 11:54:17 -04:00
TaiJuWu
68b8006ee9 fix arm64_start_cpu 2023-09-17 01:20:25 +08:00
Xiang Xiao
8dbe86084e Remove FAR from source code under 32bit arch and board
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-09-16 19:12:13 +03:00
Daniel Appiagyei
5bfda12634 c++ compatibility: rename reserved c++ keywords 'public' and 'this' 2023-09-16 19:45:02 +08:00
Petro Karashchenko
69b6a1f09c arch/arm[64]: fix nxstyle issues
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-09-16 14:17:47 +08:00
simbit18
50e6dcb1e0 Fix nuttx coding style
Correct forming guard names
2023-09-13 22:49:38 +08:00
chao an
664927c86e mm/alloc: remove all unnecessary cast for alloc
Fix the minor style issue and remove unnecessary cast

Signed-off-by: chao an <anchao@xiaomi.com>
2023-08-30 14:34:20 +08:00
chao an
563125fde3 make/archive: Use the full path name when matching or storing names in the archive
This pr will avoid targets with the same name can not be archive in the same library

Signed-off-by: chao an <anchao@xiaomi.com>
2023-08-26 01:21:10 +08:00
Anner J. Bonilla
24e45d071e Pinephone Pro port just nsh
Pinephone Pro port just nsh

Status:
booting till GICD / IRQ issue

style cleanups

start to fix style checks

revert offset

whitespaces

revert a64 bringup file

prob last cleanup

more cleanups

remove dts

move changes from a64 hardware specific folders to rk3399

undo common changes (except head.s)

revert gitignore

missing irq.h and rk3399_serial.c need to finish cleaning them up

WIP

add source for load address

make debug print hex again add board include

Pinephone Pro port just nsh

Status:
booting till GICD / IRQ issue

style cleanups

start to fix style checks

revert offset

whitespaces

revert a64 bringup file

prob last cleanup

more cleanups

remove dts

move changes from a64 hardware specific folders to rk3399

undo common changes (except head.s)

revert gitignore

missing irq.h and rk3399_serial.c need to finish cleaning them up

WIP

add source for load address

remove ccache, add board memory map

remove board reset
2023-08-24 11:16:31 +08:00
cuiziwei
1a8027d625 nuttx/arch:add -Wno-psabi to Toolchain.defs
Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
2023-08-22 01:33:30 +08:00
qinwei1
630b5f32a2 arm64: IMX8 MEK board support
Summary

   Support for imx8qm MEK evaluate board

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-08-21 14:23:05 +08:00
qinwei1
30354e5767 arm64: IMX8 platform (Cortex-A53) support
Summary

   Support for imx8 platform, this is a very initialize version

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-08-21 14:23:05 +08:00
qinwei1
5b7267bf66 arm64: remove unnecessary trace interface
Summary
    this is a old implement for Arm64 trace but will failed
compile when enable CONFIG_SCHED_INSTRUMENTATION_SWITCH
    remove it since it will never use for trace framework

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-08-21 09:49:02 +08:00
hujun5
f1b6cf78da arch/arm: add CONFIG_ARCH_TRUSTZONE_SECURE to some code
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-08-21 00:06:25 +08:00
hujun5
a96c6f1abf arch/arm: Add the secure handling to gic
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-08-21 00:06:25 +08:00
Xiang Xiao
7bb563dfe9 arch/arm: Remove CONFIG_ARCH_TRUSTZONE_BOTH related stuff
represent tee by CONFIG_ARCH_TRUSTZONE_SECURE instead

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-08-21 00:06:25 +08:00
chenrun1
709301cbfd hostfs:support SEEK_CUR
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-08-19 01:48:48 +08:00
Xiang Xiao
14563aa48c arch/armv7r: Sync gic/timer with armv7-a and armv8-a
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-08-14 14:51:01 -03:00
Xiang Xiao
bd30d1a4d5 arch: Move trustzone related setting to common place
to share the security setting between arm32 and arm64

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-08-13 08:43:01 +02:00
wangming9
c928acc9ff perf: The new configuration supports hardware performance counting
Adding the CONFIG_ARCH_PERF_EVENTS configuration to enable
hardware performance counting,solve the problem that some platform
hardware counting support is not perfect, you can choose to use
software interface.

This is configured using CONFIG_ARCH_PERF_EVENTS, so weak_functions
are removed to prevent confusion

To use hardware performance counting, must:
1. Configure CONFIG_ARCH_PERF_EVENTS, default selection
2. Call up_perf_init for initialization

Signed-off-by: wangming9 <wangming9@xiaomi.com>
2023-08-12 02:20:44 +08:00