sergiotarxz/nuttx
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1403 Commits

Author SHA1 Message Date
Gregory Nutt
8b5833f7fe A consequence of Max's change to the logic to enable access to the backup domain is that every call to enabledbkp(true) must be followed by a matching call to enablebkp(false). There was one cse in both RTCC drivers where that may not always be true. 2016-08-09 11:33:47 -06:00
Gregory Nutt
5d91b8cabb With last change, stm32_pwr_enablebkp() no longer returns a value 2016-08-09 07:50:31 -06:00
Max Neklyudov
1e3ccbac12 Make stm32_pwr_enablebkp thread safe 2016-08-09 07:36:13 -06:00
Alan Carvalho de Assis
8499f42bf9 Add STM32F37XX DMA channel configuration 2016-08-08 13:29:53 -06:00
Alan Carvalho de Assis
fcf1ae7e05 stm32f37xx: Fix SYSCFG_EXTICR_PORTE defined twice 2016-08-08 12:59:29 -06:00
Alan Carvalho de Assis
834f058573 I'm using NuttX on STM32F373 and saw the config was missing SPI2 and 
SPI3, see datasheet:
www.st.com/resource/en/datasheet/stm32f373cc.pdf

I searched for other members of STM32F37XX family and they also have 3 SPIs:
http://www.st.com/content/st_com/en/search.html#q=STM32F37-t=keywords-page=1
 2016-08-08 12:25:15 -06:00
Gregory Nutt
6df28bc74e Make bit-order SPI H/W feature configurable for better error detection 2016-08-08 11:54:13 -06:00
Gregory Nutt
c3cfd37791 Fix cloned variable error in all SPI drivers 2016-08-08 11:04:01 -06:00
Gregory Nutt
2ae3953f9e STM32/EFM32: If any hardware feature other and LSBFIRST is selected, return -ENOSYS. 2016-08-08 10:37:28 -06:00
Gregory Nutt
7d4cb73bd6 STM32 and EFM32 SPI drivers adopted an incompatible conventions somewhere along the line. The set the number of bits to negative when calling SPI_SETBITS which had the magical side-effect of setting LSB first order of bit transmission. This is not only a hokey way to pass control information but is supported by no other SPI drivers. 
This change three things:  (1) It adds HWFEAT_LSBFIRST as a new H/W feature.  (2) It changes the implementations of SPI_SETBITS in the STM32 and EFM32 derivers so that negated bit numbers are simply errors and it adds the SPI_HWFEATURES method that can set the LSB bit order, and (3) It changes all calls with negative number of bits from all drivers: The number of bits is now always positive and SPI_HWFEATUREs is called with HWFEAT_LSBFIRST to set the bit order.
 2016-08-08 08:28:13 -06:00
Gregory Nutt
309480d0f9 Merge branch 'timekeeping' of bitbucket.org:nuttx/nuttx 2016-07-28 09:34:00 -06:00
Gregory Nutt
9b9b721406 Rename alarm_enable to rtc_alarm_enabled; mark inline 2016-07-23 12:01:57 -06:00
Gregory Nutt
5a0f9fcb7d Fix STM32 RTC Alarm interrupts. They were being enabled BEFORE the interrupt system was being initialized. 2016-07-23 10:36:06 -06:00
Gregory Nutt
14de4b99f8 Simplify some computations 2016-07-23 08:13:25 -06:00
Gregory Nutt
0984fcda44 Back out last RTC alarm changes. I am mistaken, the interrupts are enabled by stm32[l4]_exti_alarm(). 2016-07-23 07:53:08 -06:00
Gregory Nutt
829c5610da STM32 F4 RTC ALARM: Was not enabling interrupts. 2016-07-23 07:19:14 -06:00
Gregory Nutt
a2035f7efd Move include/nuttx/1wire.h to include/nuttx/drivers/1wire.h 2016-07-21 13:51:28 -06:00
Gregory Nutt
1b9b3a7b47 pwm.h moved from include/nuttx/ to include/nuttx/drivers. 2016-07-20 13:48:24 -06:00
Gregory Nutt
ddcaa3d425 can.h moved from include/nuttx/ to include/nuttx/drivers. 2016-07-20 13:38:36 -06:00
Gregory Nutt
4b4dbc79a2 Move driver related prototypes out of include/nuttx/fs/fs.h and into new include/drivers/drivers.h 2016-07-20 13:15:37 -06:00
Sagitta Li
e07bd757ba STM32 F107: TIM8 not supported in F105/F107 2016-07-20 08:51:03 -06:00
Gregory Nutt
2119c5ce19 Fix another function naming error 2016-07-18 12:40:27 -06:00
Gregory Nutt
d36da2b560 Fix bad dev[u]random_register() function return value. 2016-07-18 12:25:05 -06:00
Gregory Nutt
078bbe5e5c All H/W RNG Drivers: Can now be configured to register as /dev/random and/or /dev/urandom 2016-07-18 11:10:37 -06:00
Gregory Nutt
1660329d06 Rename up_rnginitialize to devrandom_register 2016-07-18 10:55:37 -06:00
Pierre-noel Bouteville
76f12b1f69 I'm using syslog through ITM. In this case syslog_channel function is call before ram initialisation in stm32_clockconfig. But syslog channel uses a global variable that is reset to default by the RAM initialization. 2016-07-14 07:29:39 -06:00
Gregory Nutt
beaca7a17f Merge remote-tracking branch 'origin/master' into timekeeping 2016-07-13 10:22:38 -06:00
Max Neklyudov
067f63fc18 STM32: Fix bug in oneshot timer 2016-07-13 10:20:38 -06:00
Gregory Nutt
fb1855244e STM32 timer: Eliminate a warning 2016-07-11 13:13:17 -06:00
Gregory Nutt
246773faa7 Rename CONFIG_SCHED_TIMEKEEPING to CONFIG_CLOCK_TIMEKEEPING. That is a better compartmentalized name. 2016-07-11 06:54:02 -06:00
Max Neklyudov
8db29071da timekeeping: initial implementation 2016-07-10 16:14:25 -06:00
Gregory Nutt
c16500dfdb STM32 timer. More clean up: Add all function prototypes. Reorder functions to match ordering in operations structure. 2016-07-06 14:24:59 -06:00
Gregory Nutt
7c568f249a STM32: Various fixed to get a clean compile after integrating tickless mode. Mostly because patch came from an old version of NuttX. 2016-07-06 13:37:08 -06:00
Gregory Nutt
711f3318c5 STM32 timer: Reorganize to conform better with the NuttX coding style 2016-07-06 13:36:17 -06:00
Max Neklyudov
d8286a7f47 STM32: Add support for Tickless mode (two timer implementation) 2016-07-06 12:48:30 -06:00
Paul A. Patience
20c611c12b STM32 CAN: Bitfield definitions should be unsigned 
Shifting 1 by 31 is undefined behaviour because 1 is signed.
We should probably use 1ul instead of 1 everywhere else,
but for now this silences a compiler warning.
 2016-06-29 13:59:33 -04:00
Paul A. Patience
52a4a20efb STM32L4 CAN: Port support for both RX FIFOs from STM32 CAN 2016-06-29 13:59:29 -04:00
Gregory Nutt
6aa067e929 Mostly costmetic changes from review of last PR 2016-06-29 07:33:30 -06:00
David Sidrane
eacd672ab0 STM32 BBSRAM fixed (and formated) flags 2016-06-28 16:25:04 -10:00
Gregory Nutt
c40c107e7a STM32 F4 RTC: Fix some long lines 2016-06-28 16:55:06 -06:00
Gregory Nutt
a43da4d107 STM32 CAN: Clone missing stm32_enterinitmode() and _exitinitmode() from STM32L4. Don't know if this is write but is needed to compile. 2016-06-28 14:35:49 -06:00
Paul A. Patience
a4d5845887 efm32, lcp43, stm32, stm32l4: disable interrupts with NVIC_IRQ_CLEAR 2016-06-28 15:12:39 -04:00
Gregory Nutt
8e26d4c8e0 STM32 CAN: More fixes for compilation errors due to blind leverage of STM32L4 CAN filter IOCTLs to STM32 2016-06-27 15:16:13 -06:00
Gregory Nutt
1b5bef5325 STM32 CAN: Fix an error when filter methods were ported from STM32L4 2016-06-27 11:15:37 -06:00
Gregory Nutt
ea8760eb19 Cosmetic changes from review of last PR 2016-06-24 07:20:04 -06:00
Sebastien Lorquet
d3441668ee Port STM32L4 CAN IOCTLs to STM32 2016-06-24 11:53:17 +02:00
Sebastien Lorquet
6de8dba383 Preliminary rename of stm32 can driver functions 2016-06-24 11:29:31 +02:00
Sebastien Lorquet
8b1a607671 Here is a patch to 
-remove a wrong comment in atmel mcan ioctl
-add ioctls to set/get bit timing in stm32l4
-add ioctl hooks to allow future management of can id filters.
 2016-06-21 06:21:54 -06:00
Gregory Nutt
2a751068e6 Without lowsyslog() *llerr() is not useful. Eliminate and replace with *err(). 2016-06-20 12:44:38 -06:00
Gregory Nutt
43eb04bb8f Without lowsyslog() *llinfo() is not useful. Eliminate and replace with *info(). 2016-06-20 11:59:15 -06:00