Commit Graph

1636 Commits

Author SHA1 Message Date
ligd
3844efb5b8 stack: update up_get_intstackbase API to support cpu id
For crash dump all the CPU intstack

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-04-09 16:59:00 -03:00
simbit18
9967989b02 Fix Kconfig style
Remove spaces from Kconfig files
Remove TABs
Add comments
2024-04-09 10:49:23 +08:00
chenwen@espressif.com
5b83af1607 xtensa/esp32s3: Fix duplicate definition warnings
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-04-03 23:12:43 +02:00
Tiago Medicci Serrano
9520edeb16 espressif/rmt: Fix minor issues regarding formatting and comments
This commit only fix minor issues regarding formatting and comments
2024-04-02 14:50:59 -03:00
Tiago Medicci Serrano
5ba40d083a esp32/rmt: Use the Espressif`s common RMT driver.
This commit implements the common RMT driver (already available for
the other Espressif's xtensa-based devices) for ESP32.
This allows us to have a proper separation between the lower and
upper-half drivers and use the 'ws2812' example to drive WS2812 RGB
LEDs.
2024-04-02 14:50:59 -03:00
Tiago Medicci Serrano
6b73782c27 esp32: Remove outdated/unnecessary code
These functions are no more used directly by NuttX. There is no
need to keep them.
2024-04-02 14:50:59 -03:00
Tiago Medicci Serrano
4b3b22cbeb esp32/rmt: Remove outdated RMT driver
The new common RMT driver - already available for ESP32-S2 and
ESP32-S3 - will be implemented in another commit for ESP32.
2024-03-29 16:14:27 +08:00
Tiago Medicci Serrano
573e1a255f esp32s3/[ble/wifi]: Improve code compatibility between SoCs
Introduces a couple of minor changes to make it easier to keep the
code update between different Espressif's SoCs.
2024-03-29 16:14:27 +08:00
Tiago Medicci Serrano
2f8e0c7fd4 esp32s3/ble: Rearrange types, data and functions order
This commit just rearranges the order of the types, data and
functions without modifying them. This is done to make it look more
similar with ESP32's ble adapter and ease maintanence.
2024-03-29 16:14:27 +08:00
Tiago Medicci Serrano
62fbb7f03a esp32s3/ble: Update the name of the interrupt status flags
In order to avoid confusion with other interrupt status flags used
by the system and the common source, rename it to be more specific.
2024-03-29 16:14:27 +08:00
Tiago Medicci Serrano
c07f8ab312 esp32s3: use common espressif code instead of chip-specific.
Most of the functions used to set the peripherals are available for
all Espressif's chips. This commit uses this set of functions and
remove outdated functions that perform the same operations in a
chip level.
2024-03-29 16:14:27 +08:00
Tiago Medicci Serrano
09464ff9bc esp32/[ble/wifi]: Update the wireless drivers
This commit updates the Wi-Fi and the BLE driver of ESP32. Most of
the changes rely on using the common sources and header files for
xtensa-based Espressif's SoCs.

The new Wi-Fi driver supports WPA3-SAE for both Station and SoftAP
mode. BLE's coexistence mode was enhanced according to the latest
libraries.

Please note that other sources required minor changes in order to
be compatible with the common sources.
2024-03-29 16:14:27 +08:00
Tiago Medicci Serrano
007dd34ce8 esp32s3/spiflash: Fix error to pause the other CPU during operation
Whenever a SPI flash operation will take place, it's necessary to
disable the cache and run no code from the flash. This includes
pausing the other CPU (when `CONFIG_SMP=y`). This commit prevents
an error to occur when the CPU core is evaluated before the task
is increased to the max priority.
2024-03-29 16:14:27 +08:00
Tiago Medicci Serrano
78fbc2fc64 esp32/spiflash: Fix error to pause the other CPU during operation
Whenever a SPI flash operation will take place, it's necessary to
disable the cache and run no code from the flash. This includes
pausing the other CPU (when `CONFIG_SMP=y`). This commit prevents
an error to occur when the CPU core is evaluated before the task
is increased to the max priority.
2024-03-29 16:14:27 +08:00
chenwen@espressif.com
ffc7442af2 xtensa/esp32s3: Add ESP32-S3 AES driver
1. Support AES-128/AES-256 encryption and decryption

Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-03-28 09:34:04 +08:00
chenwen@espressif.com
2911c3aed6 xtensa/esp32s3: Add 16-byte-align SPI-Flash encryption write
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-03-27 17:10:32 +08:00
Dong Heng
397396c587 xtensa/esp32s3: Fix one page program span over 2 pages
One page program can't span over 2 pages.
2024-03-27 17:08:17 +08:00
Tiago Medicci Serrano
075b0e5ac0 esp32s2: Update libc stubs to properly acquire/release locks.
Avoid using static mutex and recursive mutex as the resource to be
acquired/release. Instead, create a specific lock for each call if
it does not exist.
2024-03-26 13:53:39 -03:00
Tiago Medicci Serrano
d56e6de628 esp32: Update libc stubs to properly acquire/release locks.
Avoid using static mutex and recursive mutex as the resource to be
acquired/release. Instead, create a specific lock for each call if
it does not exist.
2024-03-26 13:53:39 -03:00
Tiago Medicci Serrano
44e2e9011f esp32s3: Update libc stubs to properly acquire/release locks.
Avoid using static mutex and recursive mutex as the resource to be
acquired/release. Instead, create a specific lock for each call if
it does not exist.
2024-03-26 13:53:39 -03:00
simbit18
ac2021b906 Fix Kconfig style
Replace help => ---help---
Remove spaces from Kconfig
Add comments
2024-03-21 22:28:49 +08:00
Marco Casaroli
d048caf1d2 arch/esp32 add openeth mac driver
This driver is used with QEMU, to make it possible
to use networking.

This is not the MAC in ESP32, however, it can be used with QEMU.

The code was shamelessly copied from 31dac92e5f
2024-03-12 08:31:06 -03:00
chenwen@espressif.com
277ca97b44 xtensa/esp32: Fix wrong interrupt number
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-03-12 14:36:50 +08:00
Xiang Xiao
64ea027b1a Replace PRIxPTR with %p and remove the cast of (uintptr_t)
The cast of (uintptr_t) is not necessary, and it is better to use %p

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-03-07 09:59:42 -03:00
chenwen@espressif.com
53f50c8183 xtensa/esp32s3: Configure DMA maximum buffer size based on access to different RAM
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-03-07 13:32:28 +08:00
chenwen@espressif.com
09960c5c7d xtensa/esp32s3: Fix the issue of erasing a wide range of flash sectors
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-03-06 18:13:20 +08:00
Yanfeng Liu
a66c7c3ee1 comments/docs: fix typos in comments
This fix some typos in comments.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-03-06 13:31:50 +08:00
trns1997
54e9e582d5 Use C++ standard lib from toolchain
Signed-off-by: trns1997 <trns1997@gmail.com>
2024-03-06 08:42:44 +08:00
Marco Casaroli
73c4f2f1e7 fix(esp32s3_spiflash_mtd): debug type specifiers
These log messages are wrong if we use CONFIG_FS_LARGEFILE.
2024-03-05 22:23:50 +08:00
Marco Casaroli
0c50af583d feat(esp32s3-bootloader): allow 32MB flash
The scripts already support, we are just
missing the entry in the config.
2024-03-01 16:51:47 -03:00
Marco Casaroli
447cc9698f use apps-or-nuttx-Make.defs for archs
This will allow apps to tweak build configuration of NuttX
2024-03-01 12:59:16 -03:00
ligd
2241969e5a SMP: fix crash when switch to new task which is still running
cpu0 thread0:                        cpu1:
sched_yield()
nxsched_set_priority()
nxsched_running_setpriority()
nxsched_reprioritize_rtr()
nxsched_add_readytorun()
up_cpu_pause()
                                     IRQ enter
                                     arm64_pause_handler()
                                     enter_critical_section() begin
                                     up_cpu_paused() pick thread0
                                     arm64_restorestate() set thread0 tcb->xcp.regs to CURRENT_REGS
up_switch_context()
  thread0 -> thread1
arm64_syscall()
    case SYS_switch_context
     change thread0 tcb->xcp.regs
    restore_critical_section()
                                     enter_critical_section() done
                                     leave_critical_section()
                                     IRQ leave with restore CURRENT_REGS
                                     ERROR !!!

Reason:
As descript above, cpu0 swith task: thread0 -> thread1, and the
syscall() execute slowly, this time cpu1 pick thread0 to run at
up_cpu_paused(). Then cpu0 syscall execute, cpu1 IRQ leave error.

Resolve:
Move arm64_restorestate() after enter_critical_section() done

This is a continued fix with:
https://github.com/apache/nuttx/pull/6833

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-01 21:05:00 +09:00
Tiago Medicci Serrano
b03c9cf5f8 esp32s3: Fix symbol collision between mbedTLS and the Wi-Fi driver
This commit closes #11738. Actual fix is tracked in:
https://github.com/espressif/esp-hal-3rdparty/pull/2
2024-02-29 20:47:19 +01:00
chao an
6d50274ebe nuttx/list: rename container_of to list_container_of from public header
Use private naming to avoid conflicts with user applications

In file included from libuv/src/unix/internal.h:25,
                 from libuv/src/unix/udp.c:23:
libuv/src/uv-common.h:57: warning: "container_of" redefined
   57 | #define container_of(ptr, type, member) \
      |
In file included from nuttx/include/nuttx/list.h:47,
                 from nuttx/include/nuttx/tls.h:40,
                 from nuttx/include/nuttx/sched.h:48,
                 from nuttx/include/nuttx/arch.h:87,
                 from nuttx/include/nuttx/userspace.h:35,
                 from nuttx/include/nuttx/mm/mm.h:30,
                 from nuttx/include/nuttx/kmalloc.h:34,
                 from nuttx/include/nuttx/lib/lib.h:31,
                 from nuttx/include/stdio.h:35,
                 from apps/system/libuv/libuv/include/uv.h:59,
                 from libuv/src/unix/udp.c:22:
nuttx/include/nuttx/nuttx.h:48: note: this is the location of the previous definition
   48 | #define container_of(ptr, type, member) \
      |

Signed-off-by: chao an <anchao@lixiang.com>
2024-02-29 19:44:54 +08:00
chenwen@espressif.com
1665114fd1 xtensa/esp32: Fix issue of system blocking when SPIRAM is used as stack
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-02-28 13:31:30 +08:00
chenwen@espressif.com
c14888e759 xtensa/esp32s3: Add the return value of SPI driver
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-02-28 13:30:18 +08:00
chenwen@espressif.com
638df3329b xtensa/esp32s3: Fix issue of system blocking when SPIRAM is used as stack
1. Fix issue of system blocking due to disable dcache.
   2. Support Ext-SRAM-Cache mmu mapping in SMP mode.

Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-02-26 12:38:30 -03:00
nuttxs
d2b4734756 Deinitialize ESP32-S3 SPI slave GDMA engine 2024-02-22 04:34:29 -08:00
simonatoaca
bb6f32d610 esp32-sparrow-kit: Add I2S support for the board's microphone
The board's microphone uses 24-bit i2s and this commit also fixes
the segmentation fault caused by the audio buffer overflow.

arch/xtensa/src/esp32/esp32_i2s.c: Fix bug regarding 24-bit audio and add AUDIOIOC_STOP to ioctl
drivers/audio/audio_i2s.c: Report number of channels on AUDIOIOC_GETCAPS
in boards/xtensa/esp32/esp32-sparrow-kit:
	/configs/nsh/defconfig: Add I2S configs
	/src/esp32-sparrow-kit.h: Add the signature of esp32_i2sdev_initialize()
	/src/esp32_bringup.c: Add call to esp32_i2sdev_initialize()

Signed-off-by: simonatoaca <simona.alexandra2000@gmail.com>
2024-02-20 06:46:06 -08:00
Tiago Medicci Serrano
62a608b558 xtensa/esp_ws2812: Get actual RMT clock to encode WS2812 data
WS2812 data is encoded into RMT items according to the RMT clock
source. This commit makes it by using the actual clock source in
spite of a pre-defind value.
2024-02-19 19:02:34 -08:00
Eren Terzioglu
de948babbf xtensa/esp32s2: Fix esp32s2 wdt interrupt bug 2024-02-13 10:31:35 -03:00
Tomáš Pilný
3e85c1886e esp32/dac-one-shot: lower-half driver for ESP32 internal DAC
Enable with ./tools/configure.sh -l esp32-devkitc:dac
DAC channel 0 = GPIO 25
DAC channel 1 = GPIO 26
default path: /dev/dac0

Resolution 8 bits = values 0~255
Voltage: 0~Vref

The reference voltage 'Vref' here is input from the pin VDD3P3_RTC
which ideally equals to the power supply VDD (3.3V).
2024-02-02 09:23:28 -08:00
chenwen@espressif.com
ba1b96e9d9 xtensa/esp32s3: Add DMA peripheral to spi driver configuration
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-01-26 19:14:04 -08:00
chenwen@espressif.com
8bef8ee9d5 xtensa/esp32s3: Fix crash issue that occurs when deleting a semaphore in WPA3
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-01-26 04:45:26 -08:00
Tiago Medicci Serrano
641a0df27f esp32s3: Improve selection of the bootloader being used on Kconfig
- A pre-built IDF bootloader is used by default;
- `ESP32S3_PARTITION_TABLE` requires the IDF bootloader to be built
from sources.
- Native MCUboot also can be used to boot the device. It will be
built from sources and depends on !ESP32S3_PARTITION_TABLE.
2024-01-25 11:22:39 -03:00
Tiago Medicci Serrano
1e1ea7bb5d esp32s2: Improve selection of the bootloader being used on Kconfig
- A pre-built IDF bootloader is used by default;
- `ESP32S2_PARTITION_TABLE` requires the IDF bootloader to be built
from sources.
- Native MCUboot also can be used to boot the device. It will be
built from sources and depends on !ESP32S2_PARTITION_TABLE.
2024-01-25 11:22:39 -03:00
Tiago Medicci Serrano
ec3714c816 esp32: Improve selection of the bootloader being used on Kconfig
- A pre-built IDF bootloader is used by default;
- `ESP32_PARTITION_TABLE` requires the IDF bootloader to be built
from sources.
- Native MCUboot also can be used to boot the device. It will be
built from sources and depends on !ESP32_PARTITION_TABLE.
2024-01-25 11:22:39 -03:00
chenwen@espressif.com
bdd02cc624 xtensa/esp32s3: Add APIs to release DMA channel resources
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-01-23 17:16:16 -03:00
w2016561536
6b5ca79509 esp32s3/spi-dma: Fix spi dma transfer.
Fix esp32s3 spi dma transfer only transmit first byte and receive empty problem.
2024-01-23 04:05:52 -08:00
Tiago Medicci Serrano
0ecc3aaad2 esp32: Explicitly fail on boot-up for unsupported ESP32 versions.
ESP32 is supported on NuttX starting from chip revision 3.0. This,
however, didn't prevent the user from using older chip revisions,
which caused unexpected behaviors. This commit checks chip revision
before finishing booting NuttX.
2024-01-21 06:33:25 -08:00
Tiago Medicci Serrano
2954551ef6 esp32/hardware/esp32_efuse.h: Update macros for registers.
This commit is intended to update the EFUSE's register content and
update related configs:
 - Remove duplicated configs from `esp32_soc.h`;
 - Add missing header files from APB registers;
 - Add missing macro definitions from EFUSE;
 - Update related code to use the new macros;
2024-01-21 06:33:25 -08:00
Tiago Medicci Serrano
8752e6d863 esp32/hardware: Rename efuse_reg.h to esp32_efuse.h. 2024-01-21 06:33:25 -08:00
Dong Heng
85238fa4de xtensa/esp32s3: Fix USB pull-up and pull-down issue
ESP32-S3 USB OTG device can't call function esp32s3_pullup to notify USB host that it connects or disconnects.
2024-01-18 17:53:16 -08:00
w2016561536
829ec6d5e4 esp32s3/pwm: Fix pwm output
1. Fix pwm output always low problem.
2. Add multi channel support in defconfig
2024-01-17 22:42:08 -03:00
Yanfeng Liu
1e9434e2db arch/: remove duplicated task exit logs
Newly added logging in `sched/task_exit.c` obsoletes the existing
ones in `arch/up_exit()`, thus remove the latter to reduce duplications.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-17 09:18:17 -08:00
w2016561536
6a0eeb1b3e esp32s3/spi: Add SPI bus init in bringup and fix SPI bus 2 and 3 conflict
1. Add spi bus init in esp32s3_bringup.c
2. Fix IOMUX conflict between spi bus 2 and 3
3. Add spi defconfig
4. Follow the standard of NuttX
2024-01-17 09:29:20 -03:00
Tiago Medicci Serrano
8fb05d44bc esp32s3/wifi: Fix Wi-Fi connection to WPA3-SAE APs.
This commit fix the connection issues while trying to connect to
WPA3-SAE-secured Access Points (APs).
2024-01-12 16:57:49 +01:00
chenwen@espressif.com
b739b2b18a xtensa/esp32s3: Support WPA3 on softap mode
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2024-01-12 13:41:58 +08:00
chenwen@espressif.com
a774587088 esp32s3/rt_timer: Adjust spinlock position to avoid deadlock 2024-01-11 09:22:52 +09:00
Tiago Medicci Serrano
823a183c17 esp32s3/rt_timer: Fix deadlock on RT-Timer thread.
The RT-Timer thread may call the `start_rt_timer` function. This
function gets the spinlock with interrupts disabled to ensure
exclusive access. However, this was already being performed in the
RT-Timer thread, causing a deadlock.
2024-01-11 09:22:52 +09:00
Roy Feng
4761af7069 esp32[s2|s3] Following up update interrupt type constants.
Following up the 'Espressif HAL fullly integration for ESP32s2/s3'
changes in https://github.com/apache/nuttx/pull/11428
There are few missing interrupt type constants need update. So
update them to avoid the build error.
2024-01-10 09:54:55 -08:00
yinshengkai
9d436b624b tools: support sorting symbol tables by name
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-01-04 09:22:57 -08:00
Tiago Medicci Serrano
6234224325 esp32s2: Integrate Espressif HAL repository to ESP32-S2
By integrating the Espressif`s HAL repository into the current
ESP32-S2 implementation on NuttX, it is possible to call functions
that makes it easier to setup the registers of the ESP32-S2,
enabling the usage of common Espressif drivers.
2023-12-24 16:38:06 -08:00
Tiago Medicci Serrano
1ca460c89a esp32s3: Fully integrate Espressif HAL repository to ESP32-S3
By integrating the Espressif`s HAL repository into the current
ESP32-S3 implementation on NuttX, it is possible to call functions
that make it easier to set up the registers of the ESP32-S3 and
enables the usage of common Espressif drivers. Please note that
Espressif's HAL repository was already being used for the Wi-Fi
driver. Then, this commit includes other source files to be used
by other drivers other than Wi-Fi and reorganize the build process.
2023-12-24 16:38:06 -08:00
Tiago Medicci Serrano
cb80365daa xtensa/esp/ws2812: Add the lower-half WS2812 driver based on RMT
This lower-half WS2812 LED driver uses the RMT peripheral of the
Espressif's SoCs to drive the RGB addressable LEDs. Compared to
the SPI-based implementation, it is faster!
2023-12-24 16:38:06 -08:00
Tiago Medicci Serrano
69929d4084 xtensa/esp/rmt: Add the lower-half implementation of the RMT driver
The lower-half implementation of the RMT character driver based on
Espressif HAL enables using the RMT peripheral of ESP32, ESP32-S2
and ESP32-S3 as a common xtensa-based Espressif driver.

The RMT packages on Espressif SoCs are 4-byte long and are known as
"items". Please check the Techinal Reference Manual of the chip to
obtain more details.
2023-12-24 16:38:06 -08:00
Eren Terzioglu
c15392d9b7 xtensa/esp32s2: Add xtwdt and rwdt support 2023-12-22 03:59:18 -08:00
Tiago Medicci Serrano
daec4cf408 espressif/mcuboot: Fix dependency of the Espressif's port MCUboot.
If the MCUboot (from nuttx-apps) is selected, the Espressif's port
of the MCUboot is not used as the 2nd stage bootloader.
2023-12-22 17:27:58 +08:00
chenwen@espressif.com
2cb14c55f0 xtensa/esp32s3: Support reading encrypted partitions
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2023-12-22 17:27:32 +08:00
chenwen@espressif.com
0810fc45b7 xtensa/esp32s3: Fixed bbpll not calibrated from bootloader issue
1. Solve wifi may not work bug for bbpll not lock or not stable when enable RF.
  2. Improved timing tuning stability on ESP32-S3.
  The root cause of the issue:
	The application won't re-calibrate the BBPLL clock if it's already enabled.
	We add a force-recalib function in the app startup code to make sure even if
	the patch is applied by OTA, the clock is still re-calibrated.

Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2023-12-19 22:53:28 -08:00
Zhe Weng
5aeb15469a netdev/ipv6: Move xxx_ipv6multicast from arch to common code
The `xxx_ipv6multicast` function in each driver is not adapted to
multiple IPv6 addresses yet, and they're redundant, so try to take them
into common code.

Change:
1. Add MAC `g_ipv6_ethallnodes` and `g_ipv6_ethallrouters` in
   `icmpv6_devinit` and call them in `netdev_register`
2. Add multicast MAC for Neighbor Solicitation when adding any IPv6
   address, and remove them when IPv6 address is removed
3. Select `NET_MCASTGROUP` when `NET_ICMPv6` because now we need
   `d_addmac` when we have ICMPv6

Note:
We want modules outside net stack to call functions like
`netdev_ipv6_add` and never touch the related MAC address, so these MAC
functions are added as internal functions to `net/netdev/netdev.h`

Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
2023-12-16 05:26:16 -08:00
liqinhui
98e3615b60 net/netdev: Modify the logic for setting the IFF_RUNNING status of interfaces.
Refer to the logic of the `netif_carrier_on` on linux.
https://github.com/torvalds/linux/blob/master/net/sched/sch_generic.c#L575

Signed-off-by: liqinhui <liqinhui@xiaomi.com>
2023-12-15 18:24:23 -08:00
simbit18
c494ce4a96 Update kconfig2html.c
Fix nuttx coding style
2023-12-14 20:02:52 -08:00
simbit18
9d50d180b1 Fix nuttx coding style
Remove spaces
Remove extra */
2023-12-13 17:29:08 +01:00
chenwen@espressif.com
62a6a0ab4d xtensa/esp32s3: Tasks use SPIRAM as stack can do SPI flash read/write/erase/map/unmap
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2023-12-12 22:10:38 -08:00
Xiang Xiao
ca5a9c711a Remove @ and % tag from all comments
and format the multiple line comments

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-11 17:00:10 -03:00
anjiahao
94d449e722 arch:Mark key functions to prohibit instrumentation to prevent recursive calls
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-12-11 02:06:51 -08:00
anjiahao
7dfbd14eba libc: add instrument api support
Add registration function instrumentation API,
which can achieve instrumentation of entering and
exiting functions through the compiler's functionality.

We can use CONFIG_ARCH_INSTRUMENT_ALL to add instrumentation for all
source, or add '-finstrument-functions' to CFLAGS for Part of the
source.

Notice:
1. use CONFIG_ARCH_INSTRUMENT_ALL must mark _start or entry noinstrument_function,
   becuase bss not set.
2. Make sure your callbacks are not instrumented recursively.

use instrument_register to register entry function and exit function.
They will be called by the instrumented function

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-12-11 02:06:51 -08:00
Petteri Aimonen
dedb563322 usbdev: Add architecture calls to usbdev_sof_irq() 2023-12-08 21:27:36 -03:00
YAMAMOTO Takashi
8930aae423 esp32s3_partition.h: fix typos (S3S3 -> S3) 2023-12-07 03:08:24 -08:00
YAMAMOTO Takashi
c079b82c37 esp32s3: remove an extra S from ESP32S3S_SPI_FLASH_USE_32BIT_ADDRESS 2023-12-07 03:07:37 -08:00
YAMAMOTO Takashi
a59a4ca8ea esp32s3: enable LIBC_ARCH_ATOMIC
Fixes toywasm build.
2023-12-06 21:10:20 +01:00
Dong Heng
8c9e9b628c xtensa/esp32s3: GPIO clear pending interrupt status before enable IRQ 2023-12-06 02:30:58 -08:00
Dong Heng
d9b543e465 xtensa/esp32s3: QSPI disable DMA when sending command to slave 2023-12-06 02:30:03 -08:00
simbit18
ccc0c54401 Fix Kconfig style
Remove extra TABs
Remove spaces from Kconfig
Add comments
2023-12-04 22:20:50 +08:00
Eren Terzioglu
5b19d8b2cb xtensa/esp32s2: Add RTC support 2023-11-30 21:02:12 -03:00
chenwen@espressif.com
53beaf1a67 xtensa/esp32s3: Add SPIRAM high memory support
1. Configurable mapping of virtual address to psram physical address
  2. Access SPIRAM memory at high physical address through bank switching

Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2023-11-29 06:33:51 -08:00
chenwen@espressif.com
e2a82f008a xtensa/esp32s3: Invalidate cache if the flash address used has a cache mapping.
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2023-11-29 03:57:50 -08:00
chenwen@espressif.com
54b71de23a xtensa/esp32s3: Fix some ESP32S3 module reboot and QVL issues
1. Increase the data length in timing tuning.
2. Add MSPI Error-Correcting Code function when accessing SPIRAM.
3. Add delay before timing tuning.
2023-11-29 01:51:58 -08:00
Eren Terzioglu
438cb4a16a xtensa/esp32s3: Add rtc heap support 2023-11-23 16:49:48 -08:00
anjiahao
749655d785 tcbinfo:remove total_num form tcbinfo.
total_num is not required
test:

make -f tools/Makefile.host
cp tools/jlink-nuttx /opt/SEGGER/JLink_V786a/libnuttxplugin.so
JLinkGDBServer -if SWD -speed 5000 -device STM32F429ZI -NoGui 1 -rtos libnuttxplugin

can run normally

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-11-21 21:52:24 -08:00
chao an
64cf63475c arch/dumponexit: unify dump on exit to common code
remove arch implement and move to common code

Signed-off-by: chao an <anchao@xiaomi.com>
2023-11-15 08:28:25 -08:00
Eren Terzioglu
4033018a72 xtensa/esp32s3: Add XTWDT support 2023-11-14 19:42:33 -03:00
Eren Terzioglu
d92a7011fd xtensa/esp32s3: Add RWDT support 2023-11-13 21:04:30 -03:00
chenwen@espressif.com
b6e09955dd xtensa/esp32s3: Support multiple PHY init data bin
1. If CONFIG_ESP32S3_PHY_INIT_DATA_IN_PARTITION and CONFIG_ESP32S3_SUPPORT_MULTIPLE_PHY_INIT_DATA are enabled,
PHY initialization data (PHY initialization data is used for RF calibration) will be loaded from a partition.

2. The corresponding PHY init data type can be automatically switched according to the country code,
China's PHY init data bin is used by default, country code can be modified through the wapi command: wapi country <ifname> <country code>.

Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2023-11-10 15:55:14 -03:00
chenwen@espressif.com
cc10c54f6c xtensa/esp32s3: Support partition and OTA device
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2023-11-10 15:55:14 -03:00
Tiago Medicci Serrano
18718316dc esp32/ble: enable the BLE interrupt during a SPI flash operation
This commit sets the BLE's interrupt as a IRAM-enabled interrupt,
which enables it to run during a SPI flash operation. This enables
us to create a cache to off-load semaphores and message queues
operations and treat them when the SPI flash operation is finished.
By doing that, we avoid packet losses during a SPI flash operation.
2023-11-10 09:11:35 +08:00
Tiago Medicci Serrano
f94daf09b2 esp32s3/spiflash: Fix comment and remove unused variable 2023-11-10 09:11:35 +08:00
Tiago Medicci Serrano
b25793ebac esp32/spiflash: Make it similar to ESP32-S3 by removing cache state 2023-11-10 09:11:35 +08:00
Tiago Medicci Serrano
57b8fc9954 esp32/irq: Allow IRAM ISRs to run during SPI flash operation
This commit provides an interface to register ISRs that run from
IRAM and keeps track of the non-IRAM interrupts. It enables, for
instance, to avoid disabling all the interrupts during a SPI flash
operation: IRAM-enabled ISRs are, then, able to run during these
operations.

It also makes the code look more similar to the ESP32-S3 SPI flash
implementation by creating a common `esp32_spiflash_init` that is
responsible to create the SPI flash operation tasks. The function
intended to initialize the SPI flash partions was, then, renamed to
`board_spiflash_init`.
2023-11-10 09:11:35 +08:00