Commit Graph

18909 Commits

Author SHA1 Message Date
Gustavo Henrique Nihei
7ede285cfe xtensa/esp32s3: Add support for RT-Timer based on Systimer peripheral
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-12 15:27:30 +02:00
Gustavo Henrique Nihei
86b18bd6e9 xtensa/esp32s3: Move code documentation to the correct place
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-12 11:53:14 +08:00
Gustavo Henrique Nihei
a4db4031c9 xtensa/esp32s3: Stall Systimer when core 1 is temporarily stalled
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-12 11:53:14 +08:00
Xiang Xiao
39fb09738d arch: Move [arm|xtensa]_intstack_[alloc|top] to common header file
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-11 23:08:07 +02:00
Xiang Xiao
17d1a48fc9 arch: Remove up_puts prototype from up_inernal.h
since it's defined in include/nuttx/arch.h now

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-11 23:08:07 +02:00
Jukka Laitinen
d9607f71d2 Revert "arch/risc-v: Correct FPU register save area in riscv_copystate"
This reverts commit 86358bff3bc814efb564a4427b4bcd6c3c91dbf0.
2022-03-11 23:43:41 +08:00
Petro Karashchenko
fc9e2d272e arch/arm/arm[-a|-r]: fix typos in comments
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-03-11 11:08:01 +08:00
Gustavo Henrique Nihei
c8796c1bc2 xtensa/esp32s3: Move SPI RAM configuration out of Peripheral menu
Menu for configuration of SPI RAM was wrongly placed inside the menu
for peripheral selection.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-11 11:05:24 +08:00
Abdelatif Guettouche
f0a5777a26 xtensa_swint.c: Restore the coprocessor state at the end for consistency.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-11 02:23:09 +02:00
Abdelatif Guettouche
7c57739d1d xtensa_exit.c: Co-processor state is restored as part of the
SYS_Restore_context call, no need to call it separately.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-11 02:23:09 +02:00
Abdelatif Guettouche
71ba4a6b76 arch/xtensa: Use the software interrupt when saving context too.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-11 02:23:09 +02:00
Abdelatif Guettouche
329db99e51 arch/xtensa: Use rsync around manipulating interrupt registers and
replace `isync` by `rsync` in other places.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-11 02:23:09 +02:00
Jukka Laitinen
81a19c1ce8 arch/riscv/src/mpfs: Make cleaner pinmux configurations for USB
Mux USB IO pins one-by-one using package specific pinmux definitions. This avoids accidentally overwriting IO settings for other pins.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-03-11 00:22:43 +02:00
Xiang Xiao
c0f3ac97bc arch/risc-v: Update opensbi to 4998a712b2ab504eff306110879ee05af6050177
include theis commit:
commit 6ad8917b7e27e5e80fb9268492b9111b17ed2024
Author: Petro Karashchenko <petro.karashchenko@gmail.com>
Date:   Fri Jan 28 09:13:23 2022 +0200

    lib: fix compilation when strings.h is included

    In a systems that provide strings.h and it is included
    together with sbi_bitops.h the compilation error appears.
    The ffs() and fls() are provided by strings.h

    Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
    Reviewed-by: Anup Patel <anup@brainfault.org>

and fix this warning:
Error: include/sbi/sbi_bitops.h:47:19: declaration of 'ffs' shadows a built-in function
 static inline int ffs(int x)
                   ^~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-10 19:46:01 +02:00
Xiang Xiao
29cb85ba17 arch/stm32: Fix compiler warning
chip/stm32_i2s.c:1949:12: error: conflicting types for built-in function 'roundf'; expected 'float(float)' [-Werror=builtin-declaration-mismatch]
 1949 | static int roundf(float num)
      |            ^~~~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-10 19:46:01 +02:00
Xiang Xiao
a07dc2363e c5471/c5471_irq.c: Fix error: '__builtin_memcpy' forming offset [4, 31] is out of the bounds [0, 4] of object '_svectors' with type 'int'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-10 19:46:01 +02:00
Huang Qi
8267a76186 arch/risc-v: Implement SYS_save_context in swint
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-10 16:11:14 +08:00
Huang Qi
7022c630fe arch/risc-v: Correct FPU register save area in riscv_copystate
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-10 16:11:14 +08:00
Alan C. Assis
dc1b6776b9 xtensa/esp32s3: Add SPI RAM/PSRAM Support 2022-03-09 19:22:56 +02:00
Huang Qi
69cfe8d626 arch/arm: Support setjmp/longjmp for all socs
After check the official specification of ARM ISA
and Thumb ISA, the arch_setjmp_thumb.S are written
by arm unified assembly language,
so it easy to make it works for ARM and thumb ISA.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-09 17:13:21 +02:00
Eero Nurkkala
a21a396bd8 risc-v/mpfs: usb: apply review fixes
PR#5688 review fixes are in this patch. The PR was already
merged so the fixes are addresses here as a separate patch.

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-03-09 10:26:56 +02:00
chao.an
ba2cb65a91 arch/sim: add all symbols support
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-03-09 10:16:54 +02:00
Huang Qi
c6e636a871 arch/risc-v: Save/Load float register in setjmp
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-09 10:15:54 +02:00
Huang Qi
8dedf1d9af arch/risc-v: Correct handling of QPFPU and DPFPU
If QPFPU enabled we will never enter the expected QPFPU branch since
option QPFPU depend on DPFPU.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-09 10:15:54 +02:00
Gustavo Henrique Nihei
4a29fa903b xtensa/esp32s3: Enable SMP support
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-09 10:42:50 +08:00
Richard Tucker
4888be37e3 arch/arm/src/sam34/sam_dmac.c: Fix compilation error 2022-03-09 10:18:32 +08:00
Gustavo Henrique Nihei
140dc248db xtensa/esp32s2: Add support for Main System Watchdog Timers
Support for RTC Watchdog Timer is currently in place, but not yet
functional due to not yet implemented RTC driver.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-08 22:24:07 -03:00
Eero Nurkkala
4b2fbab998 risc-v/mpfs: usb: fix an unused variable warning
Fix an unused variable warning if the CONFIG_HAVE_USBTRACE
(and USB_DEBUG) aren't set.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-03-08 23:00:31 +08:00
Gustavo Henrique Nihei
bd7ee0d675 xtensa/esp32s2: Sync IRQ management API with ESP32 and ESP32-S3
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-08 11:36:32 -03:00
Huang Qi
bfedbf1c05 arm/imx6: Enable setjmp test in ostest
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-08 21:00:29 +08:00
Huang Qi
cfff115f21 arm: Move setjmp to common place
Since some Cortex A core supports thumb mode also,
thus they can share same implementation.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-08 21:00:29 +08:00
Eero Nurkkala
8c1ab129ac risc-v/mpfs: add USB device driver
This adds a simple USB device driver for the mpfs. However,
this driver is still at its early phase. Only limited testing
with CDC/ACM has been conducted.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-03-08 16:49:29 +08:00
zhuyanlin
634d337394 riscv/xtensa: corrent dumpstate xcp size
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-03-08 10:14:04 +02:00
chao.an
a14ed02571 sim/syscall: add syscall note support in the flat build
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-03-07 23:58:28 +08:00
zhuyanlin
981282696f xtensa:backtrace: fix backtrace last buffer error in some scene
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-03-07 10:21:37 +01:00
Abdelatif Guettouche
fa0e5da18e xtensa/xtensa_user_handler.S: Store EXCCAUSE and EXCVADDR into the user
frame. The user frame is passed them to xtensa_user that actually uses
EXCVADDR.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-04 11:19:06 +02:00
Juha Niskanen
779665c704 arch/arm/src/stm32l4: STM32L4+ might need flash data cache corruption workaround
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
2022-03-04 14:00:20 +08:00
Oleg Evseev
625d230d28 arch/arm/src/stm32f7/stm32_can.c: fix CAN3 receiving
by fixing filter initialization.

STM32F7 CAN3 works in single peripheral configuration and there is only 14 filter banks: 0-13. Previously not available 14 indexed filter (CAN_NFILTERS/2) was wrongly used for for receiving to FIFO. Now zero indexed filter is correctly used instead.
2022-03-03 14:31:37 -03:00
Abdelatif Guettouche
c820085a23 arch/xtensa/esp32s3: Add encrypted support for SPI FLASH.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-03 19:57:59 +08:00
Abdelatif Guettouche
9d5b13cd0e xtensa/esp32s3: Add SPI-Flash support.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-03-03 19:57:59 +08:00
Huang Qi
e383439dda risc-v: Replace all inline assembly with macro
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-03 19:55:54 +08:00
Huang Qi
35330a798b risc-v: Implement READ_AND_SET_CSR for CSR operate
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-03-03 19:55:54 +08:00
zhuyanlin
5af1b671b6 armv7-a/armv7-r:cache: modify hardcode in cache set/way operation
Some chip not use the default cache size & way , read from
CCSIDR instead of hardcode.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-03-03 14:11:31 +08:00
Gustavo Henrique Nihei
16030f713e xtensa/esp32s3: Add support for Free-running Timer
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-03 10:58:53 +08:00
Gustavo Henrique Nihei
3b7a6ae311 xtensa/esp32s3: Add support for Tickless kernel using Systimer
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-02 18:08:44 +01:00
ligd
fe6aa4a874 sim: add loop thread to handle dev loops
For some dev loops will call sem_wait/sem_trywait

Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-03-02 20:29:52 +09:00
Xiang Xiao
4a16cf71f9 Fix -Werror=nonnull-compare and -Werror=format-truncation=
Error: module/mod_insmod.c:203:3: error: 'strncpy' specified bound 16 equals destination size [-Werror=stringop-truncation]
  203 |   strncpy(modp->modname, modname, MODLIB_NAMEMAX);
      |   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

wqueue/kwork_thread.c: In function 'work_start_lowpri':
Error: wqueue/kwork_thread.c:212:22: error: '%lx' directive output may be truncated writing between 1 and 16 bytes into a region of size 14 [-Werror=format-truncation=]
  212 |   snprintf(args, 16, "0x%" PRIxPTR, (uintptr_t)wqueue);

local/local_sockif.c: In function 'local_getsockname':
Error: local/local_sockif.c:392:11: error: 'strncpy' specified bound depends on the length of the source argument [-Werror=stringop-overflow=]
  392 |           strncpy(unaddr->sun_path, conn->lc_path, namelen);
      |           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

chip/esp32_wifi_utils.c: In function 'esp_wifi_scan_event_parse':
Error: chip/esp32_wifi_utils.c:373:37: error: argument to 'sizeof' in 'memset' call is the same expression as the destination; did you mean to dereference it? [-Werror=sizeof-pointer-memaccess]
   memset(ap_list_buffer, 0x0, sizeof(ap_list_buffer));
                                     ^

stdio/lib_fputs.c: In function 'fputs':
Error: stdio/lib_fputs.c:99:9: error: nonnull argument 's' compared to NULL [-Werror=nonnull-compare]
   if (s == NULL || stream == NULL)
         ^
Error: stdio/lib_fputs.c:99:27: error: nonnull argument 'stream' compared to NULL [-Werror=nonnull-compare]
   if (s == NULL || stream == NULL)
                           ^

stdio/lib_vfprintf.c: In function 'vfprintf':
Error: stdio/lib_vfprintf.c:40:6: error: nonnull argument 'stream' compared to NULL [-Werror=nonnull-compare]
   if (stream)
      ^

string/lib_strdup.c: In function 'strdup':
Error: string/lib_strdup.c:39:6: error: nonnull argument 's' compared to NULL [-Werror=nonnull-compare]
   if (s)
      ^

string/lib_strndup.c: In function 'strndup':
Error: string/lib_strndup.c:56:6: error: nonnull argument 's' compared to NULL [-Werror=nonnull-compare]
   if (s)
      ^

string/lib_strpbrk.c: In function 'strpbrk':
Error: string/lib_strpbrk.c:39:7: error: nonnull argument 'str' compared to NULL [-Werror=nonnull-compare]
   if (!str || !charset)
       ^~~~
Error: string/lib_strpbrk.c:39:15: error: nonnull argument 'charset' compared to NULL [-Werror=nonnull-compare]
   if (!str || !charset)
               ^~~~~~~~

string/lib_strrchr.c: In function 'strrchr':
Error: string/lib_strrchr.c:40:6: error: nonnull argument 's' compared to NULL [-Werror=nonnull-compare]
   if (s)
      ^

Error: time/lib_asctimer.c:73:50: error: '%d' directive output may be truncated writing between 1 and 11 bytes into a region of size between 0 and 12 [-Werror=format-truncation=]
   snprintf(buf, 26, "%.3s %.3s%3d %.2d:%.2d:%.2d %d\n",
                                                  ^~
time/lib_asctimer.c:73:21: note: directive argument in the range [-2147481748, 2147483647]
   snprintf(buf, 26, "%.3s %.3s%3d %.2d:%.2d:%.2d %d\n",
                     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
time/lib_asctimer.c:73:3: note: 'snprintf' output between 17 and 68 bytes into a destination of size 26
   snprintf(buf, 26, "%.3s %.3s%3d %.2d:%.2d:%.2d %d\n",
   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            g_wday_name[tp->tm_wday], g_mon_name[tp->tm_mon],
            ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            tp->tm_mday, tp->tm_hour, tp->tm_min, tp->tm_sec,
            ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            1900 + tp->tm_year);
            ~~~~~~~~~~~~~~~~~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-02 15:55:38 +08:00
zhuyanlin
a4e93be0fb arch:xtensa: fix sp duplicate reduce in handler enter
In xtensa/include/irq.h the XCPTCONTEXT_SIZE is
`#define XCPTCONTEXT_SIZE    ((4 * XCPTCONTEXT_REGS) + 0x20)`

XCPTCONTEXT_SIZE is already byte size of xcpcontext

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-03-01 13:46:31 +01:00
Xiang Xiao
a8ab090764 sim: Simplify boards and arch's Makefile
1.Remove the unused LIBPATHS and HOSTLDFLAGS
2.Move HOSTCFLAGS to arch/Makefile

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-01 12:33:56 +01:00
Masayuki Ishikawa
2a434fe1fa arch: imx6: Add the pgheap for imx6
Summary:
- This commit adds the pgheap for imx6

Impact:
- None

Testing:
- Tested with sabre-6quad:netknsh (not merged yet)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-03-01 12:18:47 +08:00
Xiang Xiao
da954956e7 Simplify DEFAULT_SMALL usage in Kconfig
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-01 03:15:01 +08:00
chao.an
0961f12e28 arm/phy62xx: remove unused private header
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-03-01 00:33:58 +08:00
Xiang Xiao
9bc2b4c31b board/sim: Remove CCLINKFLAGS, use CFLAGS/CXXFLAGS instead
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-28 23:13:22 +08:00
Huang Qi
d0356bb9ba arch/risc-v/qemu-rv: Set FS bits in mstatus
FPU test may fail without correct FS bits.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-28 16:28:22 +08:00
Masayuki Ishikawa
56e0e6a5ec arch: imx6: Remove sem_t from imx_serial.c
Summary:
- I noticed that when exiting getprime, DEBUGASSERT happens in
  nxsem_wait()
- Finally, I found that up_putc() uses nxsem_wait()
- This commit fixes this issue by removing the semaphore.
- Also, up_putc() now calls imx_lowputc()

Impact:
- None

Testing:
- Tested with sabre-6quad:netknsh (not merged yet)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-02-28 16:09:01 +08:00
Masayuki Ishikawa
a75d905760 arch: imx6: Refactor imx_lowputc()
Summary:
- Remove '\n' -> '\r\n' conversion
- Remove waiting for FIFO empty after sending a character
- Remove CONFIG_DEBUG_FEATURES

Impact:
- None

Testing:
- Tested with sabre-6quad:netknsh (not merged yet)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-02-28 16:09:01 +08:00
Xiang Xiao
872c570343 arch: Align the implementation of stack related functions
arm: Avoid call k[u]mm_memalign to save the code size
ceva: Correct stack_base_ptr usage(top of stack v.s. bottom of stack)
mips: Correct the stack alignment in up_use_stack
misoc: Correct the stack alignment in up_use_stack
or1k: Correct the stack alignment in up_use_stack

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-28 15:05:41 +08:00
Xiang Xiao
3bf416e8b8 arch: Move STACK_ALIGNMENT definition to up_internal.h
to avoid the same macro duplicate to many place

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-28 15:05:41 +08:00
Xiang Xiao
44bd3212d4 arch: Remove SYS_RESERVED from Kconfg
let's arch define the correct value instead

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-27 22:54:13 +08:00
Xiang Xiao
087b9e5ff3 arch: Move the content from svcall.h to syscall.h
and remove svcall.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-27 22:54:13 +08:00
Xiang Xiao
0c7517e579 arch: Remove the duplicated syscall.h in each arch
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-27 22:54:13 +08:00
Xiang Xiao
8b77801b1c arch/xtensa: Remove the unused SYS_pthread_exit
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-27 22:54:13 +08:00
chao.an
b57e0b6118 arm/armv7-a/r: check ARMV7A_DECODEFIQ on dataabort
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-27 17:25:22 +09:00
chao.an
c369e47107 arm/armv7-a/r: handle swi on interrupt stack
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-27 17:25:22 +09:00
lp.xiao
fac10b6ebd stm32f103re has a dac module.but the pinmap file has no corresponding definition 2022-02-27 14:39:17 +08:00
Xiang Xiao
f634ea24b5 arch/sim: Don't include execinfo.h since cygwin doesn't support it
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-26 07:05:42 -06:00
Jiuzhu Dong
c5ba9261bc procfs: add memdump interface to dump used/free memory info
usage:echo <used/free> > /proc/memdump
echo used > /proc/memdump // output all used memory node info(address + size)
echo free > /proc/memdump // output all free memory node info(address + size)

Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2022-02-26 14:32:42 +08:00
Xiang Xiao
b95022f8de arm/armv7-a: Remove CONFIG_SMP guard from arm_scu.c
since ACTLR.SMP need enable to make cache work on Cortex A7:
https://developer.arm.com/documentation/ddi0464/f/CHDBIEIF

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-26 14:15:30 +09:00
Gustavo Henrique Nihei
6a12befcd5 xtensa/esp32s2: Fix Scheduler CPU Load feature using Oneshot Timer
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-02-26 03:23:13 +08:00
Gustavo Henrique Nihei
d2ada5f030 xtensa/esp32: Fix Scheduler CPU Load feature using Oneshot Timer
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-02-26 03:23:13 +08:00
Gustavo Henrique Nihei
36ac532c98 risc-v/esp32c3: Fix Scheduler CPU Load feature using Oneshot Timer
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-02-26 03:23:13 +08:00
Gustavo Henrique Nihei
a6fea1c3a5 risc-v/esp32c3: Enable Timer Groups clocks on timer initialization
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-02-25 22:49:22 +08:00
Gustavo Henrique Nihei
1d15196df7 risc-v/esp32c3: Fix detection of CPU reset by Watchdog Timer
This commit fixes an issue where some peripheral clocks are being
disabled during CPU reset on ESP32-C3.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-02-25 22:48:09 +08:00
zhuyanlin
fbc1da98b7 xtensa: use swint to swith context
Reason for use sw-interrupt as syscall interrupt:
The xtensa `syscall` instruction can cause SYSCALL interrupt.
But SYSCALL interrupt is same interrupt level with level-one
interrupt.
Nuttx swint can enter `enter_critical_section` and gerenate
interrupt.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-25 20:43:03 +08:00
zhuyanlin
f5d180bbdf xtensa: spit up_irq_disable and up_irq_save INTLEVEL MARCO
For up_irq_disable, use XCHAL_EXCM_LEVEL
For up_irq_save,  use XCHAL_IRQ_LEVEL.
Then we can use svcall in enter_crritical_section.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-25 20:43:03 +08:00
Huang Qi
e8552156b6 arch/risc-v: Remove unneeded ISA specifc interface
They are not really defined and used in any where:
uint32_t up_getmisa(void);
uint32_t up_getarchid(void);
uint32_t up_getimpid(void);
uint32_t up_getvendorid(void);
uint32_t up_gethartid(void);

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-25 20:36:16 +08:00
Huang Qi
cfed970633 arch/misoc: Correct gurad macro for irq.h
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-25 20:36:16 +08:00
Huang Qi
8b66280b4f arch/risc-v: Update outdated comments
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-25 20:36:16 +08:00
Gustavo Henrique Nihei
ea1b49119a xtensa/esp32s3: Apply minor fixes to documentation and code style
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-02-25 10:51:25 +08:00
Gustavo Henrique Nihei
add99fead3 xtensa/esp32s3: Add support for Oneshot timer
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-02-25 10:51:25 +08:00
Masayuki Ishikawa
de95a8550f arch, board: Add thumb support to i.MX6
Summary:
- This commit adds thumb support to i.MX6
- Also, applies the same coding style to arch_elf.c

Impact:
- i.MX6 only

Testing:
- Tested with sabre-6quad:smp (QEMU, Dev board)
- Tested with sabre-6quad:netnsh (QEMU)
- Tested with sabre-6quad:netknsh (QEMU, not merged yet)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-02-25 10:51:12 +08:00
Xiang Xiao
25213c42a5 arch/arm: Remove the empty spinlock.h file
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-25 09:18:53 +09:00
Abdelatif Guettouche
dc130b4830 arch/xtensa/esp32s2_irq.c: Correctly enable the software interrupt.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-02-25 08:55:41 +09:00
Gustavo Henrique Nihei
b49ee3d4ed xtensa/esp32s3: Add support for Main System Watchdog Timers
Support for RTC Watchdog Timer is currently in place, but not yet
functional due to not yet implemented RTC driver.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-02-25 02:13:00 +08:00
Anton Potapov
9603b8f67c Add DAC2 configuration for stm32f405. 2022-02-24 12:09:41 -05:00
Gustavo Henrique Nihei
3400b42a33 xtensa/esp32: Fix a minor typo in documentation
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-02-24 17:43:39 +01:00
Gustavo Henrique Nihei
a5024a707d xtensa/esp32s3: Use the running CPU ID for enabling internal interrupts
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-02-24 17:43:39 +01:00
Gustavo Henrique Nihei
83f3ba6d22 xtensa/esp32s3: Add support for Timer Groups 0 and 1
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-02-25 00:13:34 +08:00
zhuyanlin
7d350204f0 xtensa: fix XTHAL_REL_LE not find
fix `XTHAL_REL_LE` not find build break

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-24 22:13:46 +08:00
Xiang Xiao
6fa5885d2d arch/esp32: Update esp-wireless-drivers-3rdparty to verion 45701c0
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-24 09:05:40 +01:00
zhuyanlin
fc9791c269 xtensa:esp32s3: setup software interrupt as swi interrupt.
Enable and setup software interrupt.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-24 00:06:43 +01:00
zhuyanlin
bf40d70df9 xtensa:esp32s2: setup software interrupt as swi interrupt
Enable and setup software interrupt for esp32s2

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-24 00:06:43 +01:00
zhuyanlin
7b32ce190e xtensa:esp32: setup software interrupt. (bit 29)
Enable and setup software interrupt.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-24 00:06:43 +01:00
Xiang Xiao
d7fe0127b0 Replece clock_gettime(CLOCK_REALTIME) with clock_systime_timespec if suitable
it's better to call the kernrel api insteaad user space api in kernel

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-24 01:06:36 +08:00
Xiang Xiao
43f57240e0 Replece clock_gettime(CLOCK_MONOTONIC) with clock_systime_timespec
it's better to call the kernrel api insteaad user space api in kernel

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-24 01:06:36 +08:00
chao.an
13889ba868 arch/arm: unify some duplicate code to common layer
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-23 21:35:55 +08:00
chao.an
6cc0aaf5b9 arch/arm: unify switch context from software interrupt
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-23 15:04:29 +09:00
chao.an
db3a40ac25 arch/armv7-r: unify switch context from software interrupt
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-23 15:04:29 +09:00
chao.an
61cd9dfca1 arch/armv7-a: unify switch context from software interrupt
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-23 15:04:29 +09:00
Gregory Nutt
1ded8bbabb Garbage configuration setting in EFM32 code
arch/arm/src/efm32/efm32_start.c:

      /* For the case of the separate user-/kernel-space build, perform whatever
       * platform specific initialization of the user memory is required.
      * Normally this just means initializing the user space .data and .bss
       * segments.
       */

    #ifdef CONFIG_NUTTX_KERNEL
      efm32_userspace();
      showprogress('E');
    #endif

But there is no CONFIG_NUTTX_KERNEL configuration setting.  Comparing this to other architectures it is clear this should be

    #ifdef CONFIG_BUILD_PROTECTED
2022-02-23 03:40:44 +08:00
Xiang Xiao
f1ed349dd9 sched/clock: Remove CLOCK_MONOTONIC option from Kconfig
here is the reason:
1.clock_systime_timespec(core function) always exist regardless the setting
2.CLOCK_MONOTONIC is a foundamental clock type required by many places

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-23 01:21:26 +08:00
zhuyanlin
7b00c8bdb8 arch:xtensa: modify svcall to swint
Reason: xtensa svcall only have level-1 interrupt level.
Sush do not generate interrupt when up_irq_save.
Software int can generate interrupt when up_irq_save.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2022-02-22 14:06:24 -03:00
chao.an
0aa0022b12 arch/armv7-a: replace SYS_signal_handler_return hardcode
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-22 17:59:02 +08:00
chao.an
e0fabbfdd6 arch/arm: replace SYS_syscall_return hardcode from syscall
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-22 17:59:02 +08:00
Xiang Xiao
2f24d2c265 arch/ceva: Replace OUTDIR with TOPDIR
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-21 09:25:26 +01:00
Xiang Xiao
163fe4ff0b boards: Replace CONFIG_CYGWIN_WINTOOL with CONVERT_PATH
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-20 21:15:36 +01:00
Xiang Xiao
1d1bdd85a3 Remove the double blank line from source files
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-20 20:10:14 +01:00
Oki Minabe
e9a94a003d old arm: add BUILD_KERNEL code in arm/arm_vectors.S 2022-02-20 21:03:54 +09:00
Oki Minabe
19e5c8f6d3 armv7-a/r: fix SVC's sp restore in arm_vectors.S 2022-02-20 18:39:30 +08:00
Xiang Xiao
d29f3bd21c arm/rtl8720c: Remove the unused Toolchain.defs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-20 04:15:34 +01:00
Huang Qi
da25883c64 arch/sim: Fix usrsock build break on macOS
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-18 09:06:46 -03:00
chao.an
5da5ffb7d4 sim/usrsock: correct the xid type to uint64_t
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-18 08:16:17 +01:00
Abdelatif Guettouche
ab18b7b3d3 esp32xx_irq.c: Fix CPU interrupt documentation to remove the MAC
interrupt from the internal interrupt table.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-02-18 13:40:21 +08:00
Abdelatif Guettouche
ee88235d81 esp32_irq.c: Don't reserve BT and Wifi CPU interrupts for APP CPU as
they are attached to the PRO CPU.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-02-18 13:40:21 +08:00
Abdelatif Guettouche
17e43b0b4a esp32_irq.c: For internal interrupts use the current CPU to enable them.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-02-18 13:40:21 +08:00
Abdelatif Guettouche
3d2771c49a esp32_irq.c: Move interrupt initialisation for special drivers to
`up_irqinitialize`.  `esp32_cpuint_initialize` is not a good place as
it's also called from CPU1.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-02-18 13:40:21 +08:00
Huang Qi
0c5aff9be6 risc-v/qemu-rv: Supports SMP up to 8 cores
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-18 13:25:01 +08:00
Huang Qi
36ff081b1a risc-v: Support more than 2 cores in riscv_cpu_boot
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-18 13:25:01 +08:00
Huang Qi
7c18290331 risc-v: Rename up_fault to riscv_fault
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-18 13:25:01 +08:00
lp.xiao
bc12260540 dp83848c ethernet phy interrupt support 2022-02-17 08:00:53 +01:00
Xiang Xiao
69a6072946 arch/ceva: Replace adj_stack_ptr with stack_base_ptr
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-17 11:06:09 +09:00
Xiang Xiao
814cab1cd1 arch/ceva: Mark the allocated stack with TCB_FLAG_FREE_STACK
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-17 11:06:09 +09:00
Xiang Xiao
f8df491d5d arch/ceva: Update tls handle to the latest mainline
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-17 11:06:09 +09:00
Xiang Xiao
4bc5b246ac arch/ceva: Remove B2C and C2B
since TL420 doesn't support anymore, we
can safely remove the special hack for it

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-17 11:06:09 +09:00
YAMAMOTO Takashi
85af0f37ad arch/sim/src/Makefile: Fix build issues with clang on linux
This commit fixes at least two issues.

* Fix a build with clang on linux

```
/usr/bin/ld: cannot open linker script file nuttx.ld: No such file or directory
clang: error: linker command failed with exit code 1 (use -v to see invocation)
```

* Restore symbol renaming for clang on linux

I guess it actually depends on the linker.
For now, use CONFIG_HOST_MACOS.

This fixed the following crash seen with sim/linux built with clang.

```
    #135462 0x0000000000404a81 in nxtask_exithook (tcb=0x48f310 <g_idletcb>, status=1, nonblocking=0 '\000') at task/task_exithook.c:618
    #135463 0x0000000000402aed in exit (status=1) at task/exit.c:103
    #135464 0x0000000000475833 in host_abort (status=1) at sim/up_hostmisc.c:48
    #135465 0x000000000040e6c6 in up_assert (filename=0x47b167 "semaphore/sem_wait.c", lineno=113) at sim/up_assert.c:126
    #135466 0x000000000040850b in _assert (filename=0x47b167 "semaphore/sem_wait.c", linenum=113) at assert/lib_assert.c:36
    #135467 0x0000000000403a40 in nxsem_wait (sem=0x7fca38b1c2d0) at semaphore/sem_wait.c:113
    #135468 0x0000000000403b43 in sem_wait (sem=0x7fca38b1c2d0) at semaphore/sem_wait.c:271
    #135469 0x000000000040aad3 in lib_stream_semtake (list=0x7fca38b1c2d0) at stdio/lib_libstream.c:159
    #135470 0x000000000040a8e7 in lib_flushall (list=0x7fca38b1c2d0) at stdio/lib_libflushall.c:61
    #135471 0x0000000000404c3c in nxtask_flushstreams (tcb=0x48f310 <g_idletcb>) at task/task_exithook.c:520
    #135472 0x0000000000404a81 in nxtask_exithook (tcb=0x48f310 <g_idletcb>, status=1, nonblocking=0 '\000') at task/task_exithook.c:618
    #135473 0x0000000000402aed in exit (status=1) at task/exit.c:103
    #135474 0x0000000000475833 in host_abort (status=1) at sim/up_hostmisc.c:48
    #135475 0x000000000040e6c6 in up_assert (filename=0x47b167 "semaphore/sem_wait.c", lineno=113) at sim/up_assert.c:126
    #135476 0x000000000040850b in _assert (filename=0x47b167 "semaphore/sem_wait.c", linenum=113) at assert/lib_assert.c:36
    #135477 0x0000000000403a40 in nxsem_wait (sem=0x7fca38b1c2d0) at semaphore/sem_wait.c:113
    #135478 0x0000000000403b43 in sem_wait (sem=0x7fca38b1c2d0) at semaphore/sem_wait.c:271
    #135479 0x000000000040aad3 in lib_stream_semtake (list=0x7fca38b1c2d0) at stdio/lib_libstream.c:159
    #135480 0x000000000040a8e7 in lib_flushall (list=0x7fca38b1c2d0) at stdio/lib_libflushall.c:61
    #135481 0x0000000000404c3c in nxtask_flushstreams (tcb=0x48f310 <g_idletcb>) at task/task_exithook.c:520

```
2022-02-17 09:36:20 +08:00
YAMAMOTO Takashi
7fcfe40821 arch/sim/src/Makefile: Fix whitespace 2022-02-17 09:36:20 +08:00
Peter Kalbus
6abdf73535 sim: Initial support on MacOS M1 and Linux AARCH64 based hosts. 2022-02-17 09:35:09 +08:00
Xiang Xiao
1d963058b4 arch/sparc: Replace adj_stack_ptr with stack_base_ptr
since adj_stack_ptr doesn't exist anymore

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-16 17:19:43 -03:00
Alan Rosenthal
8defb843aa Remove duplicate linker script definitions
## Summary
A lot of linker scripts were listed twice, once for unix, once for windows.

This PR cleans up the logic so they're only listed once.

 ## Impact
Any opportunity to use a single source of truth and reduce lines of code is a win!

 ## Testing
CI will test all build
2022-02-17 02:55:25 +08:00
Oki Minabe
68a305438b fix armv7-a gtm.h GTM_COMP1 and GTM_AUTO defines. 2022-02-16 18:50:42 +01:00
Oki Minabe
c1ea37742b fix arm FPSCR typos in comments. 2022-02-17 01:08:11 +08:00
Simon Filgis
cf008c94cc arch/arm/samv7: fix peripheral id shift during transmit xdma configuration 2022-02-16 17:16:53 +01:00
Masayuki Ishikawa
b60b6120de arch: armv7-a: Fix arm_syscall for SYS_pthread_start
Summary:
- I noticed that pthread always crashes when started
  if CONFIG_BUILD_KERNEL=y
- This commit fixes this issue

Impact:
- None

Testing:
- Tested with sabre-6quad:netknsh (not merged yet)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-02-16 13:06:25 +01:00
Petro Karashchenko
41c95da594 register_driver: fix driver modes accross the code
State of problem:
 - Some drivers that do not support write operations (does not
   have write handler or ioctl do not perform any write actions)
   are registered with write permissions
 - Some drivers that do not support read operation (does not
   have read handler or ioctl do not perform any read actions)
   are registered with read permissions
 - Some drivers are registered with execute permissions

Solution:
 - Iterate code where register_driver() is used and change 'mode'
   parameter to reflect the actual read/write operations executed
   by a driver
 - Remove execute permissions from 'mode' parameter

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-02-16 16:15:29 +08:00
Xiang Xiao
db57e2cd8e Fix the minor style issue
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-15 15:26:38 +01:00
Masayuki Ishikawa
34cf6949ac arch: armv7-a: Add debug messages for addrenv
Summary:
- This commit adds debug messages for addrenv

Impact:
- None

Testing:
- Tested with sabre-6quad:netknsh (not merged yet)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-02-15 17:22:52 +08:00
Masayuki Ishikawa
e7cb1b4fb1 arch: rt8920c: Move -fno-common option to ARCHCFLAGS/ARCHCXXFLAGS
Summary:
- Apply the same style as sabre-6quad

Impact:
- None

Testing:
- Build only

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-02-15 16:27:53 +08:00
Xiang Xiao
6b02e32904 arch/sim: Remove 08 from the format string in up_vfork
to make the code more general for both x86 and x64.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-15 06:44:21 +01:00
Xiang Xiao
e1879e35cd arch/sim: Always typedef xcpt_reg_t to unsigned long
to simplify the code logic

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-15 06:44:21 +01:00
Huang Qi
5cde8c6934 risc-v: Let g_cpu_basestack determined at compile time
Fix the CPU1 idle tasks stack corruption since the cpux's idle stack
is loaded from g_cpu_basestack (data section) before, but on this time
it maybe not ready since it is initialized by CPU0, and the value
from g_cpu_basestack is random.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-15 11:40:34 +09:00
Huang Qi
0d7f30c86d risc-v/k210: Move wfi to entry of the slave cpu boot routine
Fix another potential bug in non-smp case: load a value from overflowed address of g_cpu_basestack.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-15 11:40:34 +09:00
fenghang
555d25633a add phyplus_rel_1.4
update source for phyplus driver rel_1.4

update source  for phyplus driver rel 1.4

update source for phyplus driver 1.4

update phy6222 config files
2022-02-15 10:21:10 +08:00
Xiang Xiao
4207882cdc arm/armv8-m: Handle the special irq correctly in up_secure_irq
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-15 09:45:34 +09:00
David Sidrane
1ca952243c stm32h7:flash can not use usleep
commit 328374f4658d11655f268f968f4c6c7a3942f320

   changed the wait to use usleep. This killed the
   write performace from the published values in the
   datasheet of ~100 us to 2 mS per 256 bits. On
   a 1000 per tick config. It can be 10 X worse
   on the default 100 per tick config.

   This changes uses up_udelay.
2022-02-15 02:09:04 +08:00
David Sidrane
8659a31c9d stm32h7:flash Fix lock violations 2022-02-15 02:09:04 +08:00
David Sidrane
8ca4cf49b1 stm32h7:Fix build for all config {R|T}XDMA states 2022-02-14 18:43:30 +01:00
Xiang Xiao
17a7d612df arch: Replace nx_vsyslog with vsyslog
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-14 09:41:45 -03:00
chao.an
4be416a2a8 arm/backtrace: fix the compile warning
Signed-off-by: chao.an <anchao@xiaomi.com>
2022-02-14 16:29:38 +08:00
Huang Qi
b8477f857b k210: Use common cpu idle stack implementation
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-14 11:32:34 +08:00
Huang Qi
55d88627a0 risc-v: Implement common up_cpu_idlestack
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2022-02-14 11:32:34 +08:00