This applies uintreg_t in risc-v commons and fixes araised ci issues
for multiple devices. The FLAT build runs on qemu-rv64ilp32 target.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
This adds support of rv64ilp32 toolchain available from Github repo
`ruyisdk/riscv-gnu-toolchain-rv64ilp32`. With this 32-bit nuttx can
be generated for RV64 devices.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
* arch/risc-v/src/common/Toolchain.defs
arch/xtensa/src/lx6/Toolchain.defs
arch/xtensa/src/lx7/Toolchain.defs
- Define SHMODULEFLAGS etc. for sotest/dynload
- Add --entry=__start to SHMODULEFLAGS
* boards/arm64/qemu/qemu-armv8a/scripts/Make.defs
boards/sim/sim/sim/scripts/Make.defs
- Define SHMODULEFLAGS etc. for sotest/dynload
/home/raiden00/git/RTOS/nuttx/nuttx/include/nuttx/timers/oneshot.h: In function 'oneshot_max_delay':
/home/raiden00/git/RTOS/nuttx/nuttx/include/nuttx/timers/oneshot.h:272:3: error: implicit declaration of function 'timespec_from_tick' [-Wimplicit-function-declaration]
272 | timespec_from_tick(ts, tick);
| ^~~~~~~~~~~~~~~~~~
/home/raiden00/git/RTOS/nuttx/nuttx/include/nuttx/timers/oneshot.h: In function 'oneshot_start':
/home/raiden00/git/RTOS/nuttx/nuttx/include/nuttx/timers/oneshot.h:285:10: error: implicit declaration of function 'timespec_to_tick'; did you mean 'timespec_get'? [-Wimplicit-function-declaration]
285 | tick = timespec_to_tick(ts);
| ^~~~~~~~~~~~~~~~
| timespec_get
/home/raiden00/git/RTOS/nuttx/nuttx/drivers/wireless/gs2200m.c:2071:3: note: ‘snprintf’ output between 7 and 9 bytes into a destination of size 8
2071 | snprintf(cmd, sizeof(cmd), "ATE%d\r\n", on);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
For newer devices, IDF bootloader is not supported because the
devices are able to boot directly into NuttX or use MCUBoot to
enable OTA and security features.
This commit enables users to select the legacy bootloader (IDF
bootloader) in `menuconfig` directly. Please note, that this is a
legacy option intended to support devices already deployed and it
isn't recommended for new designs.
This adds IS_POWER_OF_2 macro to help catching config errors at
build time.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
Need to distinguish between 32bit and 64bit registers, format the gdb reply message using struct.pack with correct format.
'<I' is used for 32bit registers, '<Q' for 64bit
Do not raise exeption for unrecognized registers in log, since they are
not used.
Signed-off-by: Xu Xingliang <xuxingliang@xiaomi.com>
sched implementation not depends on macro abstraction, so revert below commit:
This reverts commit 4e62d0005a
This reverts commit 0f0c370520
This reverts commit ad0efd04ee
Signed-off-by: chao an <anchao@lixiang.com>
*Note:* ldmd2 is ldc2-wrapper, allow using dmd frontend flags.
This support may be extended to gdc (gnu) if nuttx developers demand it
or are interested in it.
pointer comparison is unsigned, when returning -errno will be converted
to a large positive number, can not enter the error handling branch,
therefore, the error code is returned directly and the sem is returned
through the parameters.
Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
Check return value of mpfs_board_pmp_setup() and
jump to mpfs_board_pmp_error() in case of error.
Signed-off-by: Jani Paalijarvi <jani.paalijarvi@unikie.com>
Add the address alignment to keep the constraint of ARMv7-M architecture same as RAM vector.
ARMv7-M architecture describes the vector table address alignment as following.
The Vector table must be naturally aligned to a power of two
whose alignment value is greater than or equal to (Number of Exceptions supported x 4),
with a minimum alignment of 128 bytes.
I wonder why the implementation of arm_vectors.c does not follow
this constraint of address alignment about ARMv7-M architecture.
Although RAM vector is taken care about it.
I think, as the result it was done by linker script on each board.
At our system, NuttX will be started by bootloader.
To fix the address of entry point(__start) I set the address of entry point to beginning of binary,
so the beginning of binary is not a vector table.
At this case, keeping the address alignment constraint of arm_vectors.c is needed.
The Simple Boot feature for Espressif chips is a method of booting
that doesn't depend on a 2nd stage bootloader. Its not the
intention to replace a 2nd stage bootloader such as MCUboot and
ESP-IDF bootloader, but to have a minimal and straight-forward way
of booting, and also simplify the building.
This commit also removes deprecated code and makes this bootloader
configuration as default for esp32s2 targets and removes the need
for running 'make bootloader' command for it.
Signed-off-by: Almir Okato <almir.okato@espressif.com>
