Commit Graph

10 Commits

Author SHA1 Message Date
TaiJu Wu
ffba0d15a5 Feature: implement ticket spinlock
test config: ./tools/configure.sh -l qemu-armv8a:nsh_smp

Pass ostest

No matter big-endian or little-endian, ticket spinlock only check the
next and the owner is equal or not.

If they are equal, it means there is a task hold the lock or lock is
free.

Signed-off-by: TaiJu Wu <tjwu1217@gmail.com>

Co-authored-by: Xiang Xiao <xiaoxiang781216@gmail.com>
2023-10-07 01:38:37 +08:00
Alan Carvalho de Assis
c27c33e9a9 Run refresh.sh to update all board configs 2023-09-02 14:45:44 +08:00
chenrun1
fb74c46e4d arm64/gnu:Set arch_* optimizations to be on by default.
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-08-19 18:43:08 +08:00
hujun5
d0139d1206 arch/arm64: change config order
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-05-10 09:06:59 +02:00
hujun5
7f4cb3057a arch/arm64: merge serial_pl011.c and qemu_serial.c
At present, the serial drivers qemu_serial.c and serial_pl011.c on the fvp-v8r and qemu platforms in arm64 are duplicated
and need to be merged. The plan is to place them under the drivers\serial directory to create a common code module,
so that both fvp-v8r and qemu can use the same code.
In the future, if new platforms use pl011 serial ports, they can also be directly reused

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-05-10 09:06:59 +02:00
qinwei1
c4f3f8801f arm64: Support for FPU profiling with procfs
Summary:

   To reduce the count of FPU context switching will result at a
performance improve with system. it need to balance between
the using of FPU and counts of FPU trap
   the PR submit a base method to see performance counts for
the FPU with NuttX procfs
   Please read README.txt at chapter of FPU Support and Performance
for more information

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-04-22 01:38:21 +08:00
qinwei1
d5c6b8a94b arm64: add 64-bit time for all arm64 platform
Summary
  For ARM64 architecture, the arch timer is 64-bit,
the CONFIG_SYSTEM_TIME64 need to be enabled just like
x86_64 and risc-v 64

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-03-01 13:23:48 +08:00
qinwei1
4240723b78 arm64: add ARCH_EARLY_PRINT support
Summary:
  The aarch64 have EL0~El3 execute level and NS/S (security state),
the NuttX should be execute at EL1 in NS(ARmv8-A) or S(ARmv8-R)
state. but booting NuttX have different ELs and state while with
different platform, if NuttX runing at wrong ELs or state it will
be not normal anymore. So we need to print something in arm64_head.S
to debug this situation.
Enabling this option will need to implement up_earlyserialinit and
up_lowputc functions just you see in qemu, if you not sure,
keeping the option disable.

Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
2023-03-01 13:23:48 +08:00
Masayuki Ishikawa
18ce70c1e7 boards: qemu-armv8a: Fix pthread_attr_setstacksize failed in ostest
Summary:
- This commit adjusts CONFIG_TESTING_OSTEST_STACKSIZE to fix
  pthread_attr_setstacksize failed error in ostest

Impact:
- None

Testing:
- Tested with ostest

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-10-15 08:46:01 +02:00
Hidenori Matsubayashi
28180b49d1 arm64: add Cortex-A57 and Cortex-A72 configurations
This change adds the following:
- Rename the board configuration name from qemu-a53 to qemu-v8a.
- Add the configurations for Cortex-A57 and Cortex-A72.

Signed-off-by: Hidenori Matsubayashi <hidenori.matsubayashi@gmail.com>
2022-10-14 09:27:35 +08:00