Gregory Nutt
|
121de26583
|
SAMA5 NAND: Basic support for access to NAND FLASH
|
2013-11-15 09:30:05 -06:00 |
|
Gregory Nutt
|
8353d234aa
|
LPC31 EHCI: First cut at an EHCI driver for the LPC31
|
2013-11-14 16:12:22 -06:00 |
|
Gregory Nutt
|
b3faf95a7c
|
LPC31: Configuration and build support for a forthcoming USB host driver; configs/ea3131/nsh converted to use kconfig-frontend tools
|
2013-11-14 15:33:43 -06:00 |
|
Gregory Nutt
|
b9d5acf6e4
|
SAMA5 PCK: Need to configure the programmable clock output pin as well
|
2013-11-14 11:41:59 -06:00 |
|
Gregory Nutt
|
778a41de1b
|
SAMA5 ISI: Framework for ISI drivers. Not much there on initial check-in
|
2013-11-14 11:17:00 -06:00 |
|
Gregory Nutt
|
b7ef5917be
|
SAMA5 PCK: Add support for programmable clock outputs
|
2013-11-14 11:16:04 -06:00 |
|
Gregory Nutt
|
bc58422444
|
STM32 CAN: Options for TSEG1 and TSEG2 quanta missing from Kconfig file
|
2013-11-14 08:29:36 -06:00 |
|
Gregory Nutt
|
8e1abbc561
|
SAMA SSC: Add bufffer dump debug instrumentation
|
2013-11-12 16:22:05 -06:00 |
|
Gregory Nutt
|
dc5d404fb4
|
SAMA5 SSC: Fix DMA data width: 16 not 32 bits
|
2013-11-12 15:53:02 -06:00 |
|
Gregory Nutt
|
a016db8680
|
SAMA5: Fix issues with RX synch
|
2013-11-12 14:56:00 -06:00 |
|
Gregory Nutt
|
26640e6031
|
SAMA5 SSC: With these changes, the TX DMA works. But nothing is received from the loopback
|
2013-11-12 12:19:11 -06:00 |
|
Gregory Nutt
|
6cfca5e9d7
|
SAMA5 SSC: Fix an error in the DMA timeout calculation
|
2013-11-12 10:59:41 -06:00 |
|
Gregory Nutt
|
015da87d6a
|
SAMA4 SSC: Additional DEBUG instrumentation
|
2013-11-12 10:19:52 -06:00 |
|
Gregory Nutt
|
2dec8fbf58
|
Various fixes from initial attempts to integrate the SAMA5 SSC/I2C driver with the I2C character driver loopback test
|
2013-11-11 15:18:57 -06:00 |
|
Gregory Nutt
|
0db55f5b4c
|
STM32F429 LTDC header files and framebuffer driver framework from Ken Pettit
|
2013-11-11 14:05:29 -06:00 |
|
Gregory Nutt
|
3214ff0755
|
SAMA5 I2S Kconfig update
|
2013-11-11 13:50:25 -06:00 |
|
Gregory Nutt
|
6e1523cc45
|
Support for the Atmel SAM4E family. From Mitko
|
2013-11-11 07:45:09 -06:00 |
|
Gregory Nutt
|
1db36fb2f4
|
SAMA5 LCD: More bad color format definitions
|
2013-11-10 16:31:21 -06:00 |
|
Gregory Nutt
|
b552595a3b
|
SAMA5 LCD: Fix some bad color format definitions
|
2013-11-10 16:16:33 -06:00 |
|
Gregory Nutt
|
8c16506277
|
SAMA5 I2S: Need to update the count of valid bytes at the conclusion of the read DMA
|
2013-11-10 15:02:51 -06:00 |
|
Gregory Nutt
|
64a7e96f1f
|
I2S simplifed audio buffer queuing
|
2013-11-10 14:51:33 -06:00 |
|
Gregory Nutt
|
4b998d84a7
|
Small but important typo in the last commit
|
2013-11-10 11:51:50 -06:00 |
|
Gregory Nutt
|
725ef58a19
|
SAMA5 SSC: Add support for loopback mode. Plus unrelated Make.defs file from the last checkin
|
2013-11-10 11:46:45 -06:00 |
|
Gregory Nutt
|
c9d3cdb85e
|
Kinetis KL: PWM driver from Alan Carvalho de Assis
|
2013-11-10 10:34:45 -06:00 |
|
Gregory Nutt
|
f5c82c0df9
|
Add an I2S character driver. This driver is only intended to support I2S testing and is inappropriate for use with real I2S devices
|
2013-11-10 10:24:09 -06:00 |
|
Gregory Nutt
|
4db4c4d770
|
STM32 OTG FS device and host drivers extended so that they can support either the OTG FS peripheral or the OTG HS peripheral (in FS mode). This was done as a quick way to get USB support on the STM32F429 which has only OTG HS. From Ken Pettit
|
2013-11-10 07:23:06 -06:00 |
|
Gregory Nutt
|
2168a6a481
|
SAMA5 I2S: Try to chain as many DMAs together as possible
|
2013-11-09 15:01:18 -06:00 |
|
Gregory Nutt
|
50ec4df77b
|
SAMA5 I2S: Fix compile errors when all debug options enabled
|
2013-11-09 13:46:12 -06:00 |
|
Gregory Nutt
|
ac120d60c3
|
SAMA5 I2S: Driver is code complete, untested and subject to some rethinking
|
2013-11-09 13:08:20 -06:00 |
|
Gregory Nutt
|
abdd0c637c
|
SAMA5 I2S: Improved I2S buffering
|
2013-11-08 16:09:20 -06:00 |
|
Gregory Nutt
|
c7cab0a5ff
|
SAMA5 SSC: Updated I2S driver
|
2013-11-08 12:03:18 -06:00 |
|
Gregory Nutt
|
0516a4d1e9
|
Back out a small part of the recent STM32 usbdev fix. From David Sidrane
|
2013-11-07 19:07:16 -06:00 |
|
Gregory Nutt
|
d8d469fa58
|
STM32 F1 USB: Fix OUT SETUP command bug. From David Sidrane
|
2013-11-07 17:25:05 -06:00 |
|
Gregory Nutt
|
9d653bdfee
|
Support for the STM32F429 from Ken Pettit
|
2013-11-07 16:47:43 -06:00 |
|
Gregory Nutt
|
cdc9bafd54
|
SAMA5 SSC: Mostly cosmetic name changes
|
2013-11-07 16:13:48 -06:00 |
|
Gregory Nutt
|
4214dc9ce9
|
SAMA5 SSC: Add framework (only) for a forthcoming SSC-based I2S driver
|
2013-11-07 12:26:53 -06:00 |
|
Gregory Nutt
|
e231270215
|
SAMA5 PWM: PWM driver is now functional
|
2013-11-07 09:17:46 -06:00 |
|
Gregory Nutt
|
27c8c83b91
|
SAMA5 PWM: Cosmetic changes to debug output
|
2013-11-06 14:46:19 -06:00 |
|
Gregory Nutt
|
3aa348035d
|
SAMA5D3x-EK: Add support board-specific PWM testing
|
2013-11-06 14:38:19 -06:00 |
|
Gregory Nutt
|
b5791ac7a6
|
SAMA5 PWM: Driver now in build and configuration system
|
2013-11-06 12:24:51 -06:00 |
|
Gregory Nutt
|
e73d77c73f
|
SAMA5 PWM: Add first cut at PWM driver
|
2013-11-06 10:55:12 -06:00 |
|
Gregory Nutt
|
7394517bab
|
NSH library: Allow USB trace without a USB console
|
2013-11-06 07:09:00 -06:00 |
|
Gregory Nutt
|
4cb6c0ad80
|
STM32 F1 USB device: Fix handling of EP0 start for large buffers; Add support for decoded USB trace strings. From Davice Sidrane
|
2013-11-05 08:56:06 -06:00 |
|
Gregory Nutt
|
b33123a8f7
|
SAMA5 CAN: Don't enable some many useless error interrupts
|
2013-11-04 11:29:16 -06:00 |
|
Gregory Nutt
|
b9130ff601
|
SAMA5 CAN: Fix a data alignment problem
|
2013-11-03 10:41:24 -06:00 |
|
Gregory Nutt
|
ad791dd275
|
Fixing typos from previous check-ins. Also, missed the ARMv7 IDLE stack coloration
|
2013-11-01 16:06:43 -06:00 |
|
Gregory Nutt
|
3f81d6f0b3
|
Port IDLE/interrupt stack coloration to ARM and ARMv7-A architectures
|
2013-11-01 15:30:18 -06:00 |
|
Gregory Nutt
|
f8b3dbaa61
|
Extend stack debug logic to include IDLE and interrupt stacks. Also color the heap as well. Based on suggestions from David Sidrane
|
2013-11-01 11:16:51 -06:00 |
|
Gregory Nutt
|
532d4c7cbe
|
arch/arm/src/stm32/stm32_usbdev.c: On a failure to bind the class driver, the driver reference was being nullified too soon. This caused an exception in usbdev_reset() later. The driver reference will be null
ified later usbdev_unregister when the caller gets the error. From David Sidrane
|
2013-10-31 15:27:52 -06:00 |
|
Gregory Nutt
|
aebeb50a91
|
SAMA5 PWM register definition header file
|
2013-10-31 10:33:43 -06:00 |
|
Gregory Nutt
|
37d8faff37
|
SAMA5 SSC: Add SSC register definition header file
|
2013-10-30 16:15:51 -06:00 |
|
Gregory Nutt
|
d9f16bba82
|
apps/platform: A new now for platform-specific applicatin code
|
2013-10-30 09:04:37 -06:00 |
|
Gregory Nutt
|
1d5b786fa2
|
Minor changes while pondering a camera interface
|
2013-10-29 16:57:06 -06:00 |
|
Gregory Nutt
|
3fd4629bd7
|
SAMA5 ADC: Seems functional in all modes including DMA
|
2013-10-28 10:08:12 -06:00 |
|
Gregory Nutt
|
1027d9f751
|
STM32 SPI DMA: Fix related to CONFIG_STM32_DMACAPABLE from Ken Pettit
|
2013-10-27 16:23:44 -06:00 |
|
Gregory Nutt
|
da251ade8b
|
SAMA5 ADC: If DMA is enabled, then you should be able to configuration larger DMA transfers
|
2013-10-27 12:04:37 -06:00 |
|
Gregory Nutt
|
d04952385f
|
SAMA5 ADC: Fix sample frequency scaling and sequencer setup
|
2013-10-27 10:29:07 -06:00 |
|
Gregory Nutt
|
509f08daa9
|
SAMA5 ADC: Correct setup of time compare registers
|
2013-10-27 09:35:30 -06:00 |
|
Gregory Nutt
|
c534eb262e
|
SAM3/4 serial: Same supersitituous change as for SAMA5
|
2013-10-26 16:17:07 -06:00 |
|
Gregory Nutt
|
ba6fe788ea
|
SAMA5 serial: Restore logic to minimize TX interrupts. Oddly, seems to improve ADC stability
|
2013-10-26 16:02:07 -06:00 |
|
Gregory Nutt
|
0ab6d8382f
|
SAMA5 TC: Debug instrumentation
|
2013-10-26 14:03:30 -06:00 |
|
Gregory Nutt
|
ff682d5292
|
SAMA5: Register definition file for camera interface
|
2013-10-26 08:25:58 -06:00 |
|
Gregory Nutt
|
2226a44b2a
|
arch/arm/src/sama5/sam_adc.c: Remove a warning
|
2013-10-25 15:18:32 -06:00 |
|
Gregory Nutt
|
f39467339e
|
Add ioctl to support software triggering of ADC/DAC conversions
|
2013-10-25 14:19:09 -06:00 |
|
Gregory Nutt
|
b3afc8bd75
|
sam_tc.c: Fix a timer initialization bug
|
2013-10-25 10:05:00 -06:00 |
|
Gregory Nutt
|
4647775ed2
|
SAMA5 ADC+TC: Several updates/fixes from ongoing debug
|
2013-10-25 08:46:57 -06:00 |
|
Gregory Nutt
|
1668aa408e
|
SAMA5 ADC+TC: Early debug fixes + lots of new debug instrumentation
|
2013-10-24 16:50:51 -06:00 |
|
Gregory Nutt
|
28d50790f2
|
SAMA5D3x-EK: Add support for app/examples/adc
|
2013-10-24 15:39:56 -06:00 |
|
Gregory Nutt
|
da7a3d9c9a
|
SAMA5: Add ADC-side of the logic to hook in timer/counter logic needed to drive periodic ADC sampling
|
2013-10-24 13:56:23 -06:00 |
|
Gregory Nutt
|
aab5b6b2d9
|
SAMA5: Hook in timer/counter logic so that it can driver periodic ADC sampling
|
2013-10-24 12:35:42 -06:00 |
|
Gregory Nutt
|
ec84f19454
|
STM32 PWM and ADC: Add some bits that should have been cleared. From Martin Lederhilger
|
2013-10-24 08:27:09 -06:00 |
|
Gregory Nutt
|
f10069907a
|
Add support for the STM32F207ZE chip. From Martin Lederhilger
|
2013-10-24 08:25:05 -06:00 |
|
Gregory Nutt
|
e5b093cd3a
|
Remove carriage returns from SAMA5 TC files just commited
|
2013-10-23 15:39:00 -06:00 |
|
Gregory Nutt
|
f6f2d2b961
|
SAMA5 Timer/counter library
|
2013-10-23 14:53:37 -06:00 |
|
Gregory Nutt
|
fe0f5ce44b
|
STM32 F1 DAM fix from David Sidrane
|
2013-10-23 14:05:26 -06:00 |
|
Gregory Nutt
|
69e49938f0
|
SAMA5 CAN: Update readme on how to configure CAN
|
2013-10-23 11:32:12 -06:00 |
|
Gregory Nutt
|
e019782db5
|
Update Changelog
|
2013-10-23 09:13:28 -06:00 |
|
Gregory Nutt
|
e5c2496d6a
|
SAMA5 CAN: Driver is now code complete but still untested
|
2013-10-22 15:47:52 -06:00 |
|
Gregory Nutt
|
f5674c21fa
|
SAMA5: Beginning of a CAN driver
|
2013-10-21 15:52:23 -06:00 |
|
Gregory Nutt
|
781119c0e6
|
SAMA5 CAN: Add register definition file
|
2013-10-21 12:22:27 -06:00 |
|
Gregory Nutt
|
ba1ea91e37
|
SAMA5 TC: Add timer/counter register definition file
|
2013-10-20 14:47:02 -06:00 |
|
Gregory Nutt
|
dbeee18171
|
SAMA5 TRNG: /dev/random appears to be functional
|
2013-10-20 12:08:39 -06:00 |
|
Gregory Nutt
|
0ebdbfbc88
|
SAMA5 TRNG: Add a /dev/random driver based on the SAMA5D3 TRNG peripheral
|
2013-10-20 11:38:31 -06:00 |
|
Gregory Nutt
|
891c463381
|
SAMA5 WDT driver is now functional
|
2013-10-20 09:24:30 -06:00 |
|
Gregory Nutt
|
cc4c4f4593
|
SAMA5 WDT: Miss watchdog fixes
|
2013-10-20 08:24:05 -06:00 |
|
Gregory Nutt
|
6ee8857f9b
|
SAMA5: Initial WDT timer (untested)
|
2013-10-19 12:26:47 -06:00 |
|
Gregory Nutt
|
8954161288
|
SAMA5: Hook RTC into build system; Finish RTC alarm logic; Verify correct behavior of the basic RTC functionality
|
2013-10-19 10:41:20 -06:00 |
|
Gregory Nutt
|
a1df31266c
|
SAMA5: Add GPBR register definitions
|
2013-10-19 10:22:21 -06:00 |
|
Gregory Nutt
|
b05bf917b8
|
SAMA5 RTC: Beginning of an RTC driver for the SAMA5
|
2013-10-18 16:56:46 -06:00 |
|
Gregory Nutt
|
2137ef96c0
|
SAMA5: Add RTC and WDT register definition header files
|
2013-10-18 14:47:50 -06:00 |
|
Gregory Nutt
|
aa51df493a
|
STM32 DMA Priority: Select the correct default for F1 and other family members
|
2013-10-18 14:13:53 -06:00 |
|
Gregory Nutt
|
d72a99bc64
|
SAMA5 LCD: Move framebuffers to center of free memory region. That creates a guard band around the framebuffers that gives a little protection from any bad writes into the framebuffer
|
2013-10-18 10:11:20 -06:00 |
|
Gregory Nutt
|
46bf97abfc
|
Add SDIO preflight method
|
2013-10-18 08:15:09 -06:00 |
|
Gregory Nutt
|
944e0fe81d
|
Changes to stm32_dmacapable interfaces from Mike Smith
|
2013-10-18 08:06:23 -06:00 |
|
Gregory Nutt
|
973d11f625
|
STM32 DMA priority corrections from Mike Smith
|
2013-10-18 07:37:24 -06:00 |
|
Gregory Nutt
|
2b70abad0d
|
Typo fixes for UART7 and UART8 DMA configs. From Mike Smith
|
2013-10-18 07:17:55 -06:00 |
|
Gregory Nutt
|
1143b537c2
|
SAMA5 TSD: Fix to prohibit reading samples when not valid
|
2013-10-17 17:26:06 -06:00 |
|
Gregory Nutt
|
d71289dd43
|
STM32 F103C: Correct some errors in pinmapping. From David Sidrane
|
2013-10-16 07:26:41 -06:00 |
|
Gregory Nutt
|
87d8d3a7d5
|
Misc changes to README files; Update SAMA5D3x-EK NxWM configuration to use Calibration instruction messages
|
2013-10-14 14:53:38 -06:00 |
|
Gregory Nutt
|
fa71c8211c
|
SAMA5 LCDC: Correct how framebuffer memory was being mapped; Remove options to get framebuffer memory in various. Because of the mapping and aligment requirements, those options really cannot be supported
|
2013-10-13 13:08:05 -06:00 |
|
Gregory Nutt
|
3cfe4c2113
|
SAMA5 LCDC: Move framebuffer to lower memory; I suspect some corruption by interference
|
2013-10-13 10:42:14 -06:00 |
|
Gregory Nutt
|
02f7c5d8d5
|
SAMA5 LCDC: Fixed backlight PWM divider. Backlight no longer flashes
|
2013-10-11 17:12:35 -06:00 |
|
Gregory Nutt
|
e9187d3199
|
SAMA5 LCDC: Wait when the LCDC is resynchronizing (SIF); Try start-up parameters from Barebox (this still don't work)
|
2013-10-10 18:44:08 -06:00 |
|
Gregory Nutt
|
de5ae1a584
|
SAMA5 LCDC: Default resolution if now RGB565; Add option to select a different output resolution than the sofware resolution (needs to the 24BPP for this LCD).
|
2013-10-10 18:41:42 -06:00 |
|
Gregory Nutt
|
b641545f93
|
SAMA5 LCDC: Move DMA descriptors out of internal SRAM and into SDRAM. I am not completely clear, but it looks like the LCDC cannot support DMA from internal SRAM
|
2013-10-10 12:02:41 -06:00 |
|
Gregory Nutt
|
0a81f51502
|
SAMA5: Allow portions of external memory to be added to the heap instead of the whole thing
|
2013-10-10 12:00:32 -06:00 |
|
Gregory Nutt
|
8ae85daf3d
|
SAMA5 LCDC: Fix a few compilation errors that show up when additional layers are enabled
|
2013-10-09 18:46:05 -06:00 |
|
Gregory Nutt
|
03ebf1cf4a
|
SAMA5 LCDC: Few more bug fixes but still not working
|
2013-10-09 18:22:21 -06:00 |
|
Gregory Nutt
|
ff64ccb539
|
SAMA5 LCDC: Corrections from first debug sessions. Still a way to go
|
2013-10-09 13:21:27 -06:00 |
|
Gregory Nutt
|
f8397f8238
|
SAMA5: LCDC driver incorporated into the build system.
|
2013-10-08 15:30:38 -06:00 |
|
Gregory Nutt
|
1807a662a8
|
SAMA5: LCD driver is code complete but untested
|
2013-10-08 12:16:30 -06:00 |
|
Gregory Nutt
|
0907691978
|
SAMA5: More LCDC driver progress
|
2013-10-08 08:57:48 -06:00 |
|
Gregory Nutt
|
8238ea7477
|
SAMA5: More LCDC driver progress
|
2013-10-07 15:54:08 -06:00 |
|
Gregory Nutt
|
ed980b51f7
|
SAMA5: LCDC driver progress
|
2013-10-07 12:05:16 -06:00 |
|
Gregory Nutt
|
d3fa588250
|
SAMA5 LCDC: Add 'skeleton' files that will eventually become an LCDC driver for the SAMA5
|
2013-10-06 09:08:52 -06:00 |
|
Gregory Nutt
|
3325c192f5
|
SAMA5: Completes LDCDC register definition file
|
2013-10-04 15:43:19 -06:00 |
|
Gregory Nutt
|
d7426cd34d
|
SAMA5: Add LCD register definition header file
|
2013-10-04 10:11:12 -06:00 |
|
Gregory Nutt
|
a8951de086
|
SAMA5: Touchscreen driver now works
|
2013-10-04 08:03:38 -06:00 |
|
Gregory Nutt
|
6ca0850605
|
SAMA5: First changes from touchscreen debug
|
2013-10-03 17:11:30 -06:00 |
|
Gregory Nutt
|
9d6bfb5238
|
SAMA5: ADC and touchscreen drivers now build without errors
|
2013-10-03 14:32:21 -06:00 |
|
Gregory Nutt
|
a4123ed6d5
|
SAMA5: Integrate touchscreen and ADC drivers into the build
|
2013-10-03 12:49:13 -06:00 |
|
Gregory Nutt
|
6c8d7f2184
|
SAMA5 ADC and touchscreen: Drivers are code complete and ready for test
|
2013-10-03 10:06:14 -06:00 |
|
Gregory Nutt
|
97a4ecb306
|
SAMA Touchscreen/ADC: More progress
|
2013-10-02 16:55:22 -06:00 |
|
Gregory Nutt
|
fee65851ca
|
Add framework for Spark Core board support. The initial commit is a clone of the Maple Mini and still needs Spark customizations
|
2013-10-02 08:24:46 -06:00 |
|
Gregory Nutt
|
e92ed407aa
|
SAMA5 ADC/Touchscreen: A little more logic
|
2013-10-01 14:40:34 -06:00 |
|
Gregory Nutt
|
efb1695c0c
|
KL: Now builds up_puts
|
2013-10-01 11:51:27 -06:00 |
|
Gregory Nutt
|
9a634c882d
|
KL: Missing header file in low level getc logic
|
2013-10-01 11:25:01 -06:00 |
|
Gregory Nutt
|
a737c93ea2
|
SAMA5 touchscreen and ADC: A little more progress
|
2013-10-01 11:23:24 -06:00 |
|
Gregory Nutt
|
4cecf0b618
|
SAMA5 ADC/Touchscreen: A little more progress. Still not complete
|
2013-09-30 14:28:42 -06:00 |
|
Gregory Nutt
|
50123bd30f
|
Add freedom-kl25z/minnsh configuration: This is an experiment to see just how small we and get an NSH configuration. From Alan Carvalho de Assis.
|
2013-09-30 09:20:11 -06:00 |
|
Gregory Nutt
|
0a1a68b77a
|
KL25Z: Add low-level up_lowgetc function that can be used to provide an NSH console when the file system (and hence the serial driver) is disabled. From Alan Carvalho de Assis
|
2013-09-30 09:15:31 -06:00 |
|
Gregory Nutt
|
3e09f94985
|
KL25Z: Add low-level up_lowgetc function that can be used to provide an NSH console when the file system (and hence the serial driver) is disabled. From Alan Carvalho de Assis
|
2013-09-30 09:11:54 -06:00 |
|
Gregory Nutt
|
744f3776b7
|
SAMA5: Framework for an touchscreen driver (incomplete)
|
2013-09-30 09:04:21 -06:00 |
|
Gregory Nutt
|
ecd7502c34
|
SAMA5 ADC: Framework for an ADC driver (incomplete)
|
2013-09-30 07:22:34 -06:00 |
|
Gregory Nutt
|
0e02d2b7b4
|
SAMA5 ADC: Beginning ADC register definition file
|
2013-09-29 18:34:09 -06:00 |
|
Gregory Nutt
|
54b1275de9
|
Work around a start-up error in the GMAC that I still do not understand
|
2013-09-29 16:46:22 -06:00 |
|
Gregory Nutt
|
7ee6ded1c2
|
SAMA5 GMAC: Various fixes from initial debug
|
2013-09-29 15:03:57 -06:00 |
|
Gregory Nutt
|
c038f4efe0
|
Dependency generation fix for directories that keep object files in a sub-directory
|
2013-09-29 11:46:10 -06:00 |
|
Gregory Nutt
|
417f67c132
|
Clean up some naming: fd vs. fildes vs. filedes and filep vs filp
|
2013-09-28 16:50:07 -06:00 |
|
Gregory Nutt
|
7b9b7cbdec
|
configs/compal_e88 converted to use the kconfig-frontends tools
|
2013-09-27 16:12:44 -06:00 |
|
Gregory Nutt
|
f7e4f25760
|
SAMA5 GMAC and GMII support is code complete and ready for test
|
2013-09-27 13:12:04 -06:00 |
|
Gregory Nutt
|
cdb56b81b8
|
Networking: Fix backward conditional in test to see if address is in ARP table. From Max Holtzberg
|
2013-09-27 08:27:35 -06:00 |
|
Gregory Nutt
|
e4af9572d0
|
Beginng of support for GMII/RGMII PHYs
|
2013-09-26 15:55:21 -06:00 |
|
Gregory Nutt
|
d417ff6460
|
SAMA5 GMAC: Initial driver check-in is just the EMAC driver forced to compile with the GMAC register definitions
|
2013-09-26 10:35:52 -06:00 |
|
Gregory Nutt
|
3c4f9926c9
|
SAMA5: Completes GMAC register definition header file
|
2013-09-26 09:13:14 -06:00 |
|
Gregory Nutt
|
bbccd73dd0
|
SAMA5 EMAC: Need to pace RX and TX because and RX can result in a TX; Process TX interrupt events before TX interrupt events for the same reason
|
2013-09-25 14:22:35 -06:00 |
|
Gregory Nutt
|
4a99a9e2e3
|
SAMA5 EMAC: Add some need D-Cache Flush/Invalidate operations. Add support for CONFIG_NET_DUMPPACKET
|
2013-09-25 11:51:49 -06:00 |
|
Gregory Nutt
|
d3daad87f1
|
Move CONFIG_NET_DUMPPACKET from LPC17 and STM32 to commong network drivers. Automatically enabled CONFIG_NETDEVICES when any Ethernet driver is enabled
|
2013-09-25 11:50:31 -06:00 |
|
Gregory Nutt
|
22fe508443
|
Move CONFIG_NET_DUMPPACKET from LPC17 and STM32 to commong network drivers. Automatically enabled CONFIG_NETDEVICES when any Ethernet driver is enabled
|
2013-09-25 11:50:05 -06:00 |
|
Gregory Nutt
|
788d1623ae
|
Fix badly applied patch to ENCX24J600
|
2013-09-25 08:26:56 -06:00 |
|
Gregory Nutt
|
9a9fc90794
|
SAMA5 UDPHS: Dont' reject read request submissions while stalled. That causes an infinite loop. When stalling, cancel all pending write requests, but cancel only a reqd request if it is in progress. It will be immediately requeued
|
2013-09-24 15:06:17 -06:00 |
|
Gregory Nutt
|
446ced4799
|
Comment out assertion that apparently fires inappropriately
|
2013-09-24 15:01:25 -06:00 |
|
Gregory Nutt
|
2de3781ebf
|
Slightly improved debug output
|
2013-09-24 13:47:03 -06:00 |
|
Gregory Nutt
|
5d192f72e3
|
Stack monitor fixes
|
2013-09-24 12:14:52 -06:00 |
|
Gregory Nutt
|
7affa54e7e
|
Standardize stack checking interface
|
2013-09-24 11:45:13 -06:00 |
|
Gregory Nutt
|
9bb771b8b8
|
SAMA5 UDPHS: Minor clean-up of STALL logic
|
2013-09-23 18:10:41 -06:00 |
|
Gregory Nutt
|
c68c0cb268
|
SAMA5 HSMCI: Disable TX DMA. it is not reliable
|
2013-09-23 13:54:32 -06:00 |
|
Gregory Nutt
|
a1220e3440
|
SAMA5 HSMCI DMA clean-up. There are still some issues
|
2013-09-23 11:25:39 -06:00 |
|
Gregory Nutt
|
773a693ee2
|
Cosmetic changes to comments and coding style fixes
|
2013-09-22 14:48:22 -06:00 |
|
Gregory Nutt
|
8a1e33cb10
|
Un-neccesary, cosmetic changes to label names and comments
|
2013-09-22 08:54:06 -06:00 |
|
Gregory Nutt
|
3ceac07042
|
SAMA5 OHCI: Back out a change, the real root cause was a bug in the cache logic so the hack is no longer necessary
|
2013-09-22 07:53:51 -06:00 |
|
Gregory Nutt
|
9cb23c5ccb
|
ARMv7-A: Fix some error in alignment to cache line boundaries in the cache operations
|
2013-09-21 15:47:00 -06:00 |
|
Gregory Nutt
|
d31d809bbf
|
SAMA5 OHCI: Fix some strange Dcache problems that I still don't understand; end address on cache operations is end+1, not end
|
2013-09-21 12:21:10 -06:00 |
|
Gregory Nutt
|
c900c580ae
|
ARMv7-A: Clarify end address paramet in cache operations: It is the end+1 address, not the end address
|
2013-09-21 12:16:34 -06:00 |
|
Gregory Nutt
|
34804c8ee7
|
SAMA5 OHCI: Fix some problems with D-Cache coherency and physical addressing related to interrupt endpoints
|
2013-09-20 15:22:09 -06:00 |
|
Gregory Nutt
|
dbf07d6d01
|
SAMA5 OHCI: When UPLL drives OHCI the logically correct divider of 10 does not work; But a divider of 5 does. Why?
|
2013-09-19 16:10:46 -06:00 |
|
Gregory Nutt
|
92617fade5
|
SAMA5 EHCI: Fix bits being clobbered in PORTSC on hand-off to OHCI. OHCI: Fix some more trace configuration issues. Both: Don't muck with SFR port selection bits once they have been initialized
|
2013-09-19 10:52:33 -06:00 |
|
Gregory Nutt
|
1600e02962
|
More USB host trace conditional compilation problems
|
2013-09-19 09:08:55 -06:00 |
|
Gregory Nutt
|
ac3dfce614
|
Fix inconsistency in USB host tracing definitions
|
2013-09-19 08:46:33 -06:00 |
|
Gregory Nutt
|
0c62e5797e
|
SAMA5: Add support for the FPU OS test
|
2013-09-18 10:35:03 -06:00 |
|
Gregory Nutt
|
8f88387712
|
LPC17xx SPI: Remove an unused static prototype that caused a compile time warning
|
2013-09-17 17:14:08 -06:00 |
|
Gregory Nutt
|
14ac82c11c
|
SAMA5 EMAC: Changes from early debug sessions. Still a way to go
|
2013-09-17 15:52:19 -06:00 |
|
Gregory Nutt
|
226839692d
|
SAMA5 EMAC: Resolve issues with DUAL PHY support needed for both EMAC and GMAC peripherals. EMAC driver is now code complete and builds without complaint
|
2013-09-17 10:55:13 -06:00 |
|
Gregory Nutt
|
e7479e9b9d
|
Add prefex ETH0 to all PHY configurations to support multiple NICs
|
2013-09-17 10:45:07 -06:00 |
|
Gregory Nutt
|
b06216ff11
|
SAMA4 EMAC: Remove some editor garbage that ended up in the last commit
|
2013-09-16 18:04:38 -06:00 |
|
Gregory Nutt
|
7ef1bd2f4c
|
SAMA5 EMAC: Add basic PHY logic
|
2013-09-16 18:00:21 -06:00 |
|
Gregory Nutt
|
50fd028680
|
SAMA5 EMAC: Packet transmission logic
|
2013-09-16 14:58:11 -06:00 |
|
Gregory Nutt
|
09e6c653cc
|
SAMA4 EMAC: Add basic interrupt handling logic
|
2013-09-16 13:57:57 -06:00 |
|
Gregory Nutt
|
9d59d5ef13
|
SAMA5 EMAC: Incremental progress. Still not code complete
|
2013-09-16 11:36:12 -06:00 |
|
Gregory Nutt
|
af61f846f9
|
Freescale Kinetis KL25Z PIT and TPM module register definitions
|
2013-09-15 17:00:50 -06:00 |
|
Gregory Nutt
|
285f5201dc
|
SAMA4 EMAC buffer allocation logic
|
2013-09-15 14:26:25 -06:00 |
|
Gregory Nutt
|
ed7c7a25e7
|
SAMA5 Ethernet: Add support for PHY interrupts
|
2013-09-15 12:24:42 -06:00 |
|
Gregory Nutt
|
58dad361b8
|
SAMA5: Update Ethernet initalization logic to handle both EMAC and GMAC
|
2013-09-14 08:19:36 -06:00 |
|
Gregory Nutt
|
14b3417a85
|
SAMA5 EMAC: Create a empty, skeleton file that will eventually become the SAMA5 EMAC driver
|
2013-09-13 15:04:46 -06:00 |
|
Gregory Nutt
|
50f482f902
|
STM32: Support for the LeafLabs Maple and Maple Mini boards. From Librae
|
2013-09-13 12:45:33 -06:00 |
|
Gregory Nutt
|
b5bdde09cc
|
STM32 Kconfig: Fix STM32 UART7/8 kconfig names and UART DMA. Provided by Lorenz Meier
|
2013-09-13 11:45:32 -06:00 |
|
Gregory Nutt
|
b5254cc5af
|
Make filter register accessible for CAN1 and CAN2. Provided by Lorenz Meier
|
2013-09-13 11:20:10 -06:00 |
|
Gregory Nutt
|
7e33cee02f
|
SAMA5 EMAC and GMAC: More additions to register definition files
|
2013-09-13 03:35:56 -06:00 |
|
Gregory Nutt
|
f2f40f35bd
|
SAMA5: Beginning of EMAC and GMAC register definition header files
|
2013-09-12 15:45:12 -06:00 |
|
Gregory Nutt
|
c839aa84ca
|
SAMA5D3x-EK README update
|
2013-09-12 14:17:56 -06:00 |
|
Gregory Nutt
|
4e0c905d61
|
SAMA5 TWI: Misc improvements during debug (still not getting interupts)
|
2013-09-12 12:25:31 -06:00 |
|
Gregory Nutt
|
0330eea54d
|
SAMA5 TWI: Cleanup compilation errors that occur when I2C debug is enabled
|
2013-09-12 09:46:20 -06:00 |
|
Gregory Nutt
|
b3194bd5e5
|
SAMA5 TWI: Add support for I2C readwrite and transfer methods
|
2013-09-11 17:52:23 -06:00 |
|
Gregory Nutt
|
b5eed8c9cb
|
SAMA5: Barebones TWI driver implementation
|
2013-09-11 16:48:56 -06:00 |
|
Gregory Nutt
|
382a066eae
|
SAMA5: Framework for a TWI driver (incomplete)
|
2013-09-11 12:28:52 -06:00 |
|
Gregory Nutt
|
e49069b92b
|
SAMA5: TWI register definition file
|
2013-09-11 10:23:46 -06:00 |
|
Gregory Nutt
|
7391afb5c2
|
SAMA5D3x-EK demo configuration now supports HSMCI0 and HSMCI1
|
2013-09-11 09:50:36 -06:00 |
|
Gregory Nutt
|
462dd6936c
|
Clean-up a few USB trace formats
|
2013-09-10 16:17:06 -06:00 |
|
Gregory Nutt
|
990d3a65a4
|
SAMA5: Add tracing support to the OHCI driver
|
2013-09-10 16:01:44 -06:00 |
|
Gregory Nutt
|
89c829d1ae
|
SAMA5 EHCI: Did not work with DEBUG off. Appears to be because of some D-Cache flushing that was performed only with DEBUG ON. Now is unconditional
|
2013-09-10 10:12:51 -06:00 |
|
Gregory Nutt
|
c6bf25bca0
|
Extent the the USB host trace logic to include verbose debug output
|
2013-09-09 17:27:21 -06:00 |
|
Gregory Nutt
|
3ba64b0cfe
|
USB monitor extended so that it can also be used with USB host trace data
|
2013-09-09 15:02:33 -06:00 |
|
Gregory Nutt
|
fbd5ab0758
|
Beginning of support for USB host side tracing
|
2013-09-09 14:01:52 -06:00 |
|
Gregory Nutt
|
a992004b0e
|
USB MSC host class driver: Don't bother retrying to initialize the FLASH if the interface is returning fatal transfer errors
|
2013-09-09 10:00:16 -06:00 |
|
Gregory Nutt
|
40f84dfa19
|
Trivial updates assocaited with USB host mass storage and SAMA5 EHCI
|
2013-09-08 13:42:56 -06:00 |
|
Gregory Nutt
|
59f6aeefd2
|
SAMA5: Add support EHCI/OHCI to sama5d3x-ek/demo (does not work yet); Fix some EHCI/OHCI compilation issues when DEBUG is disabled
|
2013-09-07 11:43:06 -06:00 |
|
Gregory Nutt
|
e30cb1d470
|
SAMA5D3x-EK: Add a new 'demo' configuration
|
2013-09-06 11:40:46 -06:00 |
|
Gregory Nutt
|
fb37248343
|
CDC/ACM and PL2303 device drivers: Don't use the max packet size assigned to an endpoint in order to determine the request buffer size. The endpoint has not yet been configured that max packet size may be wrong.
|
2013-09-05 18:00:16 -06:00 |
|
Gregory Nutt
|
6dae945fb0
|
SAMA5 UDPHS: Fix bad setup for sam_req_write call introduce in last commit
|
2013-09-05 15:51:27 -06:00 |
|
Gregory Nutt
|
d0923ee830
|
SAMA5 UDPHS: Major changes to DMA interrupt and request handling to better handle DMA
|
2013-09-05 14:33:27 -06:00 |
|
Gregory Nutt
|
4377b4f5e8
|
SAMA5 UDPHS: Fix DMA channel vs. matching endpoint
|
2013-09-04 15:08:19 -06:00 |
|
Gregory Nutt
|
8c64ca58b2
|
SAMA5 UDPHS: More USB fixes mostly related to byte counts, endpoint configuration, and dma configuration
|
2013-09-04 13:36:52 -06:00 |
|
Gregory Nutt
|
a478b680a3
|
SAMA5 UDPHS: More zero length packet fixes; revamped request queue structures
|
2013-09-04 09:48:08 -06:00 |
|
Gregory Nutt
|
a9a8801472
|
SAMA5 UDPHS: Fixes related to null packet and SETUP OUT data handling
|
2013-09-03 19:13:34 -06:00 |
|
Gregory Nutt
|
d294826cfd
|
SAMA5 UDPHS: Small change to zero length packet handling
|
2013-09-03 16:24:11 -06:00 |
|
Gregory Nutt
|
10da3662e4
|
SAMA5 UDPHS: Fix some issues with TX interrupt handling
|
2013-09-03 14:53:10 -06:00 |
|
Gregory Nutt
|
43a62c63d9
|
SAMA5 UDPHS: A little debugging progress. Not all transfers are working yet
|
2013-09-03 13:09:50 -06:00 |
|
Gregory Nutt
|
84439348df
|
SAMA5 UDPHS: Changes from initial debug session. Still a long way to go
|
2013-09-02 16:59:07 -06:00 |
|
Gregory Nutt
|
37579db920
|
SAMA5 UDPHS: Fixes related to soft connect pullup and DMA buffer allocation
|
2013-09-02 14:55:33 -06:00 |
|
Gregory Nutt
|
c162cca9e8
|
SAMA5 UDPHS: Some very early debug corrections. Not yet working.
|
2013-09-02 12:26:15 -06:00 |
|
Gregory Nutt
|
742e89783b
|
SAMA5 UDPHS: Add logic to handle deferred address setting; add logic to handle EP0 SETUP OUT data
|
2013-09-02 10:08:18 -06:00 |
|
Gregory Nutt
|
393b44f059
|
STM32 Timer Register Bit Definitions: Some CCER bit settings changed per SourceForge bug #18 submitted by CCCTSAO
|
2013-09-02 08:01:09 -06:00 |
|
Gregory Nutt
|
387795ecdf
|
SAMA5 UDPHS: Clean up some write request handling
|
2013-09-01 16:56:22 -06:00 |
|
Gregory Nutt
|
66b5ed14d5
|
SAMA5 UDPHS: Resolve a few of easier REVISIT pre-processor warnings
|
2013-09-01 15:36:17 -06:00 |
|
Gregory Nutt
|
8587026c18
|
SAMA5 UPPHS: Fix a small mountain of compilation errors. Still things to REVISIT so it is not ready for test
|
2013-09-01 11:31:12 -06:00 |
|
Gregory Nutt
|
5c950889cf
|
SAMA5 UDPHS: Support USPHS clock configuration
|
2013-09-01 11:29:51 -06:00 |
|
Gregory Nutt
|
f4c1568c17
|
SAMA UDPHS: Add pull-up and stall logic. Added to build system but does not yet build
|
2013-08-31 17:37:51 -06:00 |
|
Gregory Nutt
|
9d2f55ca97
|
SAMA5 UDPHS: Add endpoint configuration and read DMA logic
|
2013-08-31 12:20:00 -06:00 |
|
Gregory Nutt
|
8df66532ce
|
SAMA5 UDPHS: Bring in UDPHS endpoint interrupt handling logic
|
2013-08-31 10:43:58 -06:00 |
|
Gregory Nutt
|
4a9748dfdf
|
SAMA5 UDPHS: Write DMA logic added. Still incomplete
|
2013-08-30 15:41:06 -06:00 |
|
Gregory Nutt
|
6548308982
|
SAMA5: Updated UDPHS driver. Still incomplete
|
2013-08-30 14:51:41 -06:00 |
|
Gregory Nutt
|
024da6049d
|
SAMA5 UDPHS interrupt decoding logic
|
2013-08-29 18:11:34 -06:00 |
|
Gregory Nutt
|
8c92beb70e
|
SAMA5 UDPHS interrupt decoding logic
|
2013-08-29 17:34:05 -06:00 |
|
Gregory Nutt
|
3b1323a74b
|
SAMA5: Initial framework for a UDPHS USB device side driver
|
2013-08-29 16:29:27 -06:00 |
|
Gregory Nutt
|
be88385911
|
SAMA5: Add high-speed USB register definition header file
|
2013-08-28 17:50:05 -06:00 |
|
Gregory Nutt
|
e862d5d197
|
SAMA5 EHCI: Implemented (but did not test) interrupt endpoint logic
|
2013-08-28 13:07:35 -06:00 |
|
Gregory Nutt
|
1ab10a20bd
|
SAMA5 EHCI: Correct and extend pool allocation logic; Fix data toggle values
|
2013-08-28 10:03:48 -06:00 |
|
Gregory Nutt
|
beb58c2520
|
SAMA5: Fixes a bug in the way that the heap regions were being allocated
|
2013-08-27 16:43:19 -06:00 |
|
Gregory Nutt
|
a3af5b3aaf
|
SAMA5 OHCI+EHCI: Using cp15_clean instead of cp15_coherent; EHCI: Need to set alt pointer in order to handle short transfers.
|
2013-08-27 13:07:21 -06:00 |
|
Gregory Nutt
|
bc46b447dc
|
Fix all occurrences of "the the" in documentation and comments
|
2013-08-27 09:40:19 -06:00 |
|
Gregory Nutt
|
c5802dd5a0
|
Add hooks to select Cortex-A8
|
2013-08-27 08:46:37 -06:00 |
|
Gregory Nutt
|
18126a5fd4
|
SAMA4 EHCI: Correct some backward conditional compilation; fix some warnings
|
2013-08-26 17:03:52 -06:00 |
|
Gregory Nutt
|
12beaf4b1a
|
Add a new method to the USB host driver interface: getdevinfo. This method will return information about the currently connected device. At present, it only returns the device speed. The speed is needed by the enumeration logic in order to set a credible initial EP0 max packet size
|
2013-08-26 15:46:16 -06:00 |
|
Gregory Nutt
|
8130f5bd64
|
SAMA5 EHCI: Status phase is the opposite direction as the data phase
|
2013-08-26 14:28:13 -06:00 |
|
Gregory Nutt
|
40525cedcd
|
SAMA5 EHCI: Taking direction from wrong bit in SETUP request; need to flush data buffer before starting SETUP request
|
2013-08-26 11:05:23 -06:00 |
|
Gregory Nutt
|
03ad60426d
|
#17 Fix if CONFIG_SDIO_BLOCKSETUP defined, OS will crash. From CCTSAO
|
2013-08-26 08:54:46 -06:00 |
|
Gregory Nutt
|
b3df0c1037
|
SAMA5 EHCI: Data toggle and status phase fixes
|
2013-08-25 14:45:08 -06:00 |
|
Gregory Nutt
|
bea6894bd7
|
EHCI reset bit was not being set correctly
|
2013-08-25 10:46:41 -06:00 |
|
Gregory Nutt
|
f1a20f49ff
|
SAMA5 OHCI: Fix semaphore handling bug. OHCI is now function by itself again after changes to integrate with EHCI
|
2013-08-25 08:57:35 -06:00 |
|
Gregory Nutt
|
042abb0856
|
SAMA5 OHCI: Fix backward conditional compilation. Clean-up OHCI/EHCI debug output
|
2013-08-25 08:30:21 -06:00 |
|
Gregory Nutt
|
0582148cfd
|
SAMA5D3x-EK: Fix some backward conditional compilation
|
2013-08-24 14:06:47 -06:00 |
|
Gregory Nutt
|
5f78f6998f
|
SAMA5: OHCI various bugfixes for interrupt handling
|
2013-08-24 13:03:15 -06:00 |
|
Gregory Nutt
|
cd84d1bec4
|
SAMA5: EHCI now handles low- and full-speed connections by giving them to OHCI; OHCI now uses the work queue to defer interrupt processing; If both OHCI and EHCI are enabled, EHCI is the master of the UHPHS interrupt
|
2013-08-24 11:34:24 -06:00 |
|
Gregory Nutt
|
9d0f504340
|
SAMA5 EHCI: Added logic to detect port speed. Handling is insufficient
|
2013-08-24 07:36:05 -06:00 |
|
Gregory Nutt
|
2d5313a931
|
Fix #endif with missing #if condition. Reported by Andrew Bradford
|
2013-08-23 16:40:30 -06:00 |
|
Gregory Nutt
|
7c5f8c86ce
|
SAMA5/ECHI: Debug register access, add logic to determine transfer size, fix setting of control bit in token
|
2013-08-23 16:23:15 -06:00 |
|
Gregory Nutt
|
db1b3c421b
|
SourceForge bug #16 Fix IO pin map. Add CONFIG_SERIAL_TERMIOS support. From CCTSAO
|
2013-08-23 11:48:53 -06:00 |
|
Gregory Nutt
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bdc7d0523d
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SAMA5 EHCI: cosmetic changes
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2013-08-23 11:26:17 -06:00 |
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Gregory Nutt
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9a109ba4ba
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SAMA5: Add support for sharing ports when both OHCI and EHCI are enabled
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2013-08-23 10:58:30 -06:00 |
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Gregory Nutt
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2b3fd9e9c3
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SAMA5 EHCI: Fix some list traversal bugs
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2013-08-22 19:32:24 -06:00 |
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Gregory Nutt
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eef0f392ec
|
SAMA5 EHCI: Initial debug changes
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2013-08-22 17:25:00 -06:00 |
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Gregory Nutt
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f356586fd3
|
SAMA5 EHCI: No complete for bulk and control endpoints
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2013-08-22 13:36:16 -06:00 |
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Gregory Nutt
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577b19920e
|
SAMA5 EHCI: Add data transfer logic for asynchronous endpoints
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2013-08-22 10:27:46 -06:00 |
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Gregory Nutt
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c1c5e195ce
|
SAMA5 EHCI: Add IOC error handling
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2013-08-22 09:23:01 -06:00 |
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Gregory Nutt
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7e9832f955
|
SAMA5 EHCI: transfer termination logic. Incomplete
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2013-08-21 17:08:12 -06:00 |
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Gregory Nutt
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a5eb830544
|
SAMA5 EHCI: Hardware initialization logic
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2013-08-21 13:45:54 -06:00 |
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Gregory Nutt
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b1864a995e
|
Move all SAMA5 EHCI interrupt handling to the worker thread
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2013-08-21 11:07:42 -06:00 |
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Gregory Nutt
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85aa2c1a8d
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SAMA5 EHCI: At list-oriented cache operations
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2013-08-20 18:06:04 -06:00 |
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Gregory Nutt
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0f2ce573e4
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Add SAMA5 EHCI list traversal logic
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2013-08-20 17:01:30 -06:00 |
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Gregory Nutt
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320a2e2a0a
|
Beginning of support for SAMA5 EHCI. Not much there yet
|
2013-08-20 15:46:36 -06:00 |
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Gregory Nutt
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e3a76b2e64
|
Add kernel/user memalign functions. Not fully integrated
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2013-08-20 13:04:49 -06:00 |
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Gregory Nutt
|
b04ea3efa6
|
SAMA5 OHCI+EHCI mostly cosmetic changes
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2013-08-19 15:03:14 -06:00 |
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Gregory Nutt
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19d7c90d4e
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USB host: Add device address management support in preparation for USB hub support
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2013-08-18 14:31:57 -06:00 |
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Gregory Nutt
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0524688c71
|
Add few more EHCI definitions
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2013-08-18 13:01:13 -06:00 |
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Gregory Nutt
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dc07d65e14
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STM32 F1 I2C: Fix a typo that crept in with some recent changes. From Yiran Liao
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2013-08-18 07:45:14 -06:00 |
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Gregory Nutt
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e2f68ac85f
|
Add EHCI header file (not quite complete)
|
2013-08-17 14:19:18 -06:00 |
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Gregory Nutt
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11086f34d0
|
SAMA5 OHCI: Driver is now basically functional
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2013-08-16 13:13:21 -06:00 |
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Gregory Nutt
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1fb80e0917
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SAMA5 OHCI: Re-organize some endpoint list data structures.. Strange things happen when semaphores lie in DMA memory which is occasionally invalidated
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2013-08-16 11:36:51 -06:00 |
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Gregory Nutt
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10daf06976
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STM32 SPI: nbits interface extended to handle LSB- or MSB-first operation. From Teemu Pirinen
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2013-08-16 11:35:22 -06:00 |
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Gregory Nutt
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ca739ce76d
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SAMA5 OHCI: Don't prealloc RH port TDs and EDs. Allocate from a free list like other cases
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2013-08-15 17:15:08 -06:00 |
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Gregory Nutt
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7f733b0472
|
SAMA5 OHCI: Fix errors in cache handling; Don't add ED to control list until port is connected
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2013-08-15 15:28:27 -06:00 |
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Gregory Nutt
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0098c9ec5f
|
SAMA5: ports should not be reset state (seems to make no difference)
|
2013-08-14 17:33:31 -06:00 |
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Gregory Nutt
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fe73fe2e23
|
SAMA5: Alternatie clock configuration that yields a perfect 48MHz full speed USB clock and a CPU clock of 384MHz
|
2013-08-14 15:16:04 -06:00 |
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Gregory Nutt
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79d5239023
|
SAMA5 OHCI: Use physical address and flush and/or invalidate data caches as necessary
|
2013-08-14 12:23:06 -06:00 |
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Gregory Nutt
|
16ac25fd09
|
Clean up some LP17xx and STM32 USB host configuration compilation errors due to the massive changes to the USB host interfaces needed to support the SAMA5
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2013-08-13 17:43:19 -06:00 |
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Gregory Nutt
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3f4b90cc3b
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SAMA5: Major restructuring of the the OHCI driver drivers to better handle the multiple root hub ports and concureent transfers on each port.
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2013-08-13 16:48:14 -06:00 |
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Gregory Nutt
|
1700d06d89
|
Separate wait() and enumerate() methods from struct usbhost_driver_s and move to new interface, struct usbhost_connection_s. This is part of the necessary restructuring of the USB host interface to support multiple root hub ports.
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2013-08-13 15:03:46 -06:00 |
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Gregory Nutt
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a65ac5bc72
|
Back out most of the changes of 3b04d08043742b9e65cf38d45988b35bff91daed
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2013-08-13 14:12:27 -06:00 |
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Gregory Nutt
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b575450a04
|
Separate SAMA5 OHCI interrupt handling into separate functions
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2013-08-13 13:34:35 -06:00 |
|
Gregory Nutt
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ad258cb3b7
|
SAMA5 OHCI: Fix some erors in the loop that waits for device connection changes
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2013-08-13 09:44:16 -06:00 |
|
Gregory Nutt
|
9220a748bd
|
Fix re-entry problem in SAMA5 up_putc
|
2013-08-13 09:42:40 -06:00 |
|
Gregory Nutt
|
1ec49f08b4
|
STM32 F3 fixes from John Wharington
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2013-08-13 07:48:18 -06:00 |
|
Gregory Nutt
|
120a3604c9
|
More changes to USB host interface to support multiple downstream ports
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2013-08-12 16:29:33 -06:00 |
|
Gregory Nutt
|
e09bd50fdd
|
First of several changes needed to support multiple USB host root hubs
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2013-08-12 14:44:06 -06:00 |
|
Gregory Nutt
|
0da218483d
|
SAMA5: Add logic to control VBUS power for OHCI
|
2013-08-12 11:59:10 -06:00 |
|
Gregory Nutt
|
ed49812d2c
|
Add untested OHCI driver for the SAMA5; structure naming and header files for USB host initialization prototypes
|
2013-08-11 17:11:32 -06:00 |
|
Gregory Nutt
|
dd3c682443
|
SAMA5: Some improvements to the HSCMI card removal/insertion logic
|
2013-08-11 11:13:11 -06:00 |
|
Gregory Nutt
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d6264c2c1f
|
Add CAN configuration to STM32 config menu
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2013-08-10 19:37:35 -06:00 |
|
Gregory Nutt
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054468d151
|
STM32: Fix STM32 serial init for non-reordered serial ports. From Lorenz Meier
|
2013-08-10 19:33:16 -06:00 |
|
Gregory Nutt
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544185c683
|
Added option to disable STM32 serial port re-ordering
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2013-08-10 19:29:44 -06:00 |
|
Gregory Nutt
|
da4cebf572
|
SAMA5: Fix HSMCI race condition. Now memory card interface is functional with DMA
|
2013-08-10 18:01:23 -06:00 |
|
Gregory Nutt
|
968b2553cd
|
Rearrange configuration settings so that ARCH_HAVE_SDIO is moved to higher, sharable level
|
2013-08-10 09:06:53 -06:00 |
|
Gregory Nutt
|
c5e66ae051
|
Extend the virtual-to-physical address conversion logic to handle NFS SRM, UDPH SRAM, and external SRAM and PSRAM.
|
2013-08-09 17:55:27 -06:00 |
|
Gregory Nutt
|
efabe4aaff
|
SAMA5: Centralize logic for conversion between physical and virtual addresses
|
2013-08-09 17:25:53 -06:00 |
|
Gregory Nutt
|
619cd66f33
|
Fix some cache-related issues with the SAMA5 DMA driver
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2013-08-09 15:25:13 -06:00 |
|
Gregory Nutt
|
628f50ba61
|
SAM3,4,A5 DMA fixes; SAMA5 SPI driver now supports DMA transfers
|
2013-08-09 13:12:16 -06:00 |
|
Gregory Nutt
|
417636e1de
|
SAMA5: Use RDR/TDR registers for DMA, not FIFO registers; change DMA bit settings to match Atmel example. Still no DMA
|
2013-08-08 15:51:16 -06:00 |
|
Gregory Nutt
|
83cbd61c8c
|
SAMA5 DMA: Need to flush caches; DMA channel depends upon direction of DMA; the maximum transfer size in bytes depends on the number of bytes per transfer
|
2013-08-08 13:15:52 -06:00 |
|
Gregory Nutt
|
9d81d4727c
|
More SAMA5 DMAC driver fixes. Still does not work.
|
2013-08-07 17:19:48 -06:00 |
|
Gregory Nutt
|
2df1d56a01
|
SAMA3,4,A5: Misc corrections to DMA and HSMCI drivers
|
2013-08-07 11:32:08 -06:00 |
|
Gregory Nutt
|
bfaf64e54e
|
Fix SAM bug: Parmaters reversed in DMA function call
|
2013-08-06 15:47:09 -06:00 |
|
Gregory Nutt
|
b0e8231fa3
|
SAM3,4,A5 DMAC driver fixes
|
2013-08-06 13:27:48 -06:00 |
|
Gregory Nutt
|
6a429e675f
|
SAM3,4,A5: Fix some masked status checks that can generate false error reports
|
2013-08-06 12:36:56 -06:00 |
|
Gregory Nutt
|
ce9eb71495
|
SAMA5: A few early, easy bug fixes. The rest will all be difficult
|
2013-08-06 11:29:53 -06:00 |
|
Gregory Nutt
|
fa011d9aca
|
SAMA5: Add PIO interrupt support. Massive name changes for consistency in PIO vs GPIO naming. SAMA5D3x-EK: Add support for SD card detection PIO interrupts
|
2013-08-06 10:20:17 -06:00 |
|
Gregory Nutt
|
369bf26b20
|
SAMA5: Add HSMCI memory card driver support
|
2013-08-05 16:21:24 -06:00 |
|
Gregory Nutt
|
8c88dcd0c7
|
SAMA5: SPI Driver + AT25 FLASH work; SAM3/4: Correct an error, SPI will not be correctly configured if CONFIG_SPI_OWNBUS=n
|
2013-08-05 10:29:43 -06:00 |
|
Gregory Nutt
|
cbe8c5ed56
|
SAMA5: Add logic to auto-mount a file system on AT25 SPI FLASH for NSH
|
2013-08-05 08:24:39 -06:00 |
|
Gregory Nutt
|
906506c61c
|
SAMA5D3x-EK: At support for the AT25 serial FLASH
|
2013-08-04 16:56:41 -06:00 |
|
Gregory Nutt
|
1060b232e9
|
SAMA5: Add register level debug option for SPI
|
2013-08-04 14:45:24 -06:00 |
|
Gregory Nutt
|
83af194db1
|
SAMA5: SPI driver now supports both SPI0 and SPI1
|
2013-08-04 12:50:20 -06:00 |
|
Gregory Nutt
|
163ec613b1
|
SAMA5: Add basic SPI suppport (untested)
|
2013-08-04 11:08:20 -06:00 |
|
Gregory Nutt
|
1ea55fc2a7
|
SAMA5: Add DMA suppport (untested)
|
2013-08-04 10:44:18 -06:00 |
|
Gregory Nutt
|
5cdc3db214
|
SAMA5: Add DMA controller register definitions
|
2013-08-03 12:13:42 -06:00 |
|
Gregory Nutt
|
6422792f57
|
Standard configuration variables used to enable interupt controller debug; SAMA5: Correct handling of spurious interrupts
|
2013-08-03 08:22:37 -06:00 |
|
Gregory Nutt
|
3c404ea742
|
Various changes to get SAMA5 SDRAM working. Marginally functional, but there is more to be done
|
2013-08-02 18:30:27 -06:00 |
|
Gregory Nutt
|
3ee10f0f08
|
Correct some typos int he MPADDRCS register address definitions
|
2013-08-02 12:06:11 -06:00 |
|
Gregory Nutt
|
2feb83a2f8
|
SAMA5: More MMU-related changes to properly initialize SDRAM
|
2013-08-02 11:11:57 -06:00 |
|
Gregory Nutt
|
2ac9669a87
|
SAMA5: Add logic to initialize SAMA5D3x-EK on-board SDRAM
|
2013-08-01 16:58:55 -06:00 |
|
Gregory Nutt
|
8b8fe4d073
|
SAMA5: Add DDR controller register definitions
|
2013-08-01 12:27:41 -06:00 |
|
Gregory Nutt
|
b148465beb
|
ARMv7-A: Map all of .text, .bss, .data., stacks before enabling the MMU and caching. This is simpler and avoids fears I have about caching
|
2013-08-01 10:05:33 -06:00 |
|
Gregory Nutt
|
f2195a16b2
|
ARMv7-A: Separate CONFIG_PAGING start-up logic into a different startup file. Too much conditional compilation.
|
2013-08-01 07:41:00 -06:00 |
|
Gregory Nutt
|
ffdd034c35
|
SAMA5: Add an NSH configuration of the SAMA5D3x-EK board
|
2013-07-31 10:46:13 -06:00 |
|
Gregory Nutt
|
7dfef5e22e
|
SAMA5: Modification of some CPSR-related inline functions
|
2013-07-31 09:11:24 -06:00 |
|
Gregory Nutt
|
fde3777e9e
|
Fix Cortex-A CPSR register field definition
|
2013-07-30 19:05:24 -06:00 |
|
Gregory Nutt
|
bfa1a9545b
|
SAMA5: Change mapping of vector tables to work around that fact that I don't understand how the AXI MATRIX remap works
|
2013-07-30 16:19:52 -06:00 |
|
Gregory Nutt
|
8bfdf70766
|
ARMv7-A: Add cp15_disable_dcache(); SAMA5: nor_main.c no disables MMU and caches; Should not remap ISRAM to address 0x0 unless we booted into ISRAM
|
2013-07-30 13:20:33 -06:00 |
|
Gregory Nutt
|
c4c222ca3a
|
More DAC changes from John Wharington
|
2013-07-30 11:41:53 -06:00 |
|
Gregory Nutt
|
2c6b370c4a
|
Add ARMv7-A irqdisable() inline function
|
2013-07-30 11:37:09 -06:00 |
|
Gregory Nutt
|
5a94767c52
|
STM32 F3 I2C driver from John Wharington
|
2013-07-30 10:35:17 -06:00 |
|
Gregory Nutt
|
b57f54fbd0
|
STM32 DAC DMA fixes from John Wharington
|
2013-07-30 08:54:32 -06:00 |
|
Gregory Nutt
|
413aba0bf5
|
SAMA5: More cache and mmu inline utility functions
|
2013-07-29 19:57:15 -06:00 |
|
Gregory Nutt
|
36b1cd0a6b
|
SAMA5: Separate cache operations into separate files
|
2013-07-29 18:38:02 -06:00 |
|
Gregory Nutt
|
5351598323
|
Changes to ARMv7-A boot logic to handle the case where we execute out of NOR FLASH
|
2013-07-29 17:54:56 -06:00 |
|
Gregory Nutt
|
f96c6793b9
|
Add SAMA5 HSMC register definitions and logic to reconfigure the NOR FLASH
|
2013-07-29 10:56:21 -06:00 |
|
Gregory Nutt
|
4ba648aaae
|
SAMA5: Add file structure to support board-specific initialization of NOR flash
|
2013-07-29 07:41:53 -06:00 |
|
Gregory Nutt
|
9a94a3707c
|
SAMA5: The ostest configuration have been converted to run out of NOR flash. There is more to be done, however
|
2013-07-28 15:07:35 -06:00 |
|
Gregory Nutt
|
7dc8dd4b50
|
SAMA5: Correct a clock configuration bug; clarify some MMU memory types
|
2013-07-28 12:44:06 -06:00 |
|
Gregory Nutt
|
263678e05b
|
SAMA5: Correct vector mapping
|
2013-07-28 09:44:11 -06:00 |
|
Gregory Nutt
|
f0e3011fc3
|
Removed unused ARMv7-A cache function
|
2013-07-27 14:03:02 -06:00 |
|