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Author SHA1 Message Date
Ville Juven
91063e85f0 risc-v/vfork: FPU was not saved correctly 
The FPU register saving upon vfork entry was missing.

Also added macro that tells the actual size of an FPU reg, instead
of just having a coefficient for qfpu/no-qfpu.
 2022-05-20 15:59:24 +08:00
Xiang Xiao
b39d70fe25 libxxmini: Fix error: use of undeclared identifier 'nullptr' 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-19 23:23:01 +03:00
Xiang Xiao
efc863217b Fix error: converting the result of '<<' to a boolean always evaluates to true 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-19 23:23:01 +03:00
Xiang Xiao
1067b6afc9 boards/sim: Remove the unnecessary CONFIG_SIM_M32 
to enable build on macOS

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-19 23:23:01 +03:00
Xiang Xiao
ce7113387b board/sim: Enable hellocxx in loadable config 
to test the support of C++ ELF binary

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-19 23:23:01 +03:00
Xiang Xiao
9d2dae2fd8 sched/wqueue: Add work_timeleft macro to get the left time to start 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-19 23:21:54 +03:00
Xiang Xiao
5b0b4bd586 sched/wdog: Change the return type of wd_gettime from int to sclock_t 
to handle 64bits sclock_t correctly

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-19 23:21:54 +03:00
Xiang Xiao
753aa98ca7 net/tcp: Zero keeptimer in case caller set keepalive to false 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-19 09:08:36 -03:00
Ville Juven
1ec70bc704 risc-v/vfork: Save FPU registers 
Save the callee saved FPU registers
 2022-05-19 09:05:00 -03:00
Ville Juven
ef42b7c31e risc-v/irq: Add ABI name versions of FPU registers 2022-05-19 09:05:00 -03:00
Ville Juven
ec073d91c7 risc-v/vfork: Save correct amount of registers for vfork 
The original code does not obey RISC-V calling conventions, looks like
it was copy&pasted from MIPS instead.
 2022-05-19 09:05:00 -03:00
jihandong
89338a6914 sched/pthread/pthread_condclockwait.c: follow POSIX. 
pthread_condclockwait() can not distinguish between interrupt and timeout,
which cause these API not follow POSIX:
	pthread_rwlock_timedrdlock()
	pthread_rwlock_timedwrlock()
	pthread_condtimedwait()
POSIX:
	Upon return from the signal handler the thread resumes waiting for
	the condition variable as if it wasnot interrupted
	These functions shall not return an error code of [EINTR].

Replacing nxsem_wait() with nxsem_clockwait_uninterruptible() can solve it.

Signed-off-by: jihandong <jihandong@xiaomi.com>
 2022-05-19 14:57:33 +08:00
Sebastien Lorquet
517f179f8d stm32h7: Adds the ability to choose the HSI divider, which must be indicated in board.h if used. 2022-05-18 11:59:07 -07:00
Ville Juven
12476e1f43 RISC-V: add C++ support to crt0 2022-05-19 01:35:36 +08:00
zhuyanlin
b71a1f77c3 xtensa: add perf counter 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-05-18 19:11:32 +03:00
Xiang Xiao
d8b97d7ae8 net/tcp: Use the relative value for keep alive timer 
unify the timer process logic as other tcp state

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-18 18:40:41 +03:00
Xiang Xiao
2d3ee157ce net/tcp: Use the decrease timer in TCP_TIME_WAIT/TCP_FIN_WAIT_2 
unify the timer process logic as other tcp state

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-18 18:40:41 +03:00
Gustavo Henrique Nihei
aefe78a884 xtensa: Add missing input operand on sys_call6 inline ASM 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-05-18 15:46:57 +02:00
Xiang Xiao
b30e0a26ef Move "-nostartfiles -nodefaultlibs" from Make.defs to Toolchian.defs 
and replace "-nostartfiles -nodefaultlibs" with "-nostdlib"

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-18 08:26:02 -04:00
Ville Juven
d7f7867f76 risc-v/opensbi: Generalize the SBI variable handling in makefile 
- Remove most of the ifeq-conditions and replace them with variables.
- Move the -I flag for 3rd party headers to opensbi/Make.defs

This clean-up / generalization makes it much simpler to add a new SBI
implementation, without the need to add a bunch of ifeq / elif conditions
to the makefile.
 2022-05-18 08:35:04 -03:00
Gustavo Henrique Nihei
4f31c89963 esp32c3-devkit: Rename linker script to indicate use for Flat mode 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-05-18 11:43:52 +08:00
Gustavo Henrique Nihei
c778f35f08 risc-v/esp32c3: Add support for Protected Mode 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-05-18 11:43:52 +08:00
Sebastien Lorquet
6ea8bac1c5 net: fix the build when CONFIG_NET_TCP_WRITE_BUFFERS is not enabled 2022-05-18 07:54:17 +09:00
Xiang Xiao
6642741612 timers/watchdog: Ensure it's the idle domain before keepalive 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-17 22:57:52 +03:00
gaojiawei
335fc3dde2 syslog: Fixed a potential buffer overflow issue 
The `CONFIG_SYSLOG_MAX_CHANNELS` is user-specified, however, if the user
defines more channels than what `CONFIG_SYSLOG_MAX_CHANNELS` was defined as,
a potential buffer overflow occurred. Although the compiler does warn us about
that, we should explicitly tell the user this is an error.

Signed-off-by: gaojiawei <gaojiawei@xiaomi.com>
 2022-05-18 01:36:16 +08:00
Eero Nurkkala
817919ebb6 risc-v/mpfs: IHC: allow hart configuration 
Let the user pick what runs on the harts. For example, the
default configuration now supports NuttX on hart2 and Linux
kernel on harts 3 and 4. Also fix a few issues in the code.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
 2022-05-18 01:34:33 +08:00
Abdelatif Guettouche
53cf328cbe xtensa.h: Remove old prototype. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-05-18 01:07:48 +08:00
Ville Juven
c2d179a2f4 arch/addrenv: Add missing FAR qualifier to addrenv_mprot 2022-05-17 11:12:57 +02:00
Abdelatif Guettouche
06f2c67fc2 xtensa.h: Remove old prototype. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-05-16 23:38:09 +08:00
Adam Kaliszan
fb3d080fd1 NucleoF401RE Oled 
Stm NucleoF401RE supports SSD1306 oled display on SPI bus.
 2022-05-16 11:43:28 -03:00
zhuyanlin
883337c3a0 xtensa:fpu: add up_fpucmp and enable CONFIG_ARCH_FPU macro 
For arch with CP_NUM > 0, enable ARCH_FPU

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-05-16 12:30:39 +03:00
Xiang Xiao
5958d3ac62 risc-v: Move "LDFLAGS += -melf32lriscv" from Make.defs to Toolchain.defs 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-16 11:17:08 +03:00
Xiang Xiao
f5dd839879 boards/arm: Remove "LDFLAGS += -g" whichi is already added by Toolchain.defs 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-16 11:17:08 +03:00
zhuyanlin
1c977e97d2 pthread_mutexinit: fix deadcode in pthread_mutexinit 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-05-16 10:20:52 +03:00
zhuyanlin
3bac0d8367 timer:settime: check return value of clock_abstime2ticks 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-05-16 10:20:52 +03:00
Xiang Xiao
d3524d4f8b arch/i2c: Change xxx_i2c_tousecs to xxx_i2c_toticks 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 23:22:01 +03:00
Xiang Xiao
f311228f80 arm/efm32: Fix typo error: CONFIG_EFM32_I2C_DYNTIMEOUT to CONFIG_EFM32_I2C_DYNTIMEO 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 19:18:09 +03:00
Xiang Xiao
1f920e55d3 Move warning option from Make.defs to Toolchain.defs 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 15:40:35 +03:00
Xiang Xiao
8b7c5b039d arch: Move -fsanitize=kernel-address to ARCHOPTIMIZATION 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 15:40:35 +03:00
Xiang Xiao
4f090eb7fd arch/sparc: Move toolchain macro from board's Make.defs to Toolchain.defs 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 15:40:35 +03:00
Xiang Xiao
21188ce37e boards/nrf52: Remove toolchain macro which is already defined in Toolchain.defs 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 15:40:35 +03:00
Xiang Xiao
468007307c boards/nrf52: Remove ARCHCCVERSION/ARCHCCMAJOR which isn't used 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 15:40:35 +03:00
Xiang Xiao
51cf7ba05a Remove FAR from arm/risc-v/xtensa/sim/x86 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 13:55:58 +03:00
Xiang Xiao
f905563cc9 tools/nxstyle: Add kbps to the while suffix list 
and correct offset by 1 error

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 13:55:58 +03:00
Xiang Xiao
2976accd9f arch: Remove the extra space before the function prototype 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 13:55:58 +03:00
Xiang Xiao
1fb8c13e5e Replace nxsem_timedwait_uninterruptible with nxsem_tickwait_uninterruptible 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 13:55:58 +03:00
Xiang Xiao
816ce73ab4 Replace nxsem_timedwait with nxsem_tickwait 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 13:55:58 +03:00
Xiang Xiao
22e4f1c59a sched: Remove start from nxsem_tickwait[_uninterruptible] 
to simplify both caller and callee

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 13:55:58 +03:00
Xiang Xiao
08002a0a38 sched: Replace pthread_sem_take with nxsem_wait_uninterruptible 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-14 20:47:34 +03:00
Petro Karashchenko
0fee5a2b84 nuttx: fix typos in comments 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-05-14 23:45:52 +08:00