If the CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE is enabled and the
card is found to be ready in the waitenable call. Then
we do not need a Watchdog nor to configure the pin for
IRQ to detect ready.
This was reported as an error, and it is not, it simply means
we do not have to wait.
The following message is printed continuously and the nsh
shell is unusable on sama5d3-xplained.
"OHCI ERROR: Unhandled interrupts pending: 000001". This
happens when a keyboard is removed and reinserted on
port3 (lower port) while a bluetooth dongle is in port2.
in SMP, signal processing cannot be nested, we use xcp.sigdeliver to identify whether there is currently a signal being processed, but this state does not match the actual situation
One possible scenario is that signal processing has already been completed, but an interrupt occurs, resulting in xcp.sigdeliver not being correctly set to NULL,
At this point, a new signal arrives, which can only be placed in the queue and cannot be processed immediately
Our solution is that signal processing and signal complete status are set in the same critical section, which can ensure status synchronization
Signed-off-by: hujun5 <hujun5@xiaomi.com>
1. Get the value of sp from dump regs when an exception occurs,
to avoid getting the value of fp from up_getsp and causing
incomplete stack printing.
2. Determine which stack the value belongs to based on the value
of SP to avoid false reports of stack overflow
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
CURRENT_REGS may change during assert handling, so pass
in the 'regs' parameter at the entry point of _assert.
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
Unplugging a USB device from an OHCI root hub will cause
a deadlock if DRVR_EPFREE is called from sam_rhsc_bottomhalf. A
typical call chain looks like this: sam_rhsc_bottomhalf->
CLASS_DISCONNECTED->usbhost_destroy->DRVR_EPFREE. In this case
DRVR_EPFREE tries to lock a locked mutex. A recursive mutex
prevents this deadlock.
This commit adds deifiniton of get_timer_period() and adj_timer_period()
functions used by adjtime() interface.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Store the old environment in a local context so another temporary address
environment can be selected. This can happen especially when a process
is being loaded (the new process's mappings are temporarily instantiated)
and and interrupt occurs.
When l2cc is already in disable state, performing a disable operation
again will flush incorrect cache data to memory
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
Invalidate operations at DDI0246H_l2c310_r3p3_trm:
If there is a stale entry in the L2 cache, the system enables the invalidation of
the L1 cache. But before the controller invalidates the L2 cache, it allocates a
line from the L2 cache to an L1 cache.
The robust code sequence for invalidation with a non-exclusive cache arrangement is:
1. InvalLevel2 Address ; forces the address out past level 2
2. CACHE SYNC ; Ensures completion of the L2 inval
3. InvalLevel1 Address ; This is broadcast within the cluster
4. DSB ; Ensure completion of the inval as far as Level 2.
This sequence ensures that, if there is an allocation to L1 after the L1 invalidation, the data
picked up is the new data and not stale data from the L2
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
Summary:
- This commit applies the changes from imxrt
- See 3a4542f3c4
Impact:
- imx6 ethernet with d-cache
Testing:
- Tested with imx6_with_ar8031 (will be added later)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
minidump will backtrace failure when use C code to save user context,
because the stack push operation in C code can disrupt the stack information.
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
Pinmaps should not have contained GPIO_SPEED_xxx settings and
all pins should have had suffixes to allow any pins attributes to
be set. This is board dependent.
This change adds CONFIG_STM32L5_USE_LEGACY_PINMAP to allow for
lazy migration to using pinmaps with suffixes.
The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
The tools will take a board.h file and a legacy pinmap and outut the required
changes that one needs to make to a board.h file.
Eventually, CONFIG_STM32L5_USE_LEGACY_PINMAP will be deprecated and the legacy
pinmaps removed from NuttX.
Any new boards added should set CONFIG_STM32L5_USE_LEGACY_PINMAP=n and
fully define the pins in board.h
Pinmaps should not have contained GPIO_SPEED_xxx settings and
all pins should have had suffixes to allow any pins attributes to
be set. This is board dependent.
This change adds CONFIG_STM32WB_USE_LEGACY_PINMAP to allow for
lazy migration to using pinmaps with suffixes.
The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
The tools will take a board.h file and a legacy pinmap and outut the required
changes that one needs to make to a board.h file.
Eventually, CONFIG_STM32WB_USE_LEGACY_PINMAP will be deprecated and the legacy
pinmaps removed from NuttX.
Any new boards added should set CONFIG_STM32WB_USE_LEGACY_PINMAP=n and
fully define the pins in board.h
Pinmaps should not have contained GPIO_SPEED_xxx settings.
This is board dependent.
This change adds CONFIG_STM32F0G0L0_USE_LEGACY_PINMAP to allow for
lazy migration to using pinmaps without speeds.
The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
The tools will take a board.h file and a legacy pinmap and outut the required
changes that one needs to make to a board.h file.
Eventually, CONFIG_STM32F0G0L0_USE_LEGACY_PINMAP will be deprecated and the legacy
pinmaps removed from NuttX.
Any new boards added should set CONFIG_STM32F0G0L0_USE_LEGACY_PINMAP=n and
fully define the pins in board.h
Pinmaps should not have contained GPIO_SPEED_xxx settings.
This is board dependent.
This change adds CONFIG_STM32L4_USE_LEGACY_PINMAP to allow for
lazy migration to using pinmaps without speeds.
The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
The tools will take a board.h file and a legacy pinmap and outut the required
changes that one needs to make to a board.h file.
Eventually, CONFIG_STM32L4_USE_LEGACY_PINMAP will be deprecated and the legacy
pinmaps removed from NuttX.
Any new boards added should set CONFIG_STM32L4_USE_LEGACY_PINMAP=n and
fully define the pins in board.h
replace all GPIO_MODE_xxMHz with GPIO_MODE_2MHz provide GPIO_ADJUST_MODE
and add legacy pinmap
For the stm32F1 pinmaps should not have contained GPIO_MODE_50MHz settings
on all pins. Speed is board dependent.
This change adds CONFIG_STM32_USE_LEGACY_PINMAP to allow for
lazy migration to using pinmaps that can have the GPIO_MODE_xxMHz set.
The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
The tools will take a board.h, and use all the defconfigs with the legacy
pinmap and output the required changes that one needs to make to a board.h
file.
Eventually, CONFIG_STM32_USE_LEGACY_PINMAP will be deprecated and the legacy
pinmaps removed from NuttX.
Any new boards added should set CONFIG_STM32_USE_LEGACY_PINMAP=n and
fully define the pins in board.hf1
Pinmaps should not have contained GPIO_SPEED_xxx settings.
This is board dependent.
This change adds CONFIG_STM32_USE_LEGACY_PINMAP to allow for
lazy migration to using pinmaps without speeds.
The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
The tools will take a board.h file and a legacy pinmap and outut the required
changes that one needs to make to a board.h file.
Eventually, STM32_USE_LEGACY_PINMAP will be deprecated and the legacy
pinmaps removed from NuttX.
Any new boards added should set STM32_USE_LEGACY_PINMAP=n and
fully define the pins in board.h
Pinmaps should not have contained GPIO_SPEED_xxx settings.
This is board dependent.
This change adds CONFIG_STM32_USE_LEGACY_PINMAP to allow for
lazy migration to using pinmaps without speeds.
The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
The tools will take a board.h file and a legacy pinmap and outut the required
changes that one needs to make to a board.h file.
Eventually, STM32_USE_LEGACY_PINMAP will be deprecated and the legacy
pinmaps removed from NuttX.
Any new boards added should set STM32_USE_LEGACY_PINMAP=n and
fully define the pins in board.h
Pinmaps should not have contained GPIO_SPEED_xxx settings.
This is board dependent.
This change adds CONFIG_STM32_USE_LEGACY_PINMAP to allow for
lazy migration to using pinmaps without speeds.
The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
The tools will take a board.h file and a legacy pinmap and outut the required
changes that one needs to make to a board.h file.
Eventually, STM32_USE_LEGACY_PINMAP will be deprecated and the legacy
pinmaps removed from NuttX.
Any new boards added should set STM32_USE_LEGACY_PINMAP=n and
fully define the pins in board.h
Pinmaps should not have contained GPIO_SPEED_xxx settings.
This is board dependent.
This change adds CONFIG_STM32_USE_LEGACY_PINMAP to allow for
lazy migration to using pinmaps without speeds.
The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
The tools will take a board.h file and a legacy pinmap and outut the required
changes that one needs to make to a board.h file.
Eventually, STM32_USE_LEGACY_PINMAP will be deprecated and the legacy
pinmaps removed from NuttX.
Any new boards added should set STM32_USE_LEGACY_PINMAP=n and
fully define the pins in board.h
Pinmaps should not have contained GPIO_SPEED_xxx settings.
This is board dependent.
This change adds CONFIG_STM32_USE_LEGACY_PINMAP to allow for
lazy migration to using pinmaps without speeds.
The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
The tools will take a board.h file and a legacy pinmap and outut the required
changes that one needs to make to a board.h file.
Eventually, STM32_USE_LEGACY_PINMAP will be deprecated and the legacy
pinmaps removed from NuttX.
Any new boards added should set STM32_USE_LEGACY_PINMAP=n and
fully define the pins in board.h
Pinmaps should not have contained GPIO_SPEED_xxx settings.
This is board dependent.
This change adds CONFIG_STM32F7_USE_LEGACY_PINMAP to allow for
lazy migration to using pinmaps without speeds.
The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
The tools will take a board.h file and a legacy pinmap and outut the required
changes that one needs to make to a board.h file.
Eventually, STM32F7_USE_LEGACY_PINMAP will be deprecated and the legacy
pinmaps removed from NuttX.
Any new boards added should set STM32F7_USE_LEGACY_PINMAP=n and
fully define the pins in board.h
Pinmaps should not have contained GPIO_SPEED_xxx settings.
This is board dependent.
This change adds CONFIG_STM32H7_USE_LEGACY_PINMAP to allow for
lazy migration to using pinmaps without speeds.
The work required to do this can be aided by running tools/stm32_pinmap_tool.py.
The tools will take a board.h file and a legacy pinmap and outut the required
changes that one needs to make to a board.h file.
Eventually, STM32H7_USE_LEGACY_PINMAP will be deprecated and the legacy
pinmaps removed from NuttX.
Any new boards added should set STM32H7_USE_LEGACY_PINMAP=n and
fully define the pins in board.h
The text describes an issue related to the running task in code.
The running task is only used when calling the _assert function
to indicate the task that was running before an exception occurred.
However, the current code only updates the running task during
irq_dispatch, which is suitable for ARM-M architecture but not
for ARM-A or ARM-R architecture, because their context switches
are not done through irq handler. Therefore, if the following
process is followed, the value of the running task will be incorrect:
1. task1 is running, this_task()=task1
2. do_irq is executed, setting running task()=task1
3. task1 switches to task2
4. task2 is running and generates a data abort
5. In the data abort, the _assert function is called,
and the running task obtained is still task1, but
the actual task that generated the exception is task2.
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
Over-drive can be forced to a given state by adding define to the
board.h configuration file:
#define STM32_VOS_OVERDRIVE 1 - force over-drive enabled,
#define STM32_VOS_OVERDRIVE 0 - force over-drive disabled,
#undef STM32_VOS_OVERDRIVE - autoselect over-drive by the default RCC logic
It seems that over-drive is not required for ULPI but it can be a workaround solution for boards with poor signal integration.
Higher core voltage means faster clock signal edges, which may be sufficient to synchronize the high-speed clock and data on poorly designed boards.
Over-drive can be forced to a given state by adding define to the
board.h configuration file:
#define STM32_VOS_OVERDRIVE 1 - force over-drive enabled,
#define STM32_VOS_OVERDRIVE 0 - force over-drive disabled,
#undef STM32_VOS_OVERDRIVE - autoselect over-drive by the default RCC logic
- Remove the temporary "saved" variable when temporarily changing MMU
mappings to access another process's memory. The fact that it has an
address environment is enough to make the choice
- Restore nxflat_addrenv_restore-macro. It was accidentally lost when
the address environment handling was re-factored.
On a GICv2 implementation, setting GICC_CTLR.EOImode to 1 separates
the priority drop and interrupt deactivation operations.
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
Summary:
- Support arm64 pmu api, Currently only the cycle counter function is supported.
- Using ARM64 PMU hardware capability to implement perf interface, modify all
perf interface related code.
- Support for pmu init under smp.
Signed-off-by: wangming9 <wangming9@xiaomi.com>
Otherwise, a request will never be transferred and there is no
information to the user that something is wrong.
For example, when using default values for TXFIFO in HS mode,
USBMSC will never work because the maximum request len is 512B
which is lower than the default TXFIFO size for IN EP.
Current Toolchain.defs set the compile flags directly, it's OK for
target specified gcc toolchain.
But some LLVM based toolchains (Rust/Zig etc) use single toolchain to handle all supported paltform.
In this patch, arch level Toolchain.defs export standard LLVM style arch flags, and let <Lang>.defs to map them into internal style,
This will simplify the intergration of non-c language.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
SPI transfers are dynamically determined to use DMA or not.
The flag to judge is removed in a previous simple refactoring commit.
Revert the logic and fix an issue that SPI transfer fails.
Choose a divider value that matches the description provided within
the same header file.
Include stddef.h to fix compiler errors because NULL is not defined.
Make logs print protocol, vid and pid consistently, (decimal hex hex).
This commit adds support for dead time delay to SAMv7 PWM driver. The
dead time can be used to delay an active PWM output at the begining
of the period. This can be used for H bridge control for example.
The values are to be set from the application level. It is required
to allow config option PWM_DEADTIME in order to support dead time delay.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Hardware flow control for serial requires the usage of DMAC channels
which is not yet supported for SAMv7 MCU. However the same config option
CONFIG_SERIAL_IFLOWCONTROL is also used for USB CDC/ACM flow control which
works well. Therefore the warning message should be raised only if
flow control is configured for USART driver and not for USB CDC/ACM.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
A list of breaking changes:
- SoftDevice libraries was renamed and libaries are now cmpatible with all platfroms with a given faimily.
- The random number generator was decoupled from the controller and must now be provided by the user.
We use arc4random_buf NuttX API for this.
- sdc_support_ API must be called before sdc_cfg_set()
- update public API terms to Bluetooth Core Specification v5.3 (mainly change slave/master to central/peripheral)
NuttX NRF52 configuration options properly updated.
- BLE features are supported only if the proper BLE role is selected
- sdc_hci_evt_get() and sdc_hci_data_get() have been replaced by sdc_hci_get()
This commit adds configurable fault protection to SAMv7 PWM driver.
The fault input can be used from peripherals as ADC or GPIO inputs.
Inputs from GPIO have configurable polarity (high or low). The PWM output
is automatically set to zero if fault input is active and restored
if fault input is not actived.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
